Silicon Laboratories Si4700 User Manual
Si4700/01/02/03-EVB
Si4700/01/02/03 EVALUATION BOARD USER’S GUIDE
1. Introduction—Si4700/01/02/03 EVB
Thank you for purchasing the Silicon Laboratories, Inc. Si4700/01/02/03 FM Tuner Evaluation Board (EVB). This
EVB and associated software have been designed to speed the overall development process and decrease the
required development time from EVB to product launch. We have posted support articles, answers to frequently
asked questions, and application notes at https://www.mysilabs.com.
The Si4700/01/02/03 EVB kit should include the following important items:
Si4700/01/02/03 FM Tuner customer welcome and evaluation letter
Si4700/01/02/03 baseboard Revision 1.2
Si4700/01/02/03 daughter card with pre-mounted Si4700/01 Revision 1.3 or Si4702/03 Revision 1.1
Wall transformer certified at 5 V/2 A, 100–240 V ac input and power input terminal (green)
USB cable
BNC to RCA adapters (2)
RCA to 1/8” jack cable
1/8” barrel adapter (1)
EVB Characterization Report
Si4700/01/02/03 Quick Start Guide
Si4700/01/02/03 CD including:
Data sheet
Development application GUI
Note: This version of the document supports the third generation of the GUI so ftware. Boards shipped prior to May 2006 may
be reprogrammed to use this new GUI. Instructions for doing so can be found on mysilabs.com. For details on the first
generation GUI, please reference the 0.2 version of this document, also available on https://www.mysilabs.com.
2. Overview
The Si4700/01/02/03 Evaluation Kit includes an evaluation board (EVB) to facilitate evaluation of the
Si4700/01/02/03 using the associated software. The EVB consists of a baseboard with a pre-mounted daughter
card. The Si4700/01/02/03 is pre-installed on the daughter card. The Si4700 and Si4701 come in a 4 x 4 mm 24pin QFN package and the Si4702 and Si4703 come in a 3 x 3 mm 20-pin QFN package. The Si4701 and Si4703
offer RDS support, while the Si4700 and Si4702 do not. Several input/output (I/O) connections provide access to
the various subsystems on the EVB. Refer to Figure 1 for the locations of the various I/O connectors/devices.
This document references the Si4700/01 data sheet and the Si4702/03 data sheet.
Rev. 0.9 1/15 Copyright © 2015 by Silicon Laboratories Si4700/01/02/03-EVB
Si4700/01/02/03-EVB
2 Rev. 0.9
Si4700/01/02/03-EVB
TABLE OF CONTENTS
Section Page
1. Introduction—Si4700/01/02/03 EVB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
2. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
3. Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3.1. Si4700/01/02/03 Baseboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.2. Si4700/01/02/03 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
4. EVB Configuration Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5. Hardware Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
6. Getting Started—Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
6.1. Connecting to the EVB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
6.2. Running the Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
7. Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
8. Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
8.1. Baseboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
8.2. Si4700/01 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
8.3. Si4702/03 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
9. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
9.1. Bill of Materials - Baseboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
9.2. Bill of Materials—Si4700/01 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
9.3. Bill of Materials—Si4702/03 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
Rev. 0.9 3
Si4700/01/02/03-EVB
D1
J2
PB1
J1
J6
J3
J3 - Daughter Card
J1 - Daughter Card
U1
J10
J11
J4
J5 (not visible)
U4
J2 - Daughter Card
(not visible)
X1
X1 - Daughter Card
U2
SW1
J7
3. Description
The following sections refer to both the image in Figure 1 an d the silk screen on the Si4700/01/02/03 EVB. It is
recommended to refer to both when using this guide.
Figure 1. Locations of I/O Connectors/Devices
Baseboard I/O connectors/devices:
J1 USB connector for USB interface
J2 JTAG connector for the C8051F320 MCU
J3 20-pin Expansion I/O connector
J4 Power input terminal block
J5 Baseboard card connector (not visible when the
baseboard and daughter card are mated)
J6 SMA connector for external 32.768 kHz RCLK
clock input
J7 2.1 mm power connector
J10 BNC connector for left audio output
J11 BNC connector for right audio output
PB1 Push-button to reset the C8051F320 MCU
D1 LED to confirm power supply to the C8051F320
MCU
X1 Baseboard 32.768 kHz crystal oscillator
4 Rev. 0.9
SW1 USB (J7–J4) power selection switch
Daughter card I/O connectors/devices:
J1 SMA connector for RF (single-ended or non-
J2 Baseboard connector (not visible when the
J3 Stereo headphone connector for audio output and
U1 Si4700/01/02/03
U2 LOUT/ROUT audio op-amp
U4 Headphone audio op-amp
U5 Schmidt trigger buffer (not visible)
X1 Daughter card 32.768 kHz crystal.
The EVB consists of various subsystems that are
explained in greater detail in the following sections.
inverting differential) input
baseboard and daughter card are mated)
antenna input
Si4700/01/02/03-EVB
3.1. Si4700/01/02/03 Baseboard
3.1.1. Microcontroller and Associated Peripherals
The Si4700/01/02/03 evaluation board uses a Silicon
Laboratories' C8051F320 microcontroller to control the
Si4700/01/02/03 and to provide USB connectivity to the
EVB (via J1). The LED D1 blinks to confirm that power
is being properly supplied to the C8051F320 and the
MCU firmware has loaded. Push-button PB1 manually
resets the C8051F320. The JTAG connector J2 is used
to program the C8051F320 at production time, and is
not necessary for normal operation. J2 can be used for
downloading example code or updating the MCU
firmware. See www.mysilabs.com for details.
3.1.2. Reference Clock for the Si4700/01/02/03
The Si4700/01/02/03 accepts a 32.768 kHz reference
clock input at the RCLK pin. On the baseboard, this
clock is provided by a precision crystal oscillator. The
output of the oscillator is routed to the Si4700/01/02/03
RCLK pin through a Schmitt-trigger buffer (U5) and a
33 series termination resistor (R19). The user has the
option of not using the oscillator and bringing in the
reference clock from an external source through J6.
This can be achieved by depopulating R19 and
populating R21 with a 0 resistor as shown in Table 1.
Note that the reference clock is not routed through the
Schmitt-trigger buffer when an external clock source is
being used. A third option is available which takes
advantage of the Si4700/01/02/03 internal oscillator.
This can be achieved by depopulating R2 and R3 on th e
bottom of the daughter card.
3.1.3. Power Supply Network
When the EVB is used in its simplest configuration,
SW1 can be set to USB POWER and powered via the
USB connector , J1 , o r to EXT POWER and po we re d via
the ac connector J7 and included transformer. No
additional configuration is required beyond selecting the
position of SW1.
J7 is a 2.1 mm power jack for use with standard
transformer power bricks. The power brick must be dc
and provide at least 5 V on the inner conductor. The
regulators on the baseboard are capable of handling up
to 26 V, so most dc power bricks are acceptable. To
power the board via J7, SW1 must be in the EXT
POWER position and no power should be applied via
J4. This configuration is convenient when using the
JTAG header to program custom code into the
C8051F320.
For additional flexibility in usage and testing, the
baseboard can accept power from up to 3 independent
power supplies via connector J4. When connecting one
or more power supplies to connector J4, care must be
taken not to supply power via J1 (USB POWER) or J7
(EXT POWER). When connecting more than one power
supply to connector J4, care must be taken to configure
R1, R2, and R4. See the Figure 2 for reference.
J4 provides flexibility for varying the 3 separate supplies
on the board: VRADIO, VAUDIO, and VIO/VMCU.
VRADIO is applied to the VA and VD pins of the
Si4700/01/02/03, VAUDIO powers the audio amplifier
network, and VIO/VMCU powers the baseboard
microcontroller, the reference clock system, and VIO on
the Si4700/01/02/03. Prior to using J4 it is necessary to
remove R1, R2, and R4 as these resistors short the
three connections on J4 together .
When supplying VIO/VMCU via the J4 connector, a
supply > 5 V may be used in conjunction with the 3.3 V
LDO regulator U2. However, U2 may be bypassed by
depopulating U2 and populating R30 with a 0 resistor.
In this case, the VMCU/VIO supply at J4 must lie
between 3.0 and 3.6 V. This condition is necessary t o
ensure reliable operation of the C8051F320.
When supplying VRADIO via the J4 connector, a supply
> 5 V may be used in conjunction with the 3.3 V LDO
regulator U3. However, U3 may be bypassed by
depopulating R14 and populating R25 with a 0
resistor. In such a case, the VRADIO supply at J4 must
lie between 2.7 and 5.5 V. These are the
recommended operating conditions for the
Si4700/01/02/03.
Rev. 0.9 5
Si4700/01/02/03-EVB
R1 R2 R4
U3
U6
VAUDIO
VMCU/VIO
USB
R30
NF
U2
VRADIO
R14
0 ohm
R25
NF
J4
J1
J7
SW1
USB POWER
EXT POWER
GND
VRADIO
VAUDIO
VMCU/VIO
Figure 2. Power Configuration
3.1.4. Expansion I/O connector
The 20-pin Expansion I/O connector J3 provides acce ss
to all the control signals of the Si4700/01/02/03
including the general purpose input/output pins. Pins for
the VA, VD, VIO, and RCLK pins of the Si4700/01/02/03
are also available. All test points on J3 are labeled
indicating the signal available at the pin.
Note: The unlabeled pins on J3 between (a) SCLK and
, and (b) RCLK and GPIO1, provide access to the
RST
system ground.
3.2. Si4700/01/02/03 Daughter Card
3.2.1. Si4700/01/02/03 FM Tuner Chip
The Si4700/01/02/03 (U1) and its bypass capacitors*
are located on the daughter card. The Si4700/01/02/03
is configured to accept a single-ended FM input—the
FMIN pin is grounded and the FMIP pin is connected to
J1 through an ac-coupling capacitor. FMIP is also
connected to the ground wire of the headphone jack
(J3) for easy testing of a headphone wire as the
antenna. Refer to “AN231: Si4700/01 Headphone and
Antenna Interface” for more information.
*Note: We recommend a single bypass capacitor on VD. To
account for various supply designs and layouts, we
recommend that customers make provisions for
bypass capacitors at all supply pins.
3.2.2. Audio Amplifier
The daughter card includes a high-output drive dual opamp chip (U2—daughter card) to buffer the audio
outputs at the LOUT and ROUT pins of the
Si4700/01/02/03. The LOUT and ROUT pins are also
ac-coupled to the inputs of the op-amps on U4 daughter card. To drive the headphone jack, the opamps are connected in a unity-gain, noninverting
configuration and biased at the middle of the audio
power supply . The outp uts of the U2 op-a mps are in turn
ac-coupled to the BNC connectors J10 and J11 on the
baseboard.
The audio amplification network has been designed to
drive resistances of 10 k which is easily achievable on
most audio analyzers. The op-amps have enough drive
capability to drive resistances much lower than 10 k
(e.g. 32 headphones). In such cases, however, the
lower end of the audio spectrum (up to 2.5 kHz) will be
attenuated. This is because the 3-dB points of the highpass filters at the outputs of the op-amps move to higher
frequencies as the output resistance is decreased. Also
note that the op-amps are not protected against
extended short-circuit conditions. Hence, the audio
outputs at J10 and J11 should not be connected to a
mono input if the Si4700/01/02/03 is configured to
produce a stereo output.
6 Rev. 0.9
Si4700/01/02/03-EVB
R30, U2
R19, R21
32.768 kHz Crystal Option R2 and R3
on bottom of Daughter Card
SW1
R14, R25
4. EVB Configuration Matrix
Table 1 lists the configuration options the EVB provides, the hardware changes necessary to implement a certain
option, and any associated constraints. Figure 3 shows the locations of the various components required to
configure the EVB.
Figure 3. Locations of Components Used to Configure the EVB
Rev. 0.9 7
Si4700/01/02/03-EVB
Table 1. EVB Configuration Matrix
# Configuration
Variable
1 Reference clock
source
2 Reference clock
source
3 Reference clock
source
4* Power supply
source
5* Power supply
source
6* Power supply
source
7 VIO source Output of U2. None (Default option). 5–26 V input using configura-
8 VIO source Direct from VMCU/VIO
Value of Configuration
Variable
Oscillator on baseboard. None (Default option). None
External clock through J6. Depopulate R19 and popu-
On-chip internal oscillator
utilizing crystal on daughter card.
USB; J1. Position switch, SW1, to
Power brick; J7. Position switch, SW1, to
Bench supply; J4. Depopulate R1, R2, and
terminal of J4.
Hardware Changes Constraints
32.768 kHz, CMOS switch-
late R21 with a 0 resistor.
Depopulate R2 and R3 from
bottom of Si4700/01/02/03
daughter card.
USB POWER.
EXT POWER.
R4.
Depopulate U2 and populate R30 with a 0 resistor.
ing levels at VIO supply level.
GPIO3 is no longer available
and XOSCEN must be
selected when starting the
GUI.
Cannot supply any voltages
via J4.
Cannot supply any voltages
via J4. Power brick must supply 5–26 V.
See Section 3.1.3.
tion option 4, 5, or 6.
3.0–3.6 V input at VMCU/VIO
terminal of J4. Can only be
used in conjunction with configuration option #6.
9 VA/VD source Output of U3. None (Default option). 5–26 V input using configura-
tion option 4, 5, or 6.
10 VA/VD source Direct from VRADIO
terminal of J5.
*Note: For more information, see Section "3.1.3. Power Supply Network" on page 5.
Depopulate R14 and populate R25 with a 0 resistor.
2.7–5.5 V input at VMCU/VIO
terminal of J4. Can only be
used in conjunction with
configuration option #6.
8 Rev. 0.9
Si4700/01/02/03-EVB
PC with USB
Port
RF Generator
Si470x FM Tuner RF
Board
Si470x FM Tuner
Baseboard
USB
Power
Connector
Headphone
Jack
Audio Anaylzer
Rout Lout
CH1
CH2
FMIP
EXT CLK
J4
EVB (as viewed
in Figures 1 & 2)
J1
J1 J3
J11 J10
BNC
Cable
SMA
Cable
J7
Power
Jack
SW1
USB POWER
EXT POWER
5. Hardware Setup
The EVB is connected to a PC, which is running the associated software, as shown in Figure 4.
1. Connect a SMA cable to the SMA connector J1 on the daughter card and apply the desired FM input.
2. Connect one end of a BNC cable to the BNC connector J10 on the baseboard. Connect the other end of
the BNC cable to an audio analyzer, amplifier, or other test equipment with an input impedance >
3. Connect one end of a BNC cable to the BNC connector J11 on the baseboard. Connect the other end of
the BNC cable to an audio analyzer, amplifier, or other test equipment with an input impedance >
4. Make sure SW1 is set for USB POWER.
5. Connect the appropriate end of the USB cable to the USB connector J1 on the baseboard.
6. Connect the other end of the USB cable to a USB port on the PC.
Figure 4. Hardware Setup
10 k.
10 k.
Rev. 0.9 9
Si4700/01/02/03-EVB
6. Getting Started—Software Installation
The Si47xx Windows GUI (graphical user interface) software is designed for use with the Si4700/01/02/03
evaluation board (EVB). The GUI software revision number is available under Help
The GUI software development program uses a host machine USB port to communicate with the Si47xx EVB and
is tested for use with Windows XP and Windows 2000.
To install, insert the Silicon Laboratories Si47xx CD into the host machine CD drive and launch Windows Explorer.
Open the CD to explore the contents in a window like the one shown in Figure 5 below.
About.
Figure 5. Installation and Setup Start Screen
Important: Open and read the Readme.doc file at this point. It may contain information that is not captured here,
and which could be very important to the functionality of the EVB or software.
Run the Setup.Exe and follow the instructions on the screen.
Note: If you get this error message: "This setup requires the .NET F ramework version 4.0," then you should in stall the .NET
Framework that is provided on the CD and re-run the setup. The GUI requires version 4.0; however, multiple versions
such as 2.0, 3.0, and 5.0 can be installed simultaneously.
After installation is finished, an Si47XXGUI icon will appear on your desktop. Launch the software by clicking this
icon on the desktop as shown in Figure 6.
Figure 6. Launching the GUI
10 Rev. 0.9
Si4700/01/02/03-EVB
6.1. Connecting to the EVB
6.1.1. Initialization
The first window will show the following connect window. This window can be accessed anytime from the top menu
by selecting File
Initialize.
Figure 7. Initialization Screen
Table 2. Initialization Screen Explanations
# Name Explanation(s)
1 Connected Board List Box If there are one or more EVBs detected, each board will be dis-
played with its corresponding part number and serial number. If
there are no EVBs connected this list box will be empty.
If your board is connected but the serial number is not displayed,
Disconnect and reconnect the EVB or press the reset button on
the EVB. If the drop down box is grayed out, then the software is
currently connected to the board with the serial number that is displayed. To disconnect from this board, select “Cancel” and then
File→Disconnect.
2 Function For the Si4700/01/02/03 boards, this drop down selection will only
allow “FM Receiver.”
3 Boot Mode
4 Reset This option is only available if the board was previously initialized
Load Firmware from Device—will boot the chip using the
firmware from NVRAM in the device.
Initialize Only—will perform an open and reset but will not boot
the chip.
with the “Initialize Only” option. When selected, the Si470x is reset
before performing the selected action. By not selecti ng this optio n,
it is possible to make changes to the r egister map prior to enabling
the device.
Rev. 0.9 11
Si4700/01/02/03-EVB
Table 2. Initialization Screen Explanations (Continued)
# Name Explanation(s)
5 Bus Mode Selects the communication mode used to communicate with the
part in either 2-Wire or 3-Wire mode.
6 Internal Oscillator If checked then the Daughter card crystal and on-chip oscillator
will be used to clock the Si4700/01/02/03. If the default is
unchecked, use the baseboard oscillator. Refer to Table 1, “EVB
Configuration Matrix,” on page 8 for important oscillator information. Note that the on-chip oscillator is only available on revision B
silicon or later.
7 Auto Boot If checked, the next time the GUI starts and only one EVB is
connected, the initialize screen will not appear and the part will be
booted automatically using the previous settings. This may be
changed by selecting File
8 Initialize/Cancel Buttons Press Initialize to activate the chip with the selected options
Press Cancel to exit.
9 Details Button Not available with Si4700/01/02/03 parts.
Initialize and unchecking the box.
6.1.2. Board Discovery Bus Mode
The initialize process can be configured to use either 2-wire or 3-wire bus mode. This can be configured by
selecting File
This feature is useful when using the Silabs EVB and GUI to control a prototype that is designed to use one bus
mode only.
Board Discovery Bus Mode.
12 Rev. 0.9
6.2. Running the Software
1
2
3
4
5
6
7
8
6.2.1. FM Receiver Main Window
The FM receiver main window will appear after initialization.
Figure 8. FM Receiver Main Window
Si4700/01/02/03-EVB
Table 3. FM Receiver Main Window Descriptions
# Name Explanation(s)
1 Tune/Seek Tune Down (<), Tune Up (>) buttons execute a single channel step according
to the channel spacing setting. The channel spacing setting can be set in the
property window.
Seek Down (<<), Seek Up (>>) buttons execute a seek up or down to the next
received FM signal meeting or exceeding the seek settings within the selected
band. The seek setting Received Signal Strength Indicator (RSSI) threshold
can be set in the property window.
2 Frequency Slider Bar,
Mono/Stereo, AFC Rail
3 Volume, Mute Select the Si4700 output volume (0-15) by moving the slider bar pointer. Press
4 Auto Scan, To Presets,
Select Stn
The Frequency Display indicates the frequency in MHz. To change the
Frequency, drag the pointer in the Frequency Slider Bar to the desired
frequency. The frequency may also be changed by changing the value in the
display.
AFC Rail indicator will be red if the tuned frequency is in an AFC rail state,
otherwise the indicator will be grey.
The Stereo / Mono Indicator is a tri-state indicator displaying “Stereo” (green),
“Mono” (grey), or forced “Mono” (Yellow). The Stereo / Force Mono state can
be selected by (7).
the Mute button to mute the radio. If the radio is muted, the button will be red.
Press the Mute button again to remove the muting.
The Auto Scan button will find all the stations that meet the seek threshold
settings in the property window.
Rev. 0.9 13
Si4700/01/02/03-EVB
Table 3. FM Receiver Main Window Descriptions (Continued)
# Name Explanation(s)
5 Presets Press the desired button to tune to the frequency displayed on the button. To
store a new value to the preset button, tune to the desired freq uency and then
press and hold the desired button for 1.5 seconds. The button will then change
to indicate the stored frequency.
6 RSSI The RSSI displays the received signal strength of the signal in dBμV.
7 Mono/Stereo Select
Button
8 RDS Data
(PT/RT/RDS Indicator)
By default, the receiver is configured for stereo mode. To force mono, click the
button. To return to stereo mode, click the button again.
Provides a summary of the current RDS data if available. PS contains the
Program Service text, RT cont ains the Radio Text, and the RDS indicator turns
green when RDS data has been synchronized. For more RDS data select
Window
RDS Receive Data.
14 Rev. 0.9
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