solution, including pre-standard
(legacy) PoE support
Highly-integrated IC enables
compact solution footprints
Minimal external components
Integrated diode bridges and
transient surge suppressor
Integrated switching regulator
controller with on-chip power
FET
Integrated dual current-limited
hotswap switch
Support non-isolated and
isolated switching topologies
Comprehensive protection
circuitry
Transient overvoltage
protection
Undervoltage lockout
Early power-loss indicator
Thermal shutdown protection
Foldback current limiting
Programmable classification
circuit
Low-profile 5 x 5 mm 20-pin QFN
Pb-Free and RoHS-compliant
Applications
Voice over IP telephones and
adapters
Wireless access points
Security cameras
Point-of-sale terminals
Internet appliances
Network devices
High power applications (Si3401)
Description
The Si3400 and Si3401 integrate all power management and control
functions required in a Power-over-Ethernet (PoE) powered device (PD)
application. The Si3400 and Si3401 convert the high voltage supplied over
the 10/100/1000BASE-T Ethernet connection into a regulated, low-voltage
output supply. The optimized architectures of the Si3400 and Si3401
minimize the solution footprint, reduce external BOM cost, and enable the
use of low-cost external components while maintaining high performance.
The Si3400 and Si3401 integrate the required diode bridges and transient
surge suppressors, thus enabling direct connection of ICs to the Ethernet
RJ-45 connector. The switching power FET and all associated functions are
also integrated. The integrated switching regulator supports isolated
(flyback) and non-isolated (buck) converter topologies. The Si3400 and
Si3401 support IEEE STD™ 802.3-2005 (future instances are referred to as
802.3) compliant solutions as well as pre-standard products, all in a single
IC. Standard external resistors connected to the Si3400 and Si3401 provide
the proper 802.3 signatures for the detection function and programming of
the classification mode. Startup circuits ensure well-controlled initial
operation of both the hotswap switch and the voltage regulator. The Si3400
and Si3401 are available in low-profile, 20-pin, 5 x 5 mm QFN packages.
While the Si3400 is designed for applications up to 10 W, the Si3401 is
optimized for higher power applications (up to approximately 15 W). See
also “AN313: Using the Si3400/01 in High Power Applications” for more
information.
Ordering Information:
See Ordering Guide on page
page 18.
Pin Assignments
5x5mm QFN
(Top View)
1
VPOSS
VSS1
SWO
VSS2
FB
1
EROUT
2
SSFT
VDD
ISOSSFT
3
2
4
VNEG
(PAD)
5678
HSO
RDET
PLOSS
Notes:
1. Pin VSSA added on revisions CZ
and higher.
2. Pin ISOSSFT added on revisions
CZ and higher. Function
available on revision E silicon.
For Rev CZ, or to disable this
feature on Revision E, tie this pin
to VDD.
Note: Unless otherwise noted, all voltages referenced to VNEG. All minimum and maximum specifications are guaranteed
and apply across the recommended operating conditions. Typical values apply at nominal supply voltage and ambient
temperature unless otherwise noted.
Table 2. Absolute Maximum Ratings (DC)
TypeDescriptionRatingUnit
VoltageCT1 to CT2–60 to 60
SP1 to SP2–60 to 60
2
VPOS
HSO–0.3 to 60
VSS1 or VSS2–0.3 to 60
SWO–0.3 to 60
PLOSS
RDET–0.3 to 60
RCL–0.3 to 5
SSFT to VPOS
EROUT to VSS1, VSS2, or VSSA–0.3 to VDD+0.3
FB to VPOS–5 to 0.3
RIMAX to VSS1, VSS2, or VSSA–0.3 to VDD+0.3
VSS1 to VSS2 or VSSA–0.3 to 0.3
VDD to VSS1, VSS2, or VSSA–0.3 to 5
Notes:
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum
ratings are exceeded. Functional operation should be restricted to those conditions specified in the operational sections
to VPOS
2
2
1
–0.3 to 60
–60 to 0.3
–5 to 0.3
V
4Preliminary Rev. 0.91
Table 2. Absolute Maximum Ratings (DC)1 (Continued)
TypeDescriptionRatingUnit
CurrentRCL0 to 100
RDET0 to 1
CT1, CT2, SP1, SP2–400 to 400
2
VPOS
HSO0 to 400
PLOSS
VDD0 to 2
SWO0 to 400
VSS1, VSS2, or VSSA–400 to 0
Si3400/Si3401
–400 to 400
mA
–0.5 to 5
Ambient
Temperature
Notes:
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum
ratings are exceeded. Functional operation should be restricted to those conditions specified in the operational sections
of this data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect device
reliability.
2. VPOS is equal to VPOSF and VPOSS tied together for test condition purposes.
Storage–65 to 150
Operating–40 to 85
°C
Preliminary Rev. 0.915
Si3400/Si3401
Table 3. Absolute Maximum Ratings (Transient)
Transient surge defined in IEC60060 as a 1000 V impulse of either polarity applied across CT1–CT2 or SP1–SP2. The shape of
the impulse shall have a 300 ns full rise time and a 50 µs half fall time, with 201 Ω source impedance.
1
TypeDescriptionRatingUnit
VoltageCT1 to CT2–82 to 82
SP1 to SP2–82 to 82
2
VPOS
–0.7 to 80
HSO–0.7 to 80
V
VSS1, VSS2, or VSSA–0.7 to 80
SWO–0.7 to 80
PLOSS
to VPOS
2
–80 to 0.7
RDET–0.7 to 80
CurrentCT1, CT2, SP1, SP2–5 to 5
2
VPOS
Notes:
1. Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum
ratings are exceeded. Functional operation should be restricted to those conditions specified in the operational sections
of this data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect device
reliability.
2. VPOS is equal to VPOSF and VPOSS tied together for test condition purposes.
–5 to 5
A
Table 4. Surge Immunity Ratings
1,2,3
TypeDescriptionRatingUnit
4
CDE
Cable discharge event tolerance–3.5 to 3.5kV
ESD (System-Level) Air discharge (IEC 61000-4-2)–16.5 to 16.5kV
Contact discharge (IEC 61000-4-2)–8 to 8kV
ESD (CDM)JEDEC (JESD22-C101C)–1 to 1kV
ESD (HBM)JEDEC (JESD22-A114E)–500 to 500V
ESD (MM)JEDEC (JESD22-A115A)–100 to 100V
Telephony Voltage
IEEE 802.3, Clause 33.5.6175Vp
Compatibility
Notes:
1. Permanent device damage may occur if the maximum ratings are exceeded. Functional operation should be restricted
to those conditions specified in the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may adversely affect device reliability.
2. For more information regarding system-level surge tolerance, refer to “AN315: Robust Electrical Surge Immunity for
PoE PDs through Integrated Protection”.
3. Designs must be compliant with the PCB layout and external component recommendations outlined in the Si3400/01
EVB User’s Guides and AN296.
4. J. Deatherage and D. Jones, “Multiple Factors Trigger Cable Discharge Events in Ethernet LANs,” Electronic Design
Dec. 4, 2000.
6Preliminary Rev. 0.91
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