Page 1
5
3.3V
R1
2.5VSDA
D D
2.5VSCL
C C
B B
316,1%
1K,1%
316,1%
1K,1%
C2
0.1uF
C6
0.1uF
SDVO_SCL2,3
SDVO_SDA2,3
1uF
C5
1uF
R7
5.6K
SDVOB_R+2,3
SDVOB_R-2,3
SDVOB_G+2,3
SDVOB_G-2,3
SDVOB_B+2,3
SDVOB_B-2,3
SDVOB_C+2,3
SDVOB_C-2,3
R2
3.3V
R4
R5
C1
12V
3.3V
B1
12V
B2
12V
B3
RSVD
B4
GND
B5
NC(B5)
B6
NC(B6)
B7
GND
B8
3.3V
B9
R8
5.6K
3.3V 12V
NC(B9)
B10
NC(B10)
B11
NC(B11)
KEY KEY
B12
RSVD(B12)
B13
GND
B14
SDVOB_RED+
B15
SDVOB_RED-
B16
GND
B17
SDVO_CtrlCLK
B18
GND
B19
SDVOB_GREEN+
B20
SDVOB_GREEN-
B21
GND
B22
GND
B23
SDVOB_BLUE+
B24
SDVOB_BLUE-
B25
GND
B26
GND
B27
SDVOB_CLK+
B28
SDVOB_CLK-
B29
GND
B30
RSVD(B30)
B31
SDVO_CtrlDATA
B32
GND
C12
0.1uF
CON1
C13
10uF
4
SILKSCREEN :
Note : - TM P i s a dd ed to S ch em at ic # o n P CB to sig ni fy Turnkey Mass Production.
Also Silkscreen for PCB Revision may change based on Gerber version used.
NC(A1)
12V
12V
GND
NC(A5)
TDI
TDO
NC(A8)
3.3V
3.3V
RESET#
GND
NC(A13)
NC(A14)
GND
SDVO_TVCLKin+
SDVO_TVCLKin-
GND
RSVD(A19)
GND
SDVOB_INT+
SDVOB_INT-
GND
GND
SDVO_STALL+
SDVO_STALL-
GND
GND
NC(A29)
NC(A30)
GND
RSVD(A32)
SDVO/PCI-EX4
C15
C14
10uF
0.1uF
ORION ADD2-N DUAL PAD x16 CARD
SiI-SC-0066-B1-TMP PCB Rev 1.45
SiI-GE-0046-B1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
SDVOB_INT+ 2
SDVOB_INT- 2
3
RESET# 2,3
3.3V PVCC POWER SUPPLY
5V POWER SUPPLY
1.8V POWER SUPPLY
12V
2
C3
10uF
12V
C7
10uF
3.3V
LM317EMP/SOT-223
U1
3
VIN
OUTPUT
VOUT
ADJ
1
U2
1
VIN
2
VOUT
3 6
VOUT VOUT
4
ADJ
LM317L/SOIC 8
C9
10uF
2
4
R3
240,1%
R6
412,1%
8
NC
7
VOUT
5
NC
U3
3 2
VIN OUTPUT
1
TAB
GND
LM1117 1.8/SOT-223
4
R9
240,1%
R10
732,1%
1
PVCC
C4
10uF
5.0V
C8
10uF
1.8V
C10
10uF
PHYSICAL LENGTH OF X16 CONNECTOR
IS REQUIRED. SIGNALS BEYOND X4 SDVO
SHOULD BE BARE.
A A
ORION ADD2-N DUAL PAD x16 REFERENCE DESIGN
5
4
3
2
Title
PCI EX x4 CONN + POWER SUPPLY
Size Document Number Rev
SiI-SC-0066 B1
B
Date: Sheet
14Tuesday, April 20, 2004
1
of
Page 2
5
4
3
2
1
TO SiI1362 48pin LQFP
D D
SDVOB_INT+1
SDVOB_INT-1
C C
SDVOB_R+1,3
SDVOB_R-1,3
SDVOB_G+1,3
SDVOB_G-1,3
SDVOB_B+1,3
SDVOB_B-1,3
SDVOB_C+1,3
SDVOB_C-1,3
3.3V
B B
R23
R24
A A
1K(NP)
1K
NO_STUFF
SDADDC3,4
SCLDDC3,4
SDAROM4
SCLROM4
0.1uF
RESET#1,3
SDVO_SCL1,3
SDVO_SDA1,3
EXT_RES 3
EXT_SWING 3
A1 3
VCC 3
AVCC 3
PVCC1 3
PVCC2 3
SVCC 3
SPVCC 3
S_INT+ 3
S_INT- 3
TXC+* 3
TXC-* 3
C20
C210.1uF
R22 1K
64PIN TQFP
S_INT+
S_INT-
EXT_RES
A1
TEST
SiI1364
46
47
51
52
54
55
57
58
60
61
49
12
11
13
14
40
U4
1
7
6
8
TX2+
SDI+
SDI-
SDR+
SDR-
SDG+
SDG-
SDB+
SDB-
SDC+
SDC-
EXT_RES
RESET#
SDSCL
SDSDA
A1
SDADDC
SCLDDC
SDAROM
SCLROM
TEST
TX2-
3435364243444
RR9
TX1-
TX1+
RSVD9
RSVD8
RR8
RR7
TXC+*
TX0-
TX0+
RSVD7
RSVD5
RR5
RR4
22
R12
TXC-*
TXC+
RSVD4
RR3
R13
300
R14
300
R15
300
R16 300
312019232226252928
TXC-
RSVD3
RR2
R11 22
EXT_SWING
HTPLG
VCC
VCC
EXT_SWING
VCC
VCC
GND
GND
RSVD0
RSVD6
AVCC
AVCC
AGND
AGND
AGND
OVCC
PVCC1
PGND1
PVCC2
PGND2
SVCC
SVCC
GND
GND
SGND
SGND
SPVCC
SPGND
RSVD2
RSVD1
3
RR1
0.1uF
0.1uF
0.1uF
0.1uF
C16
C17
C18
C19
For 1364 : R11, R12 = 22ohm
For 1362 : R11, R12 = 0ohm
R18
360
39
9
15
48
38
5
10
2
37
21
27
18
24
30
64
17
16
32
33
50
56
41
45
53
59
62
63
RR0
RR6
VCC
C49
100pF
C22
100pF
C31
100pF
C44
100pF
C50
1nF
C23
1nF
C32
1nF
C45
1nF
SPVCC
C51
10uF
C24
0.1uF
C33
0.1uF
C46
0.1uF
L6 BEAD
TX2+ 3,4
TX2- 3,4
TX1+ 3,4
TX1- 3,4
TX0+ 3,4
TX0- 3,4
C26
C25
0.1uF
1nF
AVCC
C34
1nF
SVCC
C47
1nF
PVCC
C35
10uF
C48
10uF
RULES
Route traces with 100 Ohm Differential Impedance
Avoid placing GND Copper or traces adjacent to TMDS Trace
Put these 4 resistors and 4 c apacitors as close as possible
to the TMDS output pins of the SiI1362/4
TXC+ 4
TXC- 4
1.8V
C27
1nF
L2 BEAD
PVCC2
L5 BEAD
C28
0.1uF
1.8V
3.3V
C41
0.1uF
C29
1nF
C42
1nF
C30
10uF
C43
L4 BEAD
1uF
L1 BEAD
PVCC1
PVCC
C36
1uF
RR0
RR1
RR2
RR3
RR4
RR5
RR6
RR7
RR8
RR9
C38
0.1uF
C37
10uF
3.3V
R17
2.2K(NP)
R19
330(NP)
C39
1nF
NO_STUFF
HPDET 3,4
3.3V
C40
1uF
PVCC
L3 BEAD
ORION ADD2-N DUAL PAD x16 REFERENCE DESIGN
5
4
3
Title
SiI1364PIN TQFP PACKAGE
Size Document Number Rev
SiI-SC-0066 B1
B
2
Date: Sheet
23Tuesday, April 20, 2004
1
of
Page 3
5
4
3
TX2+ 2,4
TX2- 2,4
TX1+ 2,4
2
1
D D
S_INT+2
S_INT-2
C C
B B
NO_STUFF
SDVOB_R+1,2
SDVOB_R-1,2
SDVOB_G+1,2
SDVOB_G-1,2
SDVOB_B+1,2
SDVOB_B-1,2
SDVOB_C+1,2
SDVOB_C-1,2
EXT_RES2
RESET#1,2
SDVO_SCL1,2
SDVO_SDA1,2
A12
SDADDC2,4
SCLDDC2,4
32
33
37
38
40
41
43
44
46
47
35
30
U7
2
5
4
6
9
8
TX2+
SDI+
SDI-
SDR+
SDR-
SDG+
SDG-
SDB+
SDB-
SDC+
SDC-
EXT_RES
RESET#
SDSCL
SDSDA
A1
SDADDC
SCLDDC
TEST
251413171620192322
HTPLG
TX0-
TX1-
TX2-
TXC-
TX0+
TX1+
TXC+
EXT_SWING
OVCC
AVCC
AVCC
AGND
AGND
PVCC1
AGND
PVCC2
PGND2
SVCC
SVCC
SPVCC
SPGND
VCC
VCC
VCC
GND
GND
GND
GND
EXT_SWING 2
48PIN TQFP PAD WITHIN 64PIN PA D
29
10
28
34
31
7
1
15
21
18
24
11
12
26
27
36
42
39
45
48
3
TX1- 2,4
TX0+ 2,4
TX0- 2,4
TXC+* 2
TXC-* 2
HPDET
AVCC
PVCC1
PVCC2
SVCC
SPVCC
HPDET 2,4
VCC
VCC 2
3.3V
AVCC 2
PVCC1 2
PVCC2 2
SVCC 2
SPVCC 2
SiI1366/62
48PIN LQFP
A A
ORION ADD2-N DUAL PAD x16 REFERENCE DESIGN
Title
SiI1366/SiI1362 48pin LQFP
Size Document Number Rev
Sil-SC-0066 B1
B
5
4
3
2
Date: Sheet
34Tuesday, April 20, 2004
1
of
Page 4
5
383736
D D
TXC-2
TXC+2
TX2-
TX2-2,3
TX2+
TX2+2,3
SCLDDC
SDADDC
TX1-
TX1-2,3
TX1+
TX1+2,3
TXCTXC+
CON2
1
2
3
4
5
6
7
8
9
10
11
12
35
DATA2
DATA2
GND
SHIELD24
DATA4
DATA4
DDCCLK
DDCDATA
NC
DATA1
DATA1
SHIELD13
DATA3
DVI-D SHIELDED
GND
GND
SHIELD05
SHIELDCLK
DATA3
VCC5
GND
GND5
HPDET
DATA0
DATA0
DATA5
DATA5
Shell
Shell
CLK
CLK
4
13
14
15
16
17
18
19
20
21
22
23
24
25
26
C53
0.1uF
C54
10uF
3
L7 BEAD
5.0V
0.1uF
2
3.3V
C52
U5
1
A0
VCC
2
A1
WP
3
A2
SCL
4 5
VSS SDA
24LC02
1
For 1364 : FLASH
EEPROM TO
8
7
6
ADD2-N-C02_01.SPD
SCLROM 2
SDAROM 2
C C
TX0+2,3
TX0-2,3
HPDET2,3
B B
A A
5
TX0+
TX0-
R29
10K
HOTPLUG INPUT IS
OPTIONAL.IT REQUIRES
MANUAL PROGRAMMING
OF THE SiI1364/1362/66
SDADDC2,3
SCLDDC2,3
ORION ADD2-N DUAL PAD x16 REFERENCE DESIGN
4
3
2
5.0V
5.0V
R31
R30
2.2K
2.2K
SDADDC
SCLDDC
Title
DVI CONN, HOTPLUG & EEPROM
Size Document Number Rev
SiI-SC-0066 B1
B
Date: Sheet
44Tuesday, April 20, 2004
1
of
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