Silan
Semiconductors
SC16232
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.0 2002.04.26.
1
RAM MAPPING 32x4 LCD
CONTROLLER FOR I/O µC
DESCRIPTION
The SC16232 is a 128 pattern(32x4), memory mapping, and multifunction LCD driver. The S/W configuration feature of the SC16232
makes it suitable for multiple LCD applications including LCD
modules and display subsystems. Only three or four lines are
required for the interface between the host controller and the
SC16232. The SC16232 contains a power down command to reduce
power consumption.
FEATURES
* Operating voltage: 2.4V ~ 5.2V
* Built-in 256kHz RC oscillator
* External 32.768kHz crystal or 256kHz frequency source input
* Selection of 1/2 or 1/3 bias, and selection of 1/2 or 1/3 or 1/4 duty
LCD applications
* Internal time base frequency sources
* Two selectable buzzer frequencies(2kHz/4kHz)
* Power down command reduces power consumption
* Built-in time base generator and WDT
* Time base or WDT overflow output
* 8 kinds of time base/WDT clock sources
* 32x4 LCD driver
* Built-in 32x4 bit display RAM
* 3-wire serial interface
* Internal LCD driving frequency source
Chip Topography
ORDERING INFORMATION
Device Package
SC16232 COB
* Software configuration feature
* Data mode and command mode
instructions
* R/W address auto increment
* Three data accessing modes
* VLCD pin for adjusting LCD operating
voltage
Silan
Semiconductors
SC16232
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.0 2002.04.26.
2
PAD ASSIGNMENT
SEG 0
SEG 1
SEG 2
DATA
V
SS
OSCO
V
DD
OSCI
SEG 3
SEG 4
SEG 5
SEG 6
SEG 8
SEG 9
SEG 10
SEG 11
SEG 12
SEG 13
SEG 14
SEG 15
SEG 7
SEG 16
SEG 17
SEG 18
SEG 19
SEG 20
SEG 21
SEG 22
SEG 23
SEG 24
SEG 25
SEG 26
SEG 27
SEG 28
COM2
COM3
SEG31
SEG30
SEG29
COM0
COM1
VLCD
WR
RD
IRQ
BZ
BZ
CS
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
2 3 4
5 6 7 8 9
12
13
14
15
16
17
18
19
32 31 30 29 28 27 26 25 24 23 22 21 20
11
SC16232
10
Note: The IC substrate should be connected to VDDin the PCB layout artwork.
BLOCK DIAGRAM
14
16
9
10
11
12
17
13
19
20
Control
and
Timing
Circuit
Tone Frequency
Generator
Display RAM
LCD Driver/
Bias Circuit
21
24
8
25
16
Watchdog Timer
and
Time BaseGenerator
18
COM0
COM3
SEG0
SEG31
V
LCD
BZ
V
SS
V
DD
DATA
OSCI
OSCO
CS
RD
WR
BZ
IRQ
Notes:CS: Chip selection ; BZ,BZ: Tone outputs ;WR,RD, DATA: Serial interface
COM0 ~ COM3; SEG) ~ SEG31: LCD outputs ;
IRQ
: Time base or WDT overflow output
Silan
Semiconductors
SC16232
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.0 2002.04.26.
3
ABSOLUTE MAXIMUM RATING
Characteristic Symbol Value Unit
Supply Voltage V
DD
-0.3 ~ 5.5 V
Input Voltage V
IN
Vss-0.3~VDD+0.3 V
Storage temperature T
STG
-50 ~ +125
°C
Operating Temperature T
OPR
-25~+75
°C
D.C. ELECTRICAL CHARACTERISTICS
(Tamb=25°C, Unless otherwise specified)
Test conditions
Parameter Symbol
V
DD
Conditions
Min Typ Max Unit
Operating Voltage V
DD
-- -- 2.4 -- 5.2 V
3V -- 150 300
µA
I
DD1
5V
No load/LCD ON
On-chip RC oscillator
-- 300 600
µA
3V -- 60 120
µA
I
DD2
5V
No load/LCD ON
Crystal oscillator
-- 120 240
µA
3V -- 100 200
µA
Operating Current
I
DD3
5V
No load/LCD ON
External clock source
-- 200 400
µA
3V -- 0.1 5
µA
Standby Current I
STB
5V
No load
Power down mode
-- 0.3 10
µA
3V 0 -- 0.6 V
Input Low Voltage V
IL
5V
DATA,
WR,CS,RD
0--1.0V
3V 2.4 -- 3.0 V
Input High Voltage V
IH
5V
DATA,
WR,CS,RD
4.0 -- 5.0 V
3V VOL=0.3V 0.5 1.2 -- mA
DATA, BZ,BZ,
IRQ
I
OL1
5V VOL=0.5V 1.3 2.6 -- mA
3V VOH=2.7V -0.4 -0.8 -- mA
DATA, BZ,
BZ
I
OH1
5V VOH=4.5V -0.9 -1.8 -- mA
3V VOL=0.3V 80 150 --
µA
LCD Common Sink Current I
OL2
5V VOL=0.5V 150 250 --
µA
3V VOH=2.7V -80 -120 --
µA
LCD Common Source Current I
OH2
5V VOH=4.5V -120 -200 --
µA
3V VOL=0.3V 60 120 --
µA
LCD Segment Sink Current I
OL3
5V VOL=0.5V 120 200 --
µA
3V VOH=2.7V -40 -70 --
µA
LCD Segment Source Current I
OH3
5V VOH=4.5V -70 -100 --
µA
3V 40 80 150
kΩ
Pull-high Resistor R
PH
5V
DATA,
WR,CS,RD
30 60 100
kΩ
Silan
Semiconductors
SC16232
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.0 2002.04.26.
4
A.C. ELECTRICAL CHARACTERISTICS
(Tamb=25°C, Unless otherwise specified)
Test conditions
Parameter Symbol
V
DD
Conditions
Min Typ Max Unit
3V -- 256 -- kHz
System Clock f
SYS1
5V
On-chip RC oscillator
-- 256 -- kHz
3V -- 32.768 -- kHz
System Clock f
SYS2
5V
Crystal oscillator
-- 32.768 -- kHz
3V -- 256 -- kHz
System Clock f
SYS3
5V
External clock source
-- 256 -- kHz
-- On-chip RC oscillator -- f
SYS1
/1024 -- Hz
-- Crystal oscillator -- f
SYS2
/128 -- Hz
LCD Clock f
LCD
-- External clock source -- f
SYS3
/1024 -- Hz
LCD Common Period t
COM
-- n: Number of COM -- n/f
LCD
-- S
3V -- -- 150 kHz
Serial Data Clock (WRpin)
f
CLK1
5V
Duty cycle 50%
-- -- 300 kHz
3V -- -- 75 kHz
Serial Data Clock (RDpin)
f
CLK2
5V
Duty cycle 50%
-- -- 150 kHz
Tone Frequency f
TONE
-- On-chip RC oscillator -- 2.0 or 4.0 -- kHz
Serial Interface Reset Pulse Width
(Figure 3)
t
CS
--
CS
-- 250 -- nS
Write mode 3.34 -- --
3V
Read mode 6.67 -- --
µS
Write mode 1.67 -- --
WR,RD
Input Pulse Width
(Figure 1)
t
CLK
5V
Read mode 3.34 -- --
µS
3V
Rise/Fall Time Serial Data Clock
Width (Figure 1)
t
R,tF
5V
-- -- 120 -- nS
3V
SetupTimeforDATAtoWR,
RD
Clock Width (Figure 2)
t
su
5V
-- -- 120 -- nS
3V
Hold Time for DATA toWR,
RD
Clock Width (Figure 2)
t
h
5V
-- -- 120 -- nS
3V
SetupTimeforCStoWR,
RD
Clock Width (Figure 3)
t
su1
5V
-- -- 100 -- nS
3V
Hold Time forCStoWR,RDClock
Width (Figure 3)
t
h1
5V
-- -- 100 -- nS
Silan
Semiconductors
SC16232
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.0 2002.04.26.
5
WR,RD
Clock
90%
50%
10%
t
F
t
R
t
CLK
t
CLK
V
DD
GND
Figure 1
50%
GND
V
DC
GND
V
DC
Clock
WR,RD
DB
VALID DATA
50%
t
h
t
SL
Figure 2
50%
CS
WR,RD
Clock
50%
LAST
Clock
FIRST
Clock
GND
V
DC
GND
V
DC
t
CS
t
h1
t
su1
Figure 3
PAD DESCRIPTION
Pad No. Symbol I/O Description
1
CS
I
Chip selection input with pull-high resistor.
When the
CS
is logic high, the data and command read from or
written to the SC16232 are disabled. The serial interface circuit is also
reset. But if
CS
is at logic low level and is input to theCSpad, the
data and command transmission between the host controller and the
SC16232 are all enabled.
2
RD
I
READ clock input with pull-high resistor.
Data in the RAM of the SC16232 are clocked out on the falling edge of
the
RD
signal. The clocked out data will appear on the DATA line.
The host controller can use the next rising edge to latch the clocked
out data.
(to be continued)
Silan
Semiconductors
SC16232
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.0 2002.04.26.
6
PAD DESCRIPTION (continued)
Pad No. Symbol I/O Description
3
WR
I
WRITE clock input with pull-high resistor.
Data on the DATA line are latched into the SC16232 on the rising
edge of the
WR
signal.
4 DATA I/O Serial data input/output with pull-high resistor.
5VSS-- Negative power supply, GND.
7OSCII
6OSCOO
The OSCI and OSCO pads are connected to a 32.768kHz crystal in
order to generate a system clock. If the system clock comes from an
external clock source, the external clock source should be connected
to the OSCI pad. But if an on-chip RC oscillator is selected instead,
the OSCI and OSCO pads can be left open,
8V
LCD
I LCD power supply.
9VDD-- Positive power supply.
10
IRQ
O Time base or WDT overflow flag, NMOS open drain output.
11,12
BZ,
BZ
O 2kHz or 4kHz tone frequency output pair.
13 ~16 COM0 ~ COM3 O LCD common outputs.
48 ~17 SEG0 ~ SEG31 O LCD segment outputs.
FUNCTIONAL DESCRIPTION
1. DISPLAY MEMORY – RAM
The static display memory(RAM) is organized into 32x4 bits and stores the displayed data. The contents of the
RAM are directly mapped to the contents of the LCD driver. Data in the RAM can be accessed by the READ, WRITE
and READ-MODIFY-WRITE commands. The following is a mapping from the RAM to the LCD pattern:
COM3 COM2 COM1 COM0
SEG0
0
SEG1
1
SEG2
2
SEG3
3
SEG31
31
D3 D2 D1 D0
Addr
Data
Address 6 bits
(A5,A4,…,A0)
Data 4 bits (D3,D2,D1,D0)
RAM mapping
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