PEB 2023
PEF 2023
Revision History: Original Version: Data Sheet 08.97
Previous Releases:Data Sheet 02.97
Page Subjects (changes since last revision)
all PagesAdditional to the normal temperatur e range devices PEB 2023 also the extended
temperature range devices PEF 2023 are specified in this Data Sheet.
21The ambient temperature under bias is separately defined for PEB 2023 and PEF
2023.
22The maximum limit values for line regulation
V
REF Line
and load regulation V
REF Load
are reduced. The typical values are adapted.
f
22The maximum limit value for voltage stability of
is reduced. The typical value is
OSC
adapted.
T
22The test condition ambient temperature range
V
stability of
REF
and f
23The sense voltage
V
.
OSC
of the current limit comperator is separately defined for
Sense
is extended for temperature
A
PEB 2023 and PEF 2023.
Edition 08.97
This edition was realized using the software system FrameMaker.
Published by Siemens AG,
HL TS,
Balanstraße 73,
81541 Münc hen
As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes
and circui ts imp lem en te d with in co mpo ne nt s or ass emb li es.
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
For q uest io ns on tec hnolo gy , del i very an d pr ices pl ease c onta ct the Sem ico ndu ct or Gro up Offi ces i n Ger many o r th e Siem ens C ompa nies
and Representat iv es worldwide (se e address list ).
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact
your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC manufacturer.
Packing
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Compone nts use d in life-s upp ort de vi ces or sy stem s mu st be expres sl y authori z ed for such purpo se !
Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express
written approval of the Semiconductor Group of Siemens AG.
1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the
failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.
2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain hu -
man life. If they fail, it is reasonable to assume that the health of the user may be endangered.
The PEB/F 2023 is a pulse width modulator circuit designed for fixed-frequency
switching regulators with ver y low power consum ption.
In telephone and ISDN-systems a high conversion yield is crucial to maintain
functionality in all supply conditions via S- or U-inter fa ces. The PEB/ F 2023 design and
technology realizes high conver sion efficiency and low power dissipation. The PEB/F
2023 is fully comp atible with the ITU-power recommenda tions of the S-interface. For
these reasons the PEB/F 2023 is especially suited for telephone and ISDNenvironments.
Coupled with a few external components it can provide a stable 5V DC-supply for
subscriber terminals (TE’s) or network terminators (NT’s). It can additionally be
programmed f or higher out put voltages , e.g. to supply the S-lines.
It should be recognized that the PEB/F 2023 can also be used in num erous DC/DCconversion syste ms other than ISDN-power supplies. For examp le, in a special supply
voltage range the PEB/F 2023 can be supplied from a 12V battery.
For detailed technical information abou t "Process ing Guidel i nes" and
"Quality Assurance" for ICs, see our "Product Overview".
Semiconductor Group408.97
ISDN DC Converter Circuit
IDCC
PEB 2023
PEF 2023
Data SheetSPT 75 R
P-DSO-14
1.1Features
• Switched Mode DC/DC Converter
• ITU ISDN Compatible
• Low Power Dissipation
• Supply Voltage Range 0: 8V to 16V
Supply Voltage Range 1: 12V to 80V
Supply Voltage Range 2: 22V to 90V
(pin striping selects between range 1 and range 2)
Supply Voltage Range 3, with shifting by an external zener diode: U
(minimum zener voltage U
= 14V)
ZD
• Programmable Overcurrent Protection
• Soft Start
• Power Housekeeping Input
• Input Undervoltag e Detect ion
• High Input Impedance (<10µA) During Undervoltage Condition
3GNDIAll analog and digital signals are referred to this pin.
4GAOOutput of the FET-driver.
5
6
7
V
C
V
EXT
SS
S
OOutput of the 4V reference voltage.
I
When the voltage difference between
I
and GND
P
exceeds 100mV, the digital cur rent limiting
becomes active and turns off the external FET for
the rest of this oscillator period.
I/OOutput of the internal supply. Via V
the internal
EXT
low-voltage-circuits can be supplied from an
external DC-supply in order to reduce chip power
dissipation. In supply voltage range 0 the positive
supply voltage must be connected via a resistor to
this pin.
IThe capacitor at this pin determines the soft-start
characteristic.
IVS is the positive input voltage for supply volt age
range 1, 2 and 3. Must be connected to GND via a
resistor when using supply voltage range 0.
8COMPOError amplifier output and Pulse Width Modulator
(PWM) input for loop stabili zation network.
9
10
V
P
V
N
INon-inverting input of the error amplifier.
IInverting input of the error amplifier.
11UVIInput undervoltage lockout. The input undervoltage
lockout level depends on the used supply voltage
V
range. Must be connected to pin
when using
S
supply voltage range 0.
12UVxIIf this pin is connected to UV, then supply range 1 is
selected. If this pin is not connected (floating), then
supply range 2 or supply range 3 can be used. Must
V
be connected to pin
when using supply voltage
EXT
range 0.
13SYNCI/OInput for synchronization of the oscillator to an
external frequency, or output to synchronize
multiple devices .
14RCIThe external timing components of the ramp
generator are attached to this pin.
Semiconductor Group708.97
1.4Functional Block Diagram
PEB 2023
PEF 2023
Overview
IP
100 mV
CURRENT LIMITING
GA
OUTPUT DRIVER
SAWTOOTH
OSCILLATOR
AMPL.
ERROR
PWM
SYNC
RC
P
V
N
V
COMP
Figure 1
Block Diagram
EXT
V
V
SS
LOGIC
CONTROL
BIASING
SUPPLY AND
UNDER-
VOLTAGE
DETECTION
S
9.4 V
UV
UVx
SOFT
START
VOLTAGE
REFERENCE
C
V
GND
REF
Semiconductor Group808.97
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