Siemens BTS 728 L2 Technical data

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PROFET® BTS 728 L2

Smart High-Side Power Switch Two Channels: 2 x 60mΩ Status Feedback

Product Summary Package

Operating Voltage V

bb(on)

4.75...41V

P-DSO-20-9

Active channels one two parallel On-state Resistance R Nominal load current I Current limitation I

ON L(NOM) L(SCr)

Ω

60m

4.0A 6.0A 17A 17A

30m

Ω

General Description

•

N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and

diagnostic feedback, monolithically integrated in Smart SIPMOS

•

Fully protected by embedded protection functions



technology.

Applications

•

µC compatible high-side power switch with diagnostic feedback for 5V, 12V and 24V grounded loads

•

All types of resistive, inductive and capacitve loads

•

Most suitable for loads with high inrush currents, so as lamps

•

Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

•

Very low standby current

•

CMOS compatible input

•

Improved electromagnetic compatibility (EMC)

•

Fast demagnetization of inductive loads

•

Stable behaviour at undervoltage

•

Wide operating voltage range

•

Logic ground independent from load ground

Protection Functions

•

Short circuit protection

•

Overload protection

•

Current limitation

•

Thermal shutdown

•

Overvoltage protection (including load dump) with external

resistor

•

Reverse battery protection with external resistor

•

Loss of ground and loss of V

protection

bb

• Electrostatic discharge protection (ESD)

Diagnostic Function

• Diagnostic feedback with open drain output

• Open load detection in ON-state

Block Diagram

Vbb

IN1

ST1

IN2

ST2

Logic

Channel

1

Logic

Channel

2

PROFET

GND

OUT 1

Load 1

OUT 2

Load 2

• Feedback of thermal shutdown in ON-state

Semiconductor Group Page 1 of 14 1999-Mar-23

Functional diagram

g

y

BTS 728 L2

IN1

ST1

GND1

IN2 ST2

GND2

overvoltage

protection

internal

e suppl

volta

ESD

gate

control

+

charge

logic

pump

temperature

sensor

Open load

detection

Channel 1

Control and protection circuit

of

channel 2

current limit

clamp for

inductive load

VBB

OUT1

LOAD

OUT2

PROFET

Pin Definitions and Functions

Pin Symbol Function

1,10, 11,12, 15,16, 19,20 3IN1 7 IN2 logic high signal 17,18 OUT1 13,14 OUT2 of channel 1,2. Design the wiring for the max.

4ST1 8 ST2 open drain, low on failure 2 GND1 6 GND2 5,9 N.C.

V

bb

Positive power supply voltage. Design the

wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance

Input 1,2, activates channel 1,2 in case of

Output 1,2, protected high-side power output

short circuit current

Diagnostic feedback 1,2 of channel 1,2,

Ground 1 of chip 1 (channel 1) Ground 2 of chip 2 (channel 2) Not Connected

Pin configuration

(top view)

V

1 • 20 V

bb

GND1 2 19 V

IN1 3 18 OUT1

ST1 4 17 OUT1

N.C. 5 16 V

GND2 6 15 V

IN2 7 14 OUT2

ST2 8 13 OUT2

N.C. 9 12 V

Vbb10 11 V

bb bb

Semiconductor Group Page 2 1999-Mar-23

BTS 728 L2

Maximum Ratings at

T

= 25°C unless otherwise specified

j

Parameter Symbol Values Unit

Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection

T

= -40 ...+150°C

j,start

Load current (Short-circuit current, see page 5) Load dump protection1)

2)

R

= 2 Ω,

I

t

= 200 ms; IN = low or high,

d

each channel loaded with

V

LoadDump

R

=

= 8.0 Ω,

L

V

+

V

,

V

s

= 13.5 V

A

Operating temperature range Storage temperature range Power dissipation (DC) (all channels active)

4)

T

= 25°C:

a

T

= 85°C:

a

V

bb

V

bb

I

L

V

Load dump

T

j

T

stg

P

tot

43 V 24 V

self-limited A

3

)

-40 ...+150

60 V

°C

-55 ...+150

3.7

W

1.9

Maximal switchable inductance, single pulse V

I I

bb L L

= 12V, = 4.0 A, = 6.0 A,

T

= 150°C4),

j,start

E

= 220 mJ, 0 Ω one channel:

AS

E

= 540 mJ, 0 Ω two parallel channels:

AS

Z

L

19.9

mH

22.3 see diagrams on page 9 Electrostatic discharge capability (ESD) IN:

(Human Body Model) ST:

out to all other pins shorted:

V

ESD

1.0

4.0

8.0

kV

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

Input voltage (DC) Current through input pin (DC) Current through status pin (DC)

V I I

IN ST

IN

-10 ... +16 V ±2.0

mA

±5.0

see internal circuit diagram page 8

Thermal Characteristics

Parameter and Conditions Symbol Values Unit

min typ Max

Thermal resistance junction - soldering point

junction - ambient

1)

Supply voltages higher than V resistor for the GND connection is recommended.

2)

R

= internal resistance of the load dump test pulse generator

I

3)

V

Load dump

4)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm connection. PCB is vertical without blown air. See page 14

5)

Soldering point: upper side of solder edge of device pin 15. See page 14

is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839

4)

Semiconductor Group Page 3 1999-Mar-23

4),5)

each channel:

one channel active:

all channels active:

require an external current limit for the GND and status pins (a 150Ω

bb(AZ)

R

thjs

R

thja

2

(one layer, 70µm thick) copper area for V

-- -- 13.5

--

41 34

K/W

--

bb

BTS 728 L2

T

j

Electrical Characteristics

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C,

Load Switching Capabilities and Characteristics

V

= 12 V unless otherwise specified

bb

min typ Max

On-state resistance (Vbb to OUT); I

each channel,

two parallel channels,

see diagram, page 10

= 2 A, Vbb ≥ 7V

L

T

= 25°C:

j

T

= 150°C:

j

= 25°C:

Nominal load current one channel active:

two parallel channels active:

6)

Device on PCB

,

T

a

= 85°C,

T

≤ 150°C

j

Output current while GND disconnected or pulled up;

V

= 30 V,

bb

see diagram page 8; (not tested specified by design)

Turn-on time7) IN to 90% Turn-off time IN to 10%

R

= 12 Ω

L

Slew rate on 10 to 30% Slew rate off

70 to 40%

V

= 0,

IN

V

OUT

V

OUT

7)

V

,

R

,

R

= 12 Ω:

L

= 12 Ω:

L

V

OUT

7) OUT

: :

R

I

t t

dV/dt

-dV/dt

ON

L(NOM)

L(GNDhigh)

on off

on

off

--

3.6

5.5

50

100

25

4.0

6.0

60

120

30

mΩ

-- A

-- -- 2 mA

30 30

100 100

200

µs

0.1 -- 1 V/µs

Operating Parameters

Operating voltage Tj=-40

Tj=25...150°C:

10)

8)

T

,

V

= 5V,

IN

T

=-40°C:

j

T

=25...150°C:

j

=-40°C...25°C:

j

T

=150°C:

j

I

)

bb(off)

, one channel on:

Overvoltage protection

I

= 40 mA

bb

Standby current V

= 0; see diagram page 10

IN

)

9

Leakage output current (included in

V

IN = 0

Operating current

I

=

I

+

GND

GND1

I

GND2

two channels on:

6)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm

connection. PCB is vertical without blown air. See page 14

7)

See timing diagram on page 11.

8)

Supply voltages higher than V resistor for the GND connection is recommended). See also circuit diagram on page 8.

9)

Measured with load; for the whole device; all channels off

10)

Add

I

, if

I

ST

> 0

ST

require an external current limit for the GND and status pins (a 150Ω

bb(AZ)

V

bb(on)

V

bb(AZ)

I

bb(off)

I

L(off)

I

GND

2

(one layer, 70µm thick) copper area for V

V

in table of protection functions and

ON(CL)

4.75 --

--

41 43

--

47 10

--

41

43

52 18

50

-- 1 10 µA

--

0.8

1.6

1.5

3.0

V

--

V

µA

mA

bb

Semiconductor Group Page 4 1999-Mar-23

BTS 728 L2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C,

Protection Functions

Current limit, (see timing diagrams, page 12)

Repetitive short circuit current limit,

T

=

T

each channel

j

jt

(see timing diagrams, page 12)

Initial short circuit shutdown time

Output clamp (inductive load switch off)

at V

ON(CL)

= Vbb - V

Thermal overload trip temperature Thermal hysteresis

V

= 12 V unless otherwise specified

bb

T

=+150°C:

T

j

two parallel channels

T

j,start

(see timing diagrams on page 12)

11)

,

I

OUT

= 40 mA

L

T

=25°C...150°C:

T

j

=-40°C:

j

=25°C:

T

j

=25°C:

=-40°C:

j

I

L(lim)

I

L(SCr)

t

off(SC)

V

ON(CL)

T

jt

∆

T

jt

min typ Max

21 17 12

--

28 22 16

17 17

36 31 24

A

--

A

--

-- 2.4 -- ms

V

41 43

47

--

52

150 -- -- °C

-- 10 -- K

Reverse Battery

Reverse battery voltage

12)

Drain-source diode voltage (V

= - 4.0 A, Tj = +150°C

I

L

out

> V

bb

-

V

bb

)

-

V

ON

-- -- 32 V

-- 600 -- mV

11)

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest V

ON(CL)

12)

Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 8).

Semiconductor Group Page 5 1999-Mar-23