!
PROFET® BTS 728 L2
Smart High-Side Power Switch
Two Channels: 2 x 60mΩ
Status Feedback
Product Summary |
|
|
|
Package |
Operating Voltage |
Vbb(on) |
|
4.75...41V |
P-DSO-20-9 |
|
Active channels |
one |
two parallel |
|
On-state Resistance |
RON |
60mΩ |
30mΩ |
|
Nominal load current |
IL(NOM) |
4.0A |
6.0A |
|
Current limitation |
IL(SCr) |
17A |
17A |
|
General Description
∙N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS® technology.
∙Fully protected by embedded protection functions
Applications
∙µC compatible high-side power switch with diagnostic feedback for 5V, 12V and 24V grounded loads
∙All types of resistive, inductive and capacitve loads
∙Most suitable for loads with high inrush currents, so as lamps
∙Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
∙Very low standby current
∙CMOS compatible input
∙Improved electromagnetic compatibility (EMC)
∙Fast demagnetization of inductive loads
∙Stable behaviour at undervoltage
∙Wide operating voltage range
∙Logic ground independent from load ground
Protection Functions |
Block Diagram |
∙ |
Short circuit protection |
|
Vbb |
|
|
∙ |
Overload protection |
|
|
||
|
|
|
|||
∙ |
Current limitation |
|
|
|
|
∙ |
Thermal shutdown |
|
|
|
|
∙ |
Overvoltage protection (including load dump) with external |
IN1 |
Logic |
|
|
∙ |
resistor |
ST1 |
Channel |
|
|
Reverse battery protection with external resistor |
1 |
OUT 1 |
|||
|
|||||
∙ Loss of ground and loss of Vbb protection |
|
|
|
||
∙ |
Electrostatic discharge protection (ESD) |
IN2 |
Logic |
Load 1 |
|
|
|
|
|||
Diagnostic Function |
ST2 |
Channel |
|
||
2 |
OUT 2 |
||||
|
|||||
∙ |
Diagnostic feedback with open drain output |
|
PROFET |
|
|
∙ |
Open load detection in ON-state |
|
GND |
Load 2 |
|
∙ Feedback of thermal shutdown in ON-state |
|
|
|
Semiconductor Group |
Page 1 of 14 |
1999-Mar-23 |
BTS 728 L2
Functional diagram
overvoltage |
|
gate |
current limit |
VBB |
protection |
|
control |
|
|
|
|
+ |
|
|
internal |
logic |
charge |
clamp for |
|
voltage supply |
pump |
|
||
inductive load |
|
|||
|
|
|
|
|
|
|
|
|
OUT1 |
IN1 |
|
temperature |
|
|
|
sensor |
|
|
|
ESD |
|
|
|
|
|
|
|
LOAD |
|
|
|
Open load |
|
|
ST1 |
|
|
|
|
|
detection |
|
|
|
GND1 |
|
|
|
|
Channel 1
IN2 |
Control and protection circuit |
|
ST2 |
of |
|
channel 2 |
||
|
||
GND2 |
OUT2 |
PROFET
Pin Definitions and Functions
Pin |
Symbol |
Function |
|
|
1,10, |
Vbb |
Positive power supply voltage. Design the |
||
11,12, |
|
wiring for the simultaneous max. short circuit |
||
15,16, |
|
currents from channel 1 to 2 and also for low |
||
19,20 |
|
thermal resistance |
||
3 |
IN1 |
Input 1,2, activates channel 1,2 in case of |
||
7 |
IN2 |
logic high signal |
||
17,18 |
OUT1 |
Output 1,2, protected high-side power output |
||
13,14 |
OUT2 |
of channel 1,2. Design the wiring for the max. |
||
|
|
short circuit current |
||
4 |
ST1 |
Diagnostic feedback 1,2 of channel 1,2, |
||
8 |
ST2 |
open drain, low on failure |
||
2 |
GND1 |
Ground 1 of chip 1 (channel 1) |
||
6 |
GND2 |
Ground 2 of chip 2 (channel 2) |
||
5,9 |
N.C. |
Not Connected |
Pin configuration
(top view)
|
|
|
∙ |
|
|
|
|
|
Vbb |
|
1 |
20 |
Vbb |
||||
GND1 |
|
2 |
|
19 |
Vbb |
|||
IN1 |
|
3 |
|
18 |
OUT1 |
|||
ST1 |
|
4 |
|
17 |
OUT1 |
|||
|
|
|
|
|
|
|||
N.C. |
|
5 |
|
16 |
Vbb |
|||
GND2 |
|
6 |
|
15 |
Vbb |
|||
IN2 |
|
7 |
|
14 |
OUT2 |
|||
ST2 |
|
8 |
|
13 |
OUT2 |
|||
N.C. |
|
9 |
|
12 |
Vbb |
|||
Vbb |
|
10 |
|
|
|
|
11 |
Vbb |
Semiconductor Group |
Page 2 |
1999-Mar-23 |
BTS 728 L2
Maximum Ratings at Tj = 25°C unless otherwise specified |
|
|
|
|
|
|
|
Parameter |
Symbol |
|
|
Values |
|
Unit |
|
|
|
|
|
|
|
|
|
Supply voltage (overvoltage protection see page 4) |
Vbb |
|
43 |
|
V |
|
|
Supply voltage for full short circuit protection |
Vbb |
|
24 |
|
V |
|
|
Tj,start = -40 ...+150°C |
|
|
|
|
|
|
|
Load current (Short-circuit current, see page 5)
Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V RI2) = 2 Ω, td = 200 ms; IN = low or high,
each channel loaded with RL = 8.0 Ω,
IL |
self-limited |
A |
VLoad dump3) |
60 |
V |
|
|
|
Operating temperature range |
|
|
|
Tj |
-40 ...+150 |
°C |
||||||
Storage temperature range |
|
|
|
Tstg |
-55 ...+150 |
|
|
|||||
Power dissipation (DC)4) |
|
Ta = 25°C: |
Ptot |
|
|
|
|
3.7 |
W |
|||
(all channels active) |
|
Ta = 85°C: |
|
|
|
|
|
|
1.9 |
|
|
|
Maximal switchable inductance, single pulse |
|
|
|
|
|
|
|
|
|
|
||
Vbb = 12V, Tj,start = 150°C 4), |
|
|
|
|
|
|
|
|
|
|
|
|
IL = 4.0 A, EAS = 220 mJ, 0 Ω |
|
one channel: |
ZL |
|
|
|
|
19.9 |
mH |
|||
IL = 6.0 A, EAS = 540 mJ, 0 Ω |
two parallel channels: |
|
|
|
|
|
|
22.3 |
|
|
||
see diagrams on page 9 |
|
|
|
|
|
|
|
|
|
|
|
|
Electrostatic discharge capability (ESD) |
IN: |
|
VESD |
|
|
|
|
1.0 |
kV |
|||
(Human Body Model) |
|
ST: |
|
|
|
|
|
|
|
4.0 |
|
|
out to all other pins shorted: |
|
|
|
|
|
|
|
8.0 |
|
|
||
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 |
|
|
|
|
|
|
|
|
|
|||
R=1.5kΩ; C=100pF |
|
|
|
|
|
|
|
|
|
|
|
|
Input voltage (DC) |
|
|
|
VIN |
-10 ... +16 |
V |
||||||
Current through input pin (DC) |
|
|
|
IIN |
|
|
|
|
±2.0 |
mA |
||
|
|
|
|
|
|
|
||||||
Current through status pin (DC) |
|
|
IST |
|
|
|
|
±5.0 |
|
|
||
see internal circuit diagram page 8 |
|
|
|
|
|
|
|
|
|
|
|
|
Thermal Characteristics |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Parameter and Conditions |
|
|
Symbol |
|
|
|
Values |
|
Unit |
|||
|
|
|
|
|
min |
|
|
typ |
|
Max |
|
|
Thermal resistance |
|
|
|
|
|
|
|
|
|
|
|
|
junction - soldering point4),5) |
each channel: |
Rthjs |
|
-- |
|
-- |
|
13.5 |
K/W |
|||
junction - ambient4) |
one channel active: |
Rthja |
|
-- |
|
41 |
|
-- |
|
|
||
|
all channels active: |
|
|
-- |
|
|
34 |
|
-- |
|
|
1) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended.
2)RI = internal resistance of the load dump test pulse generator
3)VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
4) |
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm |
2 |
(one layer, 70μm thick) copper area for Vbb |
||
|
|
||||
5) |
connection. PCB is vertical without blown air. See page 14 |
|
|||
Soldering point: upper side of solder edge of device pin 15. See page 14 |
|||||
|
|||||
Semiconductor Group |
Page 3 |
|
1999-Mar-23 |
BTS 728 L2
Electrical Characteristics
Parameter and Conditions, each of the two channels |
|
Symbol |
|
|
|
Values |
|
Unit |
||||||||||
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified |
|
|
|
min |
|
typ |
|
Max |
|
|||||||||
Load Switching Capabilities and Characteristics |
|
|
|
|
|
|
|
|
||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
On-state resistance (Vbb to OUT); IL = 2 A, Vbb ³ 7V |
|
|
-- |
|
|
|
|
mΩ |
||||||||||
|
|
each channel, |
Tj = 25°C: |
|
RON |
50 |
|
60 |
||||||||||
|
|
|
|
|
|
|
|
|
Tj = 150°C: |
|
|
|
|
100 |
|
120 |
|
|
|
|
two parallel channels, Tj = 25°C: |
|
|
|
|
25 |
|
30 |
|
||||||||
see diagram, page 10 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
Nominal load current |
one channel active: |
|
IL(NOM) |
3.6 |
4.0 |
|
-- |
A |
||||||||||
|
|
two parallel channels active: |
|
|
5.5 |
6.0 |
|
|
|
|||||||||
Device on PCB6), Ta = 85°C, Tj £ 150°C |
|
|
|
|
|
|
|
|
|
|
||||||||
Output current while GND disconnected or pulled up; |
|
IL(GNDhigh) |
-- |
-- |
|
2 |
mA |
|||||||||||
Vbb = 30 V, VIN = 0, |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
see diagram page 8; (not tested specified by design) |
|
|
|
|
|
|
|
|
|
|||||||||
Turn-on time7) |
IN |
|
|
|
to 90% VOUT: |
|
ton |
30 |
100 |
|
200 |
μs |
||||||
|
|
|
|
|
||||||||||||||
|
|
|
||||||||||||||||
Turn-off time |
IN |
|
|
to 10% VOUT: |
|
toff |
30 |
100 |
|
200 |
|
|||||||
|
|
|
|
|
|
|
||||||||||||
RL = 12 Ω |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
Slew rate on 7) |
|
|
|
|
|
|
|
dV/dton |
0.1 |
-- |
|
1 |
V/μs |
|||||
10 to 30% VOUT, RL = 12 Ω: |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
Slew rate off 7) |
|
|
|
|
|
|
|
-dV/dtoff |
0.1 |
-- |
|
1 |
V/μs |
|||||
70 to 40% VOUT, RL = 12 Ω: |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
Operating Parameters |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Operating voltage |
|
|
|
|
|
Tj=-40 |
|
Vbb(on) |
4.75 |
-- |
|
41 |
V |
|||||
|
|
|
|
|
|
|
Tj=25...150°C: |
|
|
|
|
-- |
|
43 |
|
|||
Overvoltage protection8) |
|
|
|
|
|
Tj =-40°C: |
|
Vbb(AZ) |
41 |
-- |
|
-- |
V |
|||||
I bb = 40 mA |
|
|
|
Tj =25...150°C: |
|
|
43 |
47 |
|
52 |
|
|||||||
Standby current9) |
|
|
|
Tj =-40°C...25°C : |
|
Ibb(off) |
-- |
10 |
|
18 |
μA |
|||||||
VIN = 0; see diagram page 10 |
|
|
|
|
|
Tj =150°C: |
|
|
-- |
-- |
|
50 |
|
|||||
Leakage output current (included in Ibb(off)) |
|
IL(off) |
-- |
1 |
|
10 |
μA |
|||||||||||
VIN = 0 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
Operating current 10), VIN = 5V, |
|
|
IGND |
-- |
0.8 |
|
1.5 |
mA |
||||||||||
IGND = IGND1 + IGND2, |
|
|
|
one channel on: |
|
|
||||||||||||
|
|
|
|
|
|
|
two channels on: |
|
|
-- |
1.6 |
|
3.0 |
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
6) |
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm |
2 |
(one layer, 70mm thick) copper area for Vbb |
|||||||||||||||
|
|
connection. PCB is vertical without blown air. See page 14
7) |
See timing diagram on page 11. |
|
8)Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150W resistor for the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram on page 8.
9) |
Measured with load; for the whole device; all channels off |
|
|
|||
10) Add I , if I |
ST |
> 0 |
|
|
|
|
|
ST |
|
|
|
|
|
Semiconductor Group |
Page 4 |
1999-Mar-23 |
BTS 728 L2
Parameter and Conditions, each of the two channels |
Symbol |
|
|
|
Values |
|
Unit |
||
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified |
|
|
min |
|
typ |
|
Max |
|
|
Protection Functions |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Current limit, (see timing diagrams, page 12) |
|
|
|
|
|
|
|
|
|
|
Tj =-40°C: |
IL(lim) |
|
|
|
36 |
A |
||
|
21 |
28 |
|
||||||
|
Tj =25°C: |
|
17 |
22 |
|
31 |
|
||
|
Tj =+150°C: |
|
12 |
16 |
|
24 |
|
||
Repetitive short circuit current limit, |
|
|
|
|
|
|
|
|
|
Tj = Tjt |
each channel |
IL(SCr) |
|
|
|
-- |
A |
||
-- |
17 |
|
|||||||
two parallel channels |
|
-- |
17 |
|
-- |
|
|||
(see timing diagrams, page 12) |
|
|
|
|
|
|
|
|
|
Initial short circuit shutdown time |
Tj,start =25°C: |
toff(SC) |
-- |
2.4 |
|
-- |
ms |
||
(see timing diagrams on page 12) |
|
|
|
|
|
|
|
|
|
Output clamp (inductive load switch off)11) |
|
|
|
|
|
|
|
V |
|
at VON(CL) = Vbb - VOUT, IL= 40 mA |
Tj =-40°C: |
VON(CL) |
41 |
-- |
|
-- |
|
||
Tj =25°C...150°C: |
|
43 |
47 |
|
52 |
|
|||
Thermal overload trip temperature |
|
Tjt |
150 |
-- |
|
-- |
°C |
||
Thermal hysteresis |
|
Tjt |
-- |
10 |
|
-- |
K |
||
Reverse Battery |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Reverse battery voltage 12) |
|
-Vbb |
-- |
-- |
|
32 |
V |
||
Drain-source diode voltage (Vout > Vbb) |
-VON |
-- |
600 |
|
-- |
mV |
|||
IL = - 4.0 A, Tj = +150°C |
|
|
|
|
|
|
|
|
|
11) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
VON(CL)
12) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 8).
Semiconductor Group |
Page 5 |
1999-Mar-23 |