6N138
6N139
LOW INPUT CURRENT, HIGH GAIN
OPTOCOUPLER
FEATURES
• High Current Transfer Ratio, 800%
• Low Input Current, 0.5mA
• High Output Current, 60mA
• Isolation T est V oltage, 2500 VA C
RMS
• TTL Compatible Output, VOL=0.1 V
• High Common Mode Rejection, 500V/ µ sec.
• Adjustable Bandwidth–Access to Base
• Standard Molded Dip Plastic Package
• Underwriters Lab File #E52744
APPLICATIONS
• Logic Ground Isolation–TTL/TTL, TTL/CMOS,
CMOS/CMOS, CMOS/TTL
• EIA RS 232C Line Receiver
• Low Input Current Line Receiver–Long Lines,
Party Lines
• Telephone Ring Detector
• 117 VAC Line Voltage Status Indication–Low
Input Power Dissipation
Dimensions in inches (mm)
34
268 (6.81)
255 (6.48)
65
.390 (9.91)
.379 (9.63)
.045 (1.14)
.030 (.76)
4°
Typ.
.022 (.56)
.018 (.46)
.100 (2.54) Typ.
12
87
Pin
One
I.D.
Cathode
.150 (3.81)
.130 (3.30)
.040 (1.02)
.030 (.76 )
NC
Anode
NC
1
2
3
4
.305 typ.
(7.75) typ.
10°
Typ.
3°–9°
.012 (.30)
.008 (.20)
8
7
6
5
V
CC
V
B
V
0
GND
.135 (3.43
.115 (2.92
• Low Power Systems–Ground Isolation
DESCRIPTION
High common mode transient immunity and very
high current ratio together with 2500 VAC insulation
are achieved by coupling an LED with an integrated
high gain photo detector in an eight pin dual-in-line
package. Separate pins for the photodiode and output stage enable TTL compatible saturation voltages with high speed operation. Photodarlington
operation is achieved by tying the V
CC
and V
O
terminals together. Access to the base terminal allows
adjustment to the gain bandwidth.
The 6N138 is ideal for TTL applications since the
300% minimum current transfer ratio with an LED
current of 1.6 mA enables operation with one unit
load-in and one unit load-out with a 2.2 K Ω
pull-up
resistor.
The 6N139 is best suited for low power logic appli-
cations involving CMOS and low power TTL. A
400% current transfer ratio with only 0.5 mA of LED
current is guaranteed from 0 °
Caution:
Due to the small geometries of this device, it should be
handled with Electrostatic Discharge (ESD) precautions. Proper grounding would prevent damage further
and/or degradation which may be induced by ESD.
C to 70 ° C.
Maximum Ratings
Reverse Input Voltage..........................................................................5 V
Supply and Output Voltage, V
(pin 8-5), V
CC
(pin 6-5)
O
6N138...................................................................................–0.5 to 7 V
6N139.................................................................................–0.5 to 18 V
Emitter-Base Reverse Voltage (pin 5-7)............................................0.5 V
Average Input Current.....................................................................20 mA
Peak Input Current (50% Duty Cycle–1 ms pulse width)................40 mA
Peak Transient Input Current (tp ≤
Output Current I
(pin 6).................................................................60 mA
O
Derate linearly above 25 °
1 µ sec, 300 pps ...........................1.0 A
C, free air temperature at 0.7 mA/ ° C
Input Power Dissipation .................................................................35 mW
Derate linearly above 50%, free air temperature at 0.7 mW/ °
C
Output Power Dissipation.............................................................100 mW
Derate linearly above 25 °
Isolation Test Voltage...........................................................2500 VAC
Isolation Resistance
V
=500 V, T
IO
V
=500 V, T
IO
=25 ° C .........................................................................≥ 10
A
=100 ° C .......................................................................≥ 10
A
C, free air temperature at 0.2 mA/ ° C
RMS
12
11
Ω
Ω
Storage Temperature......................................................–55 ° C to +125 ° C
Operating Temperature..................................................–55 °
C to +100 ° C
Lead Soldering Temperature (t=10 sec.)........................................260 °
C
5–1
Electro-Optical Characteristics (T
C to 70 ° C, T
A
=0 °
=25 ° C–Typical, unless otherwise specified)
A
Parameter Symbol Device Min.Typ. Max. Units Test Conditions
Note
Current Transfer Ratio CTR 6N138 300 1600 % I
6N139 400
500
1600
2000
%I
Logic Low 6N138 0.1 0.4 V I
Output Voltage V
OL
6N139
6N139
6N139
Logic High 6N138 0.1 250
Output Current I
Logic Low Supply Current I
Logic High Supply Current I
Input Forward Voltage V
Input Reverse Breakdown
Voltage
OH
CCL
CCH
BV
F
R
6N139 0.05 100
Temperature Coefficient of
0.1
0.15
0.25
0.4
0.4
0.4
VI
µ
AI
µ AI
0.2 1.5 mA I
0.001 10
µ AI
1.4 1.7 V I
5VI
-1.8 mV/ °
CI
Forward Voltage
Input Capacitance C
Input-Output Insulation
IN
I-0 1.0
25 pF f=1 MHz, V
A 45% Relative Humidity, T
µ
Leakage Current
Resistance (Input-Output) R
Capacitance (Input-Output) C
I-O
I-O
12
10
0.6 pF f=1 MHz 7
Ω
=1.6 mA, V
F
=0.5 mA, V
F
I
=1.6 mA, V
F
=1.6 mA, I
F
=1.6 mA, I
F
I
=5 mA, I
F
I
=12 mA, I
F
=0 mA, V
F
=0 mA, V
F
=1.6 mA, V
F
=0 mA, V
F
=1.6 mA, T
F
=10 µ A
R
=1.6 mA
F
t=5
, V
S
V
=500 VDC 7
IO
O
O
O
=4.8 mA, V
O
=8 mA, V
O
=15 mA, V
O
=24 mA, V
O
=V
O
=V
O
O
=OPEN, V
O
=25 ° C
A
=0
F
=3000 VDC
1-0
=0.4 V, V
=0.4 V, V
=0.4 V, V
CC
CC
=OPEN, V
=4.5 V 5.6
CC
=4.5 V
CC
=4.5 V
CC
=4.5 V 6
CC
=4.5 V
CC
=4.5 V
CC
=4.5 V
CC
=7 V 6
=18 V 6
=18 V 6
CC
=18 V 6
CC
=25 ° C
A
5.6
6
7
Switching Specifications (T
Parameter Symbol Device Min.Typ. Max. Units Test Conditions
Propagation Delay Time 6N138 2 10
To Logic Low at Output t
Propagation Delay Time 6N138 2 35 µSI
To Logic High at Output t
Common Mode Transient Immunity at Logic
High Level Output
Common Mode Transient Immunity at Logic
Low Level Ouput
=25 ° C)
A
PHL
PLH
CM
CM
Note
µ SI
6N139 6
0.6
6N139 4
1.5
H
L
500 V/µSIF=0 mA, RL=2.2 KΩ
–500 V/µSIF=1.6 mA, RL=2.2 KΩ
25
µSI
1
60
7 µS
=1.6 mA, R
F
=0.5 mA, RL=4.7 KΩ
F
=12 mA, RL=270 Ω
I
F
=1.6 mA, RL=2.2 KΩ
F
=2.2 K Ω
L
6,8
IF=0.5 mA, RL=4.7 KΩ
IF=12 mA, RL=270 Ω 6,8
9,10
RCC=0/VCM/=10 V
p-p
9,10
RCC=0/VCM/=10 V
p-p
Notes
1.Derate linearly above 50 ° C free-air temperature at a rate of 0.4 mA/ ° C.
2.Derate linearly above 50 ° C free-air temperature at a rate of 0.7 mW/ ° C.
3.Derate linearly above 25 ° C free-air temperature at a rate of 0.7 mA/ ° C.
4.Derate linearly above 25 ° C free-air temperature at a rate of 2.0 mW/ ° C.
5.DC current transfer ratio is defined as the ratio of outpput collector current, IO, to the forward LED input current, IF times 100%.
6.Pin 7 open.
7.Device considered a two-terminal device: pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted together.
8.Using a resistor between pin 5 and 7 will decrease gain and delay time.
9.Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode
pulse, V
, to assure that the output will remain in a logic high state (i.e. V
CM
maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, V
logic low state (i.e. V
<
O
0.8 V).
10.In applications where dv/dt may exceed 50,000 V/ µ s (such as state discharge) a series resistor, R
destructively high surge currents. The recommended value is
CC
>
2.0 V) common mode transient immunity in logic low level is the
O
-------------------------------- -
0.15IFmA()
k Ω≅
, to assure that the output will remain in a
CM
should be included to protect I
CC
from
C
6N139/139
5–2