5
4
3
2
1
Project Name : A14RV08 REV:A
D D
Platform : AMD Bbazos (Champlain APU+ hudsion)
PAGE
CONTENT
INDEX
1.
2. SYSTEM BLOCK
3.
SYETEM SEQUENCE
Clock Block Diagram
4.
5.
SM Bus Block Diagram
6.
Reset Block Diagram
CLOCK GEN(ICS9LRS365B)
7.
Ontario DDR/PCIE/UMI 1/3
C C
B B
A A
8.
9.
10.
11.12.13.14
15.
16.
17.
18.
19.
20.
21.
22.
23.24.25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35.
36.
37.
38.
39.
40.
41.
42.
Ontario LVDS/VGA/HDMI/CLK 2/3
Ontario POWER 3/3
Resreve
DDR3 SODIMM
DDR3 SODIMM Decouping
Hudson PCIE/CLK/LPC/RTC 1/6
Hudson USB/HDA 2/6
Hudson SATA 3/6
Hudson Power 4/6
Hudson GND 5/6
Hudson STRAPS 6/6
Reserve
EC IT8500E/BIOS
CRT,LVDS
HDMI
HDD/ODD
LAN/CARD JMC251/30Pin Conn
Webcamera/BT/Finger
Enhance USB/Audio&Pwr SW DB
CODE(92HD81),MIC,SPKR,MDC
TP/LED/PWR SW/KB
FAN/WLAN
TPM&RS232&G-Sensor
3G/TV/USB Hub/New Card
PCIE to USB Bridge
DC IN/BT/HOLE/HIGH-Speed C
BATT IN/Charger(OZ8602)
CPU CORE/CPU-VDDNB(OZ8380)
GFX-CORE
45. VCC SW
46. EMI-CAP&MISC
47.48 Reserve
49. GPU 1/4
50. GPU 2/4
51. GPU 3/4
52. GPU 4/4
53. VRAM 1/2
54. VRAM 2/2
55. VER.B HISTORY
56. VER.B HISTORY
Release Date PCB P/N NotePCBA P/NVersion
Daughter Board Schematic Version Change List
43. +1.5VS/+5VA(OZ815)/+3.3VA
44. +1.1VA(OZ8116)/+0.75VS/+1.8V
44. +CPU-VDDR
5
4
3
M/B Schematic Version Change List
PCB Description
PCB P/N PCB DescriptionRelease Date Version PCBA P/N Note
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Shuttle Inc
Shuttle Inc
Shuttle Inc
A14RV
A14RV
A14RV
INDEX
INDEX
INDEX
1
A0
A0
139Tuesday, April 10, 2012
139Tuesday, April 10, 2012
139Tuesday, April 10, 2012
A0
of
of
of
5
4
3
2
1
SYSTEM BLOCK DIAGRAM
APU
D D
ONLY DDR3 RAM BUS
SO-DIMM1
SO-DIMM0
200 Pin
32GB MAX MEMORY
800~1066MT/S
SMBUS
RJ11
Ontaril 9W
Zacate 18W
LVDS (18bit)
RGB
TMDS
LCD
CRT
HDMI
Headphone Out x 1
INT Mic In x 1
UMI
X4
Codec
C C
Internal SPK
4 1.5W x 2
IDT92HD81
48 Pin LQFP
ENHANCE USB
USB DB
WEBCAM
USB hub/Newcard
Touch screen
BT
B B
Finger print
AZALIZA
USB0
USB1
USB2
USB5
USB3
USB9
USB6
USB8
USB4
Hudsion-M1
SATA0
SATA1
PCIE0
PCIE1
USB7
PCIE2 PCIE3
HDD x 1
2.5" SATAI/II
ODD x 1
LAN 10/100 /1000
Cardreader
JMC251/JMC261
Mini Card x 1
RJ45
TV & New card
LPC
Embedded Controller (EC)
PS/2
T/P
ITE8500E
K/B Matrix
A A
5
4
3
Internal K/B
2
Shuttle Inc
Shuttle Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Shuttle Inc
A14RV
A14RV
A14RV
SYSTEM BLOCK
SYSTEM BLOCK
SYSTEM BLOCK
1
of
of
of
239Tuesday, April 10, 2012
239Tuesday, April 10, 2012
239Tuesday, April 10, 2012
A0
A0
A0
5
Power on Sequence required:
HUDSON-1M:
1, +3.3VDUAL ramp before +1.1VDUAL
2, +3.3V ramp before +1.8v
3, +1.8V ramp before +1.1v
4, +3.3v ramp before +1.1v
CPU:
1, GROUP A(VDD10,VDD18, VDDIO, VDD33)
ramp before GROUP B(VDDCR,VDDNB)
EC Control Pin (O/P)
*
EC Control Pin(I/P)
**
D D
VBAT
Vin_alw
+5VA / +3.3VA/+1.1VA
AC_OK
PWRSW
PM_RSMRST#
*
PWRBTN#
*
PM_SLP_S5#
**
+3.3VS_ON
*
+5VS
C C
B B
A A
*
*
PM_SLP_S3#
*
*
+5V_ON
*
*
+1.5V_ON
*
+1.1V_ON
*
+1.05V_ON
*
VCORE_ON
*
+CPU_CORE
+CPU_VDDNB
VCORE_ON
**
SB_PWRGD
*
KBRST#
*
CPU_PWRGD
A_RST#
PCIRST#
LDT_RST#
+3.3VS
+1.5VS_ON
+1.5VS
+0.75VS
+1.1VS_ON
+1.1VS
+5V
+3.3V
+1.8V_ON
+1.8V
+1.5V
+1.1V
+1.05V
G3 S5 S0 S5 G3
>5S
5
System Power On Sequence
All Power Rails except +3.3VA --> 50 s < Power Rail Ramp time < 40
ms.
+3.3VA --> 100 s < Power Rail Ramp time < 40
ms.
AC not present scenario = LOW AC present= high
>=10ms
RSMRST# not de-asserted until at least 10 ms after S5_3V is valid. ramp up time (10~90%) <50ms
3ms
3ms
4
1ms
0 <(+3.3V) - (+1.8v) < 2.1
3ms
5ms
*EXT CLK 0~30ns
INT CLK40~42ms
4
+1.8V ramp before +1.1v
IV CLK GEN OK about after 3ms
TO SB PWR_GOOD rise time < 50 ms ,fall time < 1 ms
,de-asserted at least 80 ns before VDDCR_11 drops 5% from nominal value.
,de-asserted at least 1 ns before RSMRST# is asserted when entering G3 state.
5ms
SB PWR_GOOD to PCIRST#. 101~113ms
1ms
3
2
1
POWER BLOCK DIAGRAM
VIN
AM4826
AM4828
+5VA
12.5A
+5V_on
AM4826
OZ815
AM4826
+3.3VS_on
+3VA
+1.5VS_on
VIN
AM4826
AM4828
LDO
APL1084
+3.3VS_on
+1.5VS
13A
+1.5V_on
+Vcore_on
+5V_on
AM4826
SI2301
LDO
FP6137
G9330
AM4826
3A
+1.8V_on
VIN
SVD
SVC
APM3009NU x1
APM3106NU x 2
+CPU_CORE
OZ8380
VIN
AM4826*1
AM4828*2
VIN
OZ8116
?
3
2
AM4826
AM4828
+1.1VA
4.4A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+CPU_VDDNB
AM4826
+1.1VS_ON
AM4826
+1.1V_ON
Shuttle Inc
Shuttle Inc
Shuttle Inc
A14RM
A14RM
Custom
Custom
Custom
A14RM
POWER DIAGRAM & SEQUENCE
POWER DIAGRAM & SEQUENCE
POWER DIAGRAM & SEQUENCE
1
1.5A
+3.3VS
LDO
OZ8033
0.7A
1A
5.7A
4.5A
8A
+5V
4A
3A
+3.3V
+1.5V
+0.75VS
+1.05V
0.4A
3.7A
+5VS
2.3A
339Tuesday, April 10, 2012
339Tuesday, April 10, 2012
339Tuesday, April 10, 2012
+1.8V
+1.1VS
+1.1V
of
of
of
A0
A0
A0
5
4
3
2
1
25MHz
D D
100 MHZ DISP_CLKP P/N
Ontario
100 MHZ APU_CLKP P/N
C C
Hudson
Channel A DDR3
DIMM1
Channel A DDR3
DIMM2
HDMI_DDC_CLK
HDMI
25MHZ
B B
100 MHZ GPP_CLK1P/N
JMC251/261
100 MHZ GPP_CLK0P/N
WLAN Card
100 MHZ GPP_CLK2P/N
TV Tuner
100 MHZ GPP_CLK3P/N
NEW CARD
33MHZ LPC CLK
A A
33MHZ LPC CLK
EC
RS232
Title
Title
Title
A14RV
A14RV
A14RV
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> A0
Custom
<Doc> A0
Custom
<Doc> A0
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
439Tuesday, April 10, 2012
of
439Tuesday, April 10, 2012
of
439Tuesday, April 10, 2012
5
D D
4
3
2
1
HDMI_DDC_CLK
HDMI_DDC_DAT
HDMI
ONTARIO
EDIDCLK
EDIDDATA
LCD
SMBCLK
Hudson
C C
SMBDATA
DIMM1
Channel A DDR3
A0 A2
DIMM2
Channel A DDR3
SMCLK0
B B
A A
5
4
SMDATA0
3
BATTEREC
SHUTTLE
Title
Title
Title
A14RV
A14RV
A14RV
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
Date: Sheet
Date: Sheet
Date: Sheet
Tuesday, April 10, 2012
Tuesday, April 10, 2012
2
Tuesday, April 10, 2012
1
ofA0539
ofA0539
ofA0539
5
4
3
2
1
Ontario
D D
LDT_RST#
KB_RST#
EC
PM_RSMRST#
Hudson
A_RST#
PCIE_RST#
Lan Card
WLAN
A_RST#
ACZ_RST#
CODEC
C C
B B
A A
Title
Title
Title
A14RV
A14RV
A14RV
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> A0
Custom
<Doc> A0
Custom
<Doc> A0
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
639Tuesday, April 10, 2012
of
639Tuesday, April 10, 2012
of
639Tuesday, April 10, 2012
5
D D
C C
4
3
2
1
MB_13
use internal clk gen
B B
A A
Shuttle Inc
Shuttle Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Shuttle Inc
A14RV
A14RV
A14RV
CLOCK GEN (ICS9LRS365B)
CLOCK GEN (ICS9LRS365B)
CLOCK GEN (ICS9LRS365B)
1
739Tuesday, April 10, 2012
739Tuesday, April 10, 2012
739Tuesday, April 10, 2012
A0
A0
A0
of
of
of
5
4
3
2
1
U18E
MEM_MA_ADD[0..15]11
D D
MEM_MA_BANK[0..2]11
MEM_MA_DM[0..7]11
MEM_MA_DQS0_P11
MEM_MA_DQS0_N11
MEM_MA_DQS1_P11
MEM_MA_DQS1_N11
MEM_MA_DQS2_P11
MEM_MA_DQS2_N11
MEM_MA_DQS3_P11
C C
+1.5VS
B B
MEM_MA_DQS3_N11
MEM_MA_DQS4_P11
MEM_MA_DQS4_N11
MEM_MA_DQS5_P11
MEM_MA_DQS5_N11
MEM_MA_DQS6_P11
MEM_MA_DQS6_N11
MEM_MA_DQS7_P11
MEM_MA_DQS7_N11
MEM_MA_CLK0_P11
MEM_MA_CLK0_N11
MEM_MA_CLK1_P11
MEM_MA_CLK1_N11
MEM_MA_CLK2_P11
MEM_MA_CLK2_N11
MEM_MA_CLK3_P11
MEM_MA_CLK3_N11
MEM_MA_RST#11
R1161 1K-1-04R1161 1K-1-04
MEM_MA_CKE011
MEM_MA_CKE111
MEM_MA0_ODT011
MEM_MA0_ODT111
MEM_MB0_ODT011
MEM_MB0_ODT111
MEM_MA0_CS#011
MEM_MA0_CS#111
MEM_MB0_CS#011
MEM_MB0_CS#111
MEM_MA_RAS#11
MEM_MA_CAS#11
MEM_MA_WE#11
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_EVENT#
R17
H19
H18
H17
G17
H15
G18
W17
G15
R18
D15
D21
H22
AB20
AA16
R22
W22
AC20
AC21
AB16
AC16
M17
M16
M19
M18
W19
W15
W16
J17
F19
E19
T19
F17
E18
E16
T18
F16
B19
P23
V23
A16
B16
B20
A20
E23
E22
J22
J23
P22
V22
N18
N19
L18
L17
L23
N17
F15
E15
V15
U19
T17
U17
V16
U18
V19
V17
M_ADD0
M_ADD1
M_ADD2
M_ADD3
M_ADD4
M_ADD5
M_ADD6
M_ADD7
M_ADD8
M_ADD9
M_ADD10
M_ADD11
M_ADD12
M_ADD13
M_ADD14
M_ADD15
M_BANK0
M_BANK1
M_BANK2
M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7
M_DQS_H0
M_DQS_L0
M_DQS_H1
M_DQS_L1
M_DQS_H2
M_DQS_L2
M_DQS_H3
M_DQS_L3
M_DQS_H4
M_DQS_L4
M_DQS_H5
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7
M_CLK_H0
M_CLK_L0
M_CLK_H1
M_CLK_L1
M_CLK_H2
M_CLK_L2
M_CLK_H3
M_CLK_L3
M_RESET_L
M_EVENT_L
M_CKE0
M_CKE1
M0_ODT0
M0_ODT1
M1_ODT0
M1_ODT1
M0_CS_L0
M0_CS_L1
M1_CS_L0
M1_CS_L1
M_RAS_L
M_CAS_L
M_WE_L
ONTARIO (2.0)
ONTARIO (2.0)
PART 1 OF 5
PART 1 OF 5
U18E
MEMORY I/F
MEMORY I/F
ONTARIO_APU
ONTARIO_APU
M_VREF
MEM_MA_DATA0
B14
MEM_MA_DATA1
A15
MEM_MA_DATA2
A17
MEM_MA_DATA3
D18
MEM_MA_DATA4
A14
MEM_MA_DATA5
C14
MEM_MA_DATA6
C16
MEM_MA_DATA7
D16
MEM_MA_DATA8
C18
MEM_MA_DATA9
A19
MEM_MA_DATA10
B21
MEM_MA_DATA11
D20
MEM_MA_DATA12
A18
MEM_MA_DATA13
B18
MEM_MA_DATA14
A21
MEM_MA_DATA15
C20
MEM_MA_DATA16
C23
MEM_MA_DATA17
D23
MEM_MA_DATA18
F23
MEM_MA_DATA19
F22
MEM_MA_DATA20
C22
MEM_MA_DATA21
D22
MEM_MA_DATA22
F20
MEM_MA_DATA23
F21
MEM_MA_DATA24
H21
MEM_MA_DATA25
H23
MEM_MA_DATA26
K22
MEM_MA_DATA27
K21
MEM_MA_DATA28
G23
MEM_MA_DATA29
H20
MEM_MA_DATA30
K20
MEM_MA_DATA31
K23
MEM_MA_DATA32
N23
MEM_MA_DATA33
P21
MEM_MA_DATA34
T20
MEM_MA_DATA35
T23
MEM_MA_DATA36
M20
MEM_MA_DATA37
P20
MEM_MA_DATA38
R23
MEM_MA_DATA39
T22
MEM_MA_DATA40
V20
MEM_MA_DATA41
V21
MEM_MA_DATA42
Y23
MEM_MA_DATA43
Y22
MEM_MA_DATA44
T21
MEM_MA_DATA45
U23
MEM_MA_DATA46
W23
MEM_MA_DATA47
Y21
MEM_MA_DATA48
Y20
MEM_MA_DATA49
AB22
MEM_MA_DATA50
AC19
MEM_MA_DATA51
AA18
MEM_MA_DATA52
AA23
MEM_MA_DATA53
AA20
MEM_MA_DATA54
AB19
MEM_MA_DATA55
Y18
MEM_MA_DATA56
AC17
MEM_MA_DATA57
Y16
MEM_MA_DATA58
AB14
MEM_MA_DATA59
AC14
MEM_MA_DATA60
AC18
MEM_MA_DATA61
AB18
MEM_MA_DATA62
AB15
MEM_MA_DATA63
AC15
CPU_M_VREF_SUS
M23
M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7
M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15
M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23
M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31
M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39
M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47
M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55
M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63
+1.5VS
M_ZVDDIO_MEM_S
connection to VDDIO_SUS should
be directly to the plane without a long trace
R975 39.2-1-04R975 39.2-1-04
M22
MEM_MA_DATA[0..63] 11
+1.05V
C_UMI_P_RX013
C_UMI_N_RX013
C_UMI_P_RX113
C_UMI_N_RX113
C_UMI_P_RX213
C_UMI_N_RX213
C_UMI_P_RX313
C_UMI_N_RX313
R973 2K-1-04R973 2K-1-04
U18A
ONTARIO (2.0)
ONTARIO (2.0)
PART 2 OF 5
PART 2 OF 5
ONTARIO_APU
ONTARIO_APU
U18A
PCIE I/F
PCIE I/F
UMI I/F
UMI I/F
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_ZVSS
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
AB6
AC6
AB3
AC3
Y1
Y2
V3
V4
AA14
AB12
AC12
AC11
AB11
AA8
Y8
AB8
AC8
UMI_P_TX0
UMI_N_TX0
UMI_P_TX1
UMI_N_TX1
UMI_P_TX2
UMI_N_TX2
UMI_P_TX3
UMI_N_TX3
P_GPP_RXP0
AA6
P_GPP_RXN0
Y6
P_GPP_RXP1
AB4
P_GPP_RXN1
AC4
P_GPP_RXP2
AA1
P_GPP_RXN2
AA2
P_GPP_RXP3
Y4
P_GPP_RXN3
Y3
ON_ZVDD ON_ZVSS
UMI_P_RX0
UMI_N_RX0
UMI_P_RX1
UMI_N_RX1
UMI_P_RX2
UMI_N_RX2
UMI_P_RX3
UMI_N_RX3
Y14
AA12
Y12
AA10
Y10
AB10
AC10
AC7
AB7
P_ZVDD_10
P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3
ROUTE A-LINK DIFF PAIR @ 85 OHM +/- 10%
R974 1.27K-1-04R974 1.27K-1-04
C1003 .1U-10-04R-KC1003 .1U-10-04R-K
C1004 .1U-10-04R-KC1004 .1U-10-04R-K
C1005 .1U-10-04R-KC1005 .1U-10-04R-K
C1006 .1U-10-04R-KC1006 .1U-10-04R-K
C1007 .1U-10-04R-KC1007 .1U-10-04R-K
C1008 .1U-10-04R-KC1008 .1U-10-04R-K
C1009 .1U-10-04R-KC1009 .1U-10-04R-K
C1010 .1U-10-04R-KC1010 .1U-10-04R-K
C_UMI_P_TX0 13
C_UMI_N_TX0 13
C_UMI_P_TX1 13
C_UMI_N_TX1 13
C_UMI_P_TX2 13
C_UMI_N_TX2 13
C_UMI_P_TX3 13
C_UMI_N_TX3 13
+1.5VS
C1011
R976
R976
1K-1-04
1K-1-04
C1011
@.1U-16-04Y-Z
@.1U-16-04Y-Z
CPU_M_VREF_SUS
A A
5
R977
R977
1K-1-04
1K-1-04
C1012
C1012
.1U-16-04Y-Z
.1U-16-04Y-Z
C1013
C1013
@.01U-25-04X-K
@.01U-25-04X-K
Shuttle Inc
Shuttle Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Shuttle Inc
S1G4 HT
S1G4 HT
S1G4 HT
A14RV
A14RV
A14RV
A0
A0
839Tuesday, April 10, 2012
839Tuesday, April 10, 2012
839Tuesday, April 10, 2012
1
A0
5
+3.3V
R981 1K-04R981 1K-04
R990 1K-04R990 1K-04
R991 1K-04R991 1K-04
R992 1K-04R992 1K-04
R982 1K-04R982 1K-04
+1.8V
D D
R1002 1K-04R1002 1K-04
R983 1K-04R983 1K-04
R1004 1K-04R1004 1K-04
R1005 1K-04R1005 1K-04
R1008 1K-04R1008 1K-04
R988 1K-04R988 1K-04
R1011 300-04R1011 300-04
R1012 300-04R1012 300-04
SMBCLK_EC11,19,27
SMBDAT_EC11,19,27
C C
D S
2N7002K
2N7002K
APU_SIC
APU_SID
PROCHOT#
APU_ALERT#
APU_THERMTRIP#
CPU_SVC_R
CPU_SVD_R
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
APU_PWRGD
DBREQ#
12
R1015
R1015
100K-04
100K-04
D S
Q72
Q72
2N7002K
2N7002K
D21
D21
G
Q73
Q73
D22 @CD4148WSPD22 @CD4148WSP
+3.3V
12
R1016
R1016
100K-04
100K-04
G
AC
@CD4148WSP
@CD4148WSP
AC
APU_SIC
R1023 @0-04R1023 @0-04
APU_SID
APU_SID
R1028 @0-04R1028 @0-04
EC_PROCHOT19
SCLK3 14
SB_PROCHOT#13
SDATA3 14
CPU_SVC32
CPU_SVD32
R1026 0-04R1026 0-04
D23
D23
@CD4148WSP
@CD4148WSP
2N7002K
2N7002K
Q74
Q74
+CPU_CORE
12
R1032
R1032
100K-04
100K-04
AUX_OFF 33
C1021
R1034 1K-04R1034 1K-04
1 2
Z0515APU_THERMTRIP#
C1022
C1022
.1U-16-04Y-Z
.1U-16-04Y-Z
B
C1021
Q75
Q75
2N3904
2N3904
1U-10-06Y-Z
1U-10-06Y-Z
E C
4
ANALOG/DISPLAY/MISC
ANALOG/DISPLAY/MISC
TDP1_TXP0
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
DBREQ#
A8
TDP1_TXN0
B8
TDP1_TXP1
B9
TDP1_TXN1
A9
TDP1_TXP2
D10
TDP1_TXN2
C10
TDP1_TXP3
A10
TDP1_TXN3
B10
LTDP0_TXP0
B5
LTDP0_TXN0
A5
LTDP0_TXP1
D6
LTDP0_TXN1
C6
LTDP0_TXP2
A6
LTDP0_TXN2
B6
LTDP0_TXP3
D8
LTDP0_TXN3
C8
CLKIN_H
V2
CLKIN_L
V1
DISP_CLKIN_H
D2
DISP_CLKIN_L
D1
SVC
J1
SVD
J2
SIC
P3
SID
P4
RESET_L
T3
PWROK
T4
PROCHOT_L
U1
THERMTRIP_L
U2
ALERT_L
T2
TDI
N2
TDO
N1
TCK
P1
TMS
P2
TRST_L
M4
DBRDY
M3
DBREQ_L
M1
VDDCR_NB_SENSE
F4
VDDCR_CPU_SENSE
G1
VDDIO_MEM_S_SENSE
F3
VSS_SENSE
F1
RSVD_1
B4
RSVD_2
W11
RSVD_3
V5
R1035 0-04R1035 0-04
1 2
R1036 0-04R1036 0-04
1 2
R1037 0-04R1037 0-04
1 2
R1038 0-04R1038 0-04
1 2
DISPLAYPORT 0 DISPLAYPORT 1
DISPLAYPORT 0 DISPLAYPORT 1
CLK
CLK
SER
SER
JTAG CTRL
JTAG CTRL
ONTARIO (2.0)
ONTARIO (2.0)
PART 3 OF 5
PART 3 OF 5
TMDSB_D2+21
TMDSB_D2-21
TMDSB_D1+21
TMDSB_D1-21
TMDSB_D0+21
TMDSB_D0-21
TMDSB_CLK+21
TMDSB_CLK-21
NB_LVDS_TX_L2P20
NB_LVDS_TX_L2N20 EDID_DATA 20
NB_LVDS_TX_L1P20
NB_LVDS_TX_L1N20
NB_LVDS_TX_L0P20
NB_LVDS_TX_L0N20
NB_LVDS_TX_CLKLP20
NB_LVDS_TX_CLKLN20
APU_CLKP13
APU_CLKN13
DISP_CLKP13
DISP_CLKN13
R1021 0-04R1021 0-04
1 2
R1020 0-04R1020 0-04
1 2
APU_PWRGD13,32
AC
DS
PROCHOT#
APU_ALERT#15
C1018
C1018
.1U-16-04Y-Z
.1U-16-04Y-Z
CPU_SVC_R
CPU_SVD_R
APU_SIC
APU_SID
LDT_RST#_R
APU_THERMTRIP#
G
VDDNB_RUN_FB_H
VSS_SENSE
VDDCR_NB_SENSE
3
U18B
U18B
DP MISC
DP MISC
VGA DAC
VGA DAC
TEST
TEST
ONTARIO_APU
ONTARIO_APU
CPU_VDD0_RUN_FB_L 32
CPU_VDD0_RUN_FB_H 32
CPU_VDDNB_RUN_FB_L 32
CPU_VDDNB_RUN_FB_H 32
DP_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL
TDP1_AUXP
TDP1_AUXN
TDP1_HPD
LTDP0_AUXP
LTDP0_AUXN
LTDP0_HPD
DAC_RED
DAC_REDB
DAC_GREEN
DAC_GREENB
DAC_BLUE
DAC_BLUEB
DAC_HSYNC
DAC_VSYNC
DAC_SCL
DAC_SDA
DAC_ZVSS
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST31
TEST33_H
TEST33_L
TEST34_H
TEST34_L
TEST35
TEST36
TEST37
TEST38
DMAACTIVE_L
TEST4
TEST5
TEST6
ONDP_CALR
H3
G2
H2
ON_VARY
H1
B2
C2
C1
A3
B3
DP0_HPD
D3
C12
R1013 150-1-04R1013 150-1-04
1 2
D13
A12
R1014 150-1-04R1014 150-1-04
B12
1 2
A13
R1017 150-1-04R1017 150-1-04
1 2
B13
E1
E2
F2
D4
DAC_RSET
R1022 470-1-04R1022 470-1-04
D12
R1
R2
R6
T5
APU_BP0_TSTCLK_USCLK1
E4
K4
L1
APU_TEST18_PLLTEST1
L2
APU_TEST19_PLLTEST0
M2
APU_TEST25_H_BYPASSCLK
K1
APU_TEST25_L_BYPASSCLK
K2
L5
M5
M21
C1019
C1019
J18
C1020
C1020
.1U-10-04R-K
.1U-10-04R-K
J19
.1U-10-04R-K
.1U-10-04R-K
U15
T15
APU_TEST35
H4
APU_TEST36
N5
R5
K3
T1
R1033
R1033
1K-04
1K-04
1 2
+1.8V
R989 150-1-04R989 150-1-04
R994 100K-04R994 100K-04
R997 100K-04R997 100K-04
R999 100K-04R999 100K-04
HDMI_HPD 21
EDID_CLK 20
1 2
1 2
1 2
1 2
1 2
1 2
1 2
VGA_R
VGA_G
VGA_B
R1030 51-04R1030 51-04
R1031 51-04R1031 51-04
ALLOW_LDTSTP 13
R1121 0-04R1121 0-04
1 2
R1385 0-04R1385 0-04
1 2
R1386 0-04R1386 0-04
1 2
HSYNC# 20
VSYNC# 20
DAC_SCL 20
DAC_SDAT 20
2
NB_LCD_BKL_EN 19,20
NB_LCD_PWR_EN 19,20
HDMI_DDC_CLK 21
HDMI_DDC_DAT 21
NB_VGA_R 20
NB_VGA_G 20
NB_VGA_B 20
EDID_CLK
R978 2K-04R978 2K-04
DP0_HPD
1 2
1 2
1 2
1 2
1 2
R979 2K-04R979 2K-04
1 2
R980 100K-04R980 100K-04
EDID_DATA
R995 1K-04R995 1K-04
R1001 1K-04R1001 1K-04
R1003 1K-04R1003 1K-04
R984 510-1-04R984 510-1-04
1 2
APU_BP0_TSTCLK_USCLK1
APU_TEST18_PLLTEST1
APU_TEST19_PLLTEST0
APU_TEST25_H_BYPASSCLK
APU_TEST25_L_BYPASSCLK
APU_TEST35
APU_TEST36
1
+5V
+5V
R985 510-1-04R985 510-1-04
1 2
R1007 1K-04R1007 1K-04
1 2
R987 1K-04R987 1K-04
1 2
+1.8V
+3.3V
R1039
R1039
@10K-04
@10K-04
B B
APU_THERMTRIP#
B
E C
Q76
Q76
@2N3904
@2N3904
R1162
R1162
1 2
@0-04
@0-04
CPU_THERMTRIP# 14
+3.3VS
R1040
R1040
@2.2K-04
@2.2K-04
+1.8V
R1041
R1041
300-04
300-04
B
R1042 @0-04R1042 @0-04
KBRST#14,19
form SB
LDT_RST#13
C1023
C1023
@100N-04
@100N-04
E C
Q77 @2N3904Q77 @2N3904
HI voltage level control
(3.3 ->1.5)
Keep net CPU_LDT_RST# no stub
R1043 0-04R1043 0-04
LDT_RST#_R
C1024
C1024
@180p-04
@180p-04
WARM BOOT
A A
Shuttle Inc
Shuttle Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Shuttle Inc
S1G4 DDR
S1G4 DDR
S1G4 DDR
A14RV
A14RV
A14RV
1
A0
A0
939Tuesday, April 17, 2012
939Tuesday, April 17, 2012
939Tuesday, April 17, 2012
A0
of
of
of
5
4
3
2
1
C1030
C1030
150P-50-04N-J
150P-50-04N-J
C1054
C1054
1U-10-04R-K
1U-10-04R-K
C1031
C1031
.1U-10-04R-K
.1U-10-04R-K
C1055
C1055
150P-50-04N-J
150P-50-04N-J
C1070
C1070
150P-50-04N-J
150P-50-04N-J
+CPU_CORE
+CPU_VDDNB
C1057
C1057
C1071
C1071
1U-10-04R-K
1U-10-04R-K
C1044
C1044
1U-10-04R-K
1U-10-04R-K
C1045
C1045
1U-10-04R-K
1U-10-04R-K
C1058
C1058
10U-6.3-06R
10U-6.3-06R
C1072
C1072
1U-10-04R-K
1U-10-04R-K
C1035
C1035
10U-6.3-06R
10U-6.3-06R
22U-6.3-08R-K
22U-6.3-08R-K
C1073
C1073
1U-10-04R-K
1U-10-04R-K
C1036
C1036
10U-6.3-06R
10U-6.3-06R
C1059
C1059
10U-6.3-06R
10U-6.3-06R
C1048
C1048
.1U-10-04R-K
.1U-10-04R-K
C1049
C1049
.1U-10-04R-K
.1U-10-04R-K
C1076
C1076
.1U-10-04R-K
.1U-10-04R-K
C1039
C1039
150P-50-04N-J
150P-50-04N-J
C1062
C1062
150P-50-04N-J
150P-50-04N-J
C1077
C1077
.1U-10-04R-K
.1U-10-04R-K
C1040
C1040
150P-50-04N-J
150P-50-04N-J
C1063
C1063
150P-50-04N-J
150P-50-04N-J
C1078
C1078
.1U-10-04R-K
.1U-10-04R-K
+CPU_CORE
4500mA
D D
+CPU_VDDNB
8000mA
+1.5VS
2000mA
C C
W18
E5
E6
G6
G8
H5
H7
M6
M8
N7
R8
E8
E11
E13
F12
G11
G13
H9
H12
K11
K13
L10
L12
L14
M11
M12
M13
N10
N12
N14
P11
P13
G16
G19
E17
J16
L16
L19
N16
R16
R19
U16
F5
F7
J6
J8
L7
F9
VDDCR_CPU_1
VDDCR_CPU_2
VDDCR_CPU_3
VDDCR_CPU_4
VDDCR_CPU_5
VDDCR_CPU_6
VDDCR_CPU_7
VDDCR_CPU_8
VDDCR_CPU_9
VDDCR_CPU_10
VDDCR_CPU_11
VDDCR_CPU_12
VDDCR_CPU_13
VDDCR_CPU_14
VDDCR_CPU_15
VDDCR_NB_1
VDDCR_NB_2
VDDCR_NB_3
VDDCR_NB_4
VDDCR_NB_5
VDDCR_NB_6
VDDCR_NB_7
VDDCR_NB_8
VDDCR_NB_9
VDDCR_NB_10
VDDCR_NB_11
VDDCR_NB_12
VDDCR_NB_13
VDDCR_NB_14
VDDCR_NB_15
VDDCR_NB_16
VDDCR_NB_17
VDDCR_NB_18
VDDCR_NB_19
VDDCR_NB_20
VDDCR_NB_21
VDDCR_NB_22
VDDIO_MEM_S_1
VDDIO_MEM_S_2
VDDIO_MEM_S_3
VDDIO_MEM_S_4
VDDIO_MEM_S_5
VDDIO_MEM_S_6
VDDIO_MEM_S_7
VDDIO_MEM_S_8
VDDIO_MEM_S_9
VDDIO_MEM_S_10
VDDIO_MEM_S_11
U18C
U18C
ONTARIO (2.0)
ONTARIO (2.0)
PART 4 OF 5
PART 4 OF 5
POWER
POWER
ONTARIO_APU
ONTARIO_APU
VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4
VDD_18_5
VDD_18_6
VDD_18_7
VDD_18_DAC
VDDPL_10
VDD_10_1
VDD_10_2
VDD_10_3
VDD_10_4
VDD_33
2000mA
U8
W8
U6
U9
W6
T7
V7
R1044 BD-QT2012RL-80R1044 BD-QT2012RL-80
150mA
200mA
R1045 0-08R1045 0-08
B51
B51
BD-QT1608RL-120
BD-QT1608RL-120
W9
U11
5500mA
U13
W13
V12
T12
+3.3V
500mA
A4
+1.8VVDDAN_18_DAC
+1.05VVDDPL_10
+1.05V
+1.8VVDD_18
VDD_18
C1025
C1025
10U-6.3-06R
10U-6.3-06R
C1026
C1026
1U-10-04R-K
1U-10-04R-K
C1027
C1027
1U-10-04R-K
1U-10-04R-K
C1028
C1028
@1U-10-04R-K
@1U-10-04R-K
C1029
C1029
@1U-10-04R-K
@1U-10-04R-K
VDDAN_18_DAC VDDPL_10
C1050
C1050
C1052
C1052
C1051
C1051
1U-10-04R-K
1U-10-04R-K
150P-50-04N-J
150P-50-04N-J
1U-10-04R-K
1U-10-04R-K
+1.05V
C1064
C1064
C1066
C1066
C1068
1U-10-04R-K
1U-10-04R-K
C1068
.1U-10-04R-K
.1U-10-04R-K
10U-6.3-06R
10U-6.3-06R
+3.3V
C1080
C1080
C1081
C1081
1U-10-04R-K
1U-10-04R-K
.1U-10-04R-K
.1U-10-04R-K
+1.5VS
C1156
C1156
C1157
C1153
C1153
C1154
C1154
C1085
C1091
C1091
1U-10-04R-K
1U-10-04R-K
C1085
150P-50-04N-J
150P-50-04N-J
22U-6.3-08R-K
22U-6.3-08R-K
C1094
C1094
.1U-10-04R-K
.1U-10-04R-K
22U-6.3-08R-K
22U-6.3-08R-K
C1095
C1095
.1U-10-04R-K
.1U-10-04R-K
VSS_1
A7
PART 5 OF 5
PART 5 OF 5
VSS_2
B7
VSS_3
B11
VSS_4
B17
VSS_5
B22
VSS_6
C4
VSS_7
D5
VSS_8
D7
VSS_9
D9
VSS_10
D11
VSS_11
D14
VSS_12
B15
VSS_13
D17
VSS_14
D19
VSS_15
E7
VSS_16
E9
VSS_17
B B
A A
E12
VSS_18
E20
VSS_19
F8
VSS_20
F11
VSS_21
F13
VSS_22
G4
VSS_23
G5
VSS_24
G7
VSS_25
G9
VSS_26
G12
VSS_27
G20
VSS_28
G22
VSS_29
H6
VSS_30
H11
VSS_31
H13
VSS_32
J4
VSS_33
J5
VSS_34
J7
VSS_35
J20
VSS_36
K10
VSS_37
K14
VSS_38
L4
VSS_39
L6
VSS_40
L8
VSS_41
L11
VSS_42
L13
VSS_43
L20
VSS_44
L22
VSS_45
M7
VSS_46
N4
VSS_47
N6
VSS_48
N8
VSS_49
N11
ONTARIO_APU
ONTARIO_APU
GROUND
GROUND
VSSBG_DAC
VSS_50
N13
VSS_51
N20
VSS_52
N22
VSS_53
P10
VSS_54
P14
VSS_55
R4
VSS_56
R7
VSS_57
R20
VSS_58
T6
VSS_59
T9
VSS_60
T11
VSS_61
T13
VSS_62
U4
VSS_63
U5
VSS_64
U7
VSS_65
U12
VSS_66
U20
VSS_67
U22
VSS_68
V8
VSS_69
V9
VSS_70
V11
VSS_71
V13
VSS_72
W1
VSS_73
W2
VSS_74
W4
VSS_75
W5
VSS_76
W7
VSS_77
W12
VSS_78
W20
VSS_79
Y5
VSS_80
Y7
VSS_81
Y9
VSS_82
Y11
VSS_83
Y13
VSS_84
Y15
VSS_85
Y17
VSS_86
Y19
VSS_87
AA4
VSS_88
AA22
VSS_89
AB2
VSS_90
AB5
VSS_91
AB9
VSS_92
AB13
VSS_93
AB17
VSS_94
AB21
VSS_95
AC5
VSS_96
AC9
VSS_97
AC13
A11
C1090
C1090
1U-10-04R-K
1U-10-04R-K
U18D
U18D
ONTARIO (2.0)
ONTARIO (2.0)
C1155
C1155
22U-6.3-08R-K
22U-6.3-08R-K
C1096
C1096
.1U-10-04R-K
.1U-10-04R-K
C1157
22U-6.3-08R-K
22U-6.3-08R-K
22U-6.3-08R-K
22U-6.3-08R-K
Shuttle Inc
Shuttle Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Shuttle Inc
A14RV
A14RV
A14RV
S1G4 CTRL DEBUG
S1G4 CTRL DEBUG
S1G4 CTRL DEBUG
1
A0
A0
10 39Tuesday, April 10, 2012
10 39Tuesday, April 10, 2012
10 39Tuesday, April 10, 2012
A0
of
of
of
5
+3.3V
D D
DDR_VREF1
MEM_MA_RST#8
MEM_MA_BANK[0..2]8
MEM_MA_DM[0..7]8
C C
B B
DDR3 SODIMM0
C1102
C1102
C1101
C1101
.1U-16-04Y-Z
.1U-16-04Y-Z
1U-10-04R-K
1U-10-04R-K
+3.3V
R1050 10K-04R1050 10K-04
1 2
R1048 10K-04R1048 10K-04
1 2
SDATA014
SCLK014
MEM_MB0_CS#08
MEM_MB0_CS#18
MEM_MA_WE#8
MEM_MA_CAS#8
MEM_MA_RAS#8
MEM_MA_CKE08
MEM_MA_CKE18
MEM_MA_CLK2_P8
MEM_MA_CLK3_P8
MEM_MA_CLK2_N8
MEM_MA_CLK3_N8
MEM_MA_DQS0_P8
MEM_MA_DQS1_P8
MEM_MA_DQS2_P8
MEM_MA_DQS3_P8
MEM_MA_DQS4_P8
MEM_MA_DQS5_P8
MEM_MA_DQS6_P8
MEM_MA_DQS7_P8
MEM_MA_DQS0_N8
MEM_MA_DQS1_N8
MEM_MA_DQS2_N8
MEM_MA_DQS3_N8
MEM_MA_DQS4_N8
MEM_MA_DQS5_N8
MEM_MA_DQS6_N8
MEM_MA_DQS7_N8
DDR_VREF0
MEM_MB0_ODT08
MEM_MB0_ODT18
+0.75VS
JP2
JP2
JP4
JP4
TOPOPEN-2MM
TOPOPEN-2MM
12
TOPOPEN-2MM
TOPOPEN-2MM
12
MEM_MA_ADD[0..15]8
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
C1105
C1105
.1U-16-04Y-Z
.1U-16-04Y-Z
CON_DDR3_R40_RK-20401-TP4B
CON_DDR3_R40_RK-20401-TP4B
125
30
126
198
77
122
197
201
200
202
109
108
79
114
121
11
28
46
63
136
153
170
187
113
115
110
73
74
101
102
103
104
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
116
120
203
204
185
189
190
195
196
S1
S2
1
NC/TEST
RESET#
VREF_CA
TS#
NC1
NC2
SA0
SA1
SDA
SCL
BA0
BA1
BA2
S0#
S1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
WE#
CAS#
RAS#
CKE0
CKE1
CK0
CK1
CK#0
CK#1
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
ODT0
ODT1
VREF_DQ
VTT
VTT
VSS
VSS
VSS
VSS
VSS
NC
NC
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
A098A197A296A4
2
A15
　玡⊿钡
?
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD3
MEM_MA_ADD7
MEM_MA_ADD4
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD15
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
107
80
A591A690A7
119
86
85
78
A889A9
A1184A1283A14
A13
A10/AP
95
92
A3
VSS3VSS8VSS9VSS13VSS14VSS19VSS20VSS25VSS26VSS31VSS32VSS37VSS38VSS43VSS
VSS
NC/A15
199
VDDSPD
44
VSS
48
49
75
VSS
54
C1100
C1100
.1U-16-04Y-Z
.1U-16-04Y-Z
76
VDD
VSS
VSS
55
4
VDD93VDD94VDD99VDD
VDD88VDD87VDD82VDD81VDD
VSS60VSS61VSS65VSS66VSS71VSS72VSS
127
3
C1104
C1104
.1U-16-04Y-Z
.1U-16-04Y-Z
R1047 10K-04R1047 10K-04
1 2
R1049 10K-04R1049 10K-04
1 2
SDATA014
SCLK014
MEM_MA0_CS#08
MEM_MA0_CS#18
MEM_MA_WE#8
MEM_MA_CAS#8
MEM_MA_RAS#8
MEM_MA_CKE08
MEM_MA_CKE18
MEM_MA_DQS0_P8
MEM_MA_DQS1_P8
MEM_MA_DQS2_P8
MEM_MA_DQS3_P8
MEM_MA_DQS4_P8
MEM_MA_DQS5_P8
MEM_MA_DQS6_P8
MEM_MA_DQS7_P8
MEM_MA_DQS0_N8
MEM_MA_DQS1_N8
MEM_MA_DQS2_N8
MEM_MA_DQS3_N8
MEM_MA_DQS4_N8
MEM_MA_DQS5_N8
MEM_MA_DQS6_N8
MEM_MA_DQS7_N8
MEM_MA0_ODT08
MEM_MA0_ODT18
TOPOPEN-2MM
TOPOPEN-2MM
12
TOPOPEN-2MM
TOPOPEN-2MM
12
MEM_MA_ADD[0..15]8
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
C1106
C1106
.1U-16-04Y-Z
.1U-16-04Y-Z
MEM_MA_ADD0
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD1
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD7
MEM_MA_ADD4
MEM_MA_ADD8
95
92
86
A3
A098A197A296A4
125
30
126
198
77
122
197
201
200
202
109
108
79
114
121
11
28
46
63
136
153
170
187
113
115
110
73
74
101
102
103
104
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
116
120
1
203
204
185
189
190
195
196
S1
S2
CON_S-DDR3-S40_2-2013022-1_TYCO
CON_S-DDR3-S40_2-2013022-1_TYCO
A591A690A7
NC/TEST
RESET#
VREF_CA
TS#
NC1
NC2
SA0
SA1
SDA
SCL
BA0
BA1
BA2
S0#
S1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
WE#
CAS#
RAS#
CKE0
CKE1
CK0
CK1
CK#0
CK#1
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
ODT0
ODT1
VREF_DQ
VTT
VTT
VSS
VSS
VSS
VSS
VSS
NC
NC
VSS3VSS8VSS9VSS13VSS14VSS19VSS20VSS25VSS26VSS31VSS32VSS37VSS38VSS43VSS
VSS
2
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
107
85
A889A9
A1184A1283A14
A10/AP
DDR_VREF1
C1103
C1103
1U-10-04R-K
+1.5VS
CN36
100
105
VDD
VSS
VSS
133
128
CN36
106
111
112
117
118
123
124
MEM_MA_DATA0
VDD
VSS
134
138
5
VDD
VDD
VDD
VDD
VDD
VDD
DQ0
MEM_MA_DATA1
7
DQ1
MEM_MA_DATA6
15
DQ2
MEM_MA_DATA7
17
DQ3
MEM_MA_DATA4
4
DQ4
MEM_MA_DATA5
6
DQ5
MEM_MA_DATA3
16
DQ6
MEM_MA_DATA2
18
DQ7
MEM_MA_DATA9
21
DQ8
MEM_MA_DATA8
23
DQ9
MEM_MA_DATA11
33
DQ10
MEM_MA_DATA15
35
DQ11
MEM_MA_DATA12
22
DQ12
MEM_MA_DATA13
24
DQ13
MEM_MA_DATA14
34
DQ14
MEM_MA_DATA10
36
DQ15
MEM_MA_DATA21
39
DQ16
MEM_MA_DATA17
41
DQ17
MEM_MA_DATA23
51
DQ18
MEM_MA_DATA18
53
DQ19
MEM_MA_DATA20
40
DQ20
MEM_MA_DATA16
42
DQ21
MEM_MA_DATA22
50
DQ22
MEM_MA_DATA19
52
DQ23
MEM_MA_DATA25
57
DQ24
MEM_MA_DATA24
59
DQ25
MEM_MA_DATA27
67
DQ26
MEM_MA_DATA26
69
DQ27
MEM_MA_DATA29
56
DQ28
MEM_MA_DATA28
58
DQ29
MEM_MA_DATA30
68
DQ30
MEM_MA_DATA31
70
DQ31
MEM_MA_DATA37
129
DQ32
MEM_MA_DATA33
131
DQ33
MEM_MA_DATA34
141
DQ34
MEM_MA_DATA35
143
DQ35
MEM_MA_DATA36
130
DQ36
MEM_MA_DATA32
132
DQ37
MEM_MA_DATA38
140
DQ38
MEM_MA_DATA39
142
DQ39
MEM_MA_DATA45
147
DQ40
MEM_MA_DATA41
149
DQ41
MEM_MA_DATA46
157
DQ42
MEM_MA_DATA47
159
DQ43
MEM_MA_DATA40
146
DQ44
MEM_MA_DATA44
148
DQ45
MEM_MA_DATA43
158
DQ46
MEM_MA_DATA42
160
DQ47
MEM_MA_DATA48
163
DQ48
MEM_MA_DATA49
165
DQ49
MEM_MA_DATA50
175
DQ50
MEM_MA_DATA51
177
DQ51
MEM_MA_DATA52
164
DQ52
MEM_MA_DATA53
166
DQ53
MEM_MA_DATA54
174
DQ54
MEM_MA_DATA55
176
DQ55
MEM_MA_DATA56
181
DQ56
MEM_MA_DATA57
183
DQ57
MEM_MA_DATA58
191
DQ58
MEM_MA_DATA59
193
DQ59
MEM_MA_DATA60
180
DQ60
MEM_MA_DATA61
182
DQ61
MEM_MA_DATA62
192
DQ62
MEM_MA_DATA63
194
DQ63
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
155
150
156
151
145
139
144
MEM_MA_RST#8
MEM_MA_BANK[0..2]8
MEM_MA_DM[0..7]8
1U-10-04R-K
MEM_MA_DATA[0..63] 8
MEM_MA_CLK0_P8
MEM_MA_CLK1_P8
MEM_MA_CLK0_N8
MEM_MA_CLK1_N8
DDR_VREF0
+0.75VS
JP1
JP1
JP3
JP3
+3.3V
MEM_MA_ADD15
MEM_MA_ADD13
MEM_MA_ADD14
80
119
78
199
A13
NC/A15
VDDSPD
48
44
75
VSS
VSS
49
54
2
C1099
C1099
.1U-16-04Y-Z
.1U-16-04Y-Z
76
VDD
VSS
VSS
VSS60VSS61VSS65VSS66VSS71VSS72VSS
55
VDD93VDD94VDD99VDD
VDD88VDD87VDD82VDD81VDD
1
+1.5VS
CN35
100
105
VDD
VSS
VSS
127
133
128
CN35
106
111
112
117
118
123
124
MEM_MA_DATA0
VDD
VDD
VSS
VSS
134
138
5
VDD
VDD
VDD
VDD
VDD
DQ0
MEM_MA_DATA1
7
DQ1
MEM_MA_DATA6
15
DQ2
MEM_MA_DATA7
17
DQ3
MEM_MA_DATA4
4
DQ4
MEM_MA_DATA5
6
DQ5
MEM_MA_DATA3
16
DQ6
MEM_MA_DATA2
18
DQ7
MEM_MA_DATA9
21
DQ8
MEM_MA_DATA8
23
DQ9
MEM_MA_DATA11
33
DQ10
MEM_MA_DATA15
35
DQ11
MEM_MA_DATA12
22
DQ12
MEM_MA_DATA13
24
DQ13
MEM_MA_DATA14
34
DQ14
MEM_MA_DATA10
36
DQ15
MEM_MA_DATA21
39
DQ16
MEM_MA_DATA17
41
DQ17
MEM_MA_DATA23
51
DQ18
MEM_MA_DATA18
53
DQ19
MEM_MA_DATA20
40
DQ20
MEM_MA_DATA16
42
DQ21
MEM_MA_DATA22
50
DQ22
MEM_MA_DATA19
52
DQ23
MEM_MA_DATA25
57
DQ24
MEM_MA_DATA24
59
DQ25
MEM_MA_DATA27
67
DQ26
MEM_MA_DATA26
69
DQ27
MEM_MA_DATA29
56
DQ28
MEM_MA_DATA28
58
DQ29
MEM_MA_DATA30
68
DQ30
MEM_MA_DATA31
70
DQ31
MEM_MA_DATA37
129
DQ32
MEM_MA_DATA33
131
DQ33
MEM_MA_DATA34
141
DQ34
MEM_MA_DATA35
143
DQ35
MEM_MA_DATA36
130
DQ36
MEM_MA_DATA32
132
DQ37
MEM_MA_DATA38
140
DQ38
MEM_MA_DATA39
142
DQ39
MEM_MA_DATA45
147
DQ40
MEM_MA_DATA41
149
DQ41
MEM_MA_DATA46
157
DQ42
MEM_MA_DATA47
159
DQ43
MEM_MA_DATA40
146
DQ44
MEM_MA_DATA44
148
DQ45
MEM_MA_DATA43
158
DQ46
MEM_MA_DATA42
160
DQ47
MEM_MA_DATA48
163
DQ48
MEM_MA_DATA49
165
DQ49
MEM_MA_DATA50
175
DQ50
MEM_MA_DATA51
177
DQ51
MEM_MA_DATA52
164
DQ52
MEM_MA_DATA53
166
DQ53
MEM_MA_DATA54
174
DQ54
MEM_MA_DATA55
176
DQ55
MEM_MA_DATA56
181
DQ56
MEM_MA_DATA57
183
DQ57
MEM_MA_DATA58
191
DQ58
MEM_MA_DATA59
193
DQ59
MEM_MA_DATA60
180
DQ60
MEM_MA_DATA61
182
DQ61
MEM_MA_DATA62
192
DQ62
MEM_MA_DATA63
194
DQ63
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
155
150
156
151
145
139
144
MEM_MA_DATA[0..63] 8
U33
U33
SODIMM
SODIMM0
A A
SODIMM1
SMB address
A0
A2
SA1 SA0
GND GND
+3.3V
GND
SMBCLK_EC9,19,27 SMBDAT_EC 9,19,27
1
SCL
2
GND
ALERT#3VDD
populate SODIMM0 first
5
4
3
SDA
@NCT7717U
@NCT7717U
5
R1453
R1453
4
1 2
0-04
0-04
C1714
C1714
2.2U-6.3-06R-K
2.2U-6.3-06R-K
+3.3V
Shuttle Inc
Shuttle Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
Shuttle Inc
A14RV
A14RV
A14RV
DDR3 SODIMM
DDR3 SODIMM
DDR3 SODIMM
1
A0
A0
A0
of
of
of
11 39Tuesday, April 10, 2012
11 39Tuesday, April 10, 2012
11 39Tuesday, April 10, 2012
5
D D
C C
+1.5VS
MB_15
C1142
C1108
C1108
C1109
C1109
C1142
C1144
C1144
C1209
C1209
C1210
C1210
C1211
C1211
4
C1216
C1212
C1212
C1217
C1217
C1214
C1214
C1215
C1215
C1216
C1218
C1218
3
C1219
C1219
C1221
C1221
C1222
C1222
+0.75VS
C1223
C1223
C1128
C1128
4.7U-10-08Y-Z
4.7U-10-08Y-Z
C1224
C1224
C1122
C1122
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1129
C1129
.1U-16-04Y-Z
.1U-16-04Y-Z
C1123
C1123
.1U-16-04Y-Z
.1U-16-04Y-Z
2
C1125
C1125
C1126
C1126
C1127
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1133
C1133
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1127
.1U-16-04Y-Z
.1U-16-04Y-Z
C1134
C1134
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1164
C1164
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1165
C1165
.01U-25-04X-K
.01U-25-04X-K
C1135
C1135
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1124
C1124
@.1U-16-04Y-Z
@.1U-16-04Y-Z
C1131
C1131
.1U-16-04Y-Z
.1U-16-04Y-Z
+1.5VS
.1U-16-04Y-Z
.1U-16-04Y-Z
C1132
C1132
.1U-16-04Y-Z
.1U-16-04Y-Z
12
12
R1051
R1051
1K-1-04
1K-1-04
R1052
R1052
1K-1-04
1K-1-04
1
DDR_VREF0
C1166
C1166
1000P-50-04X-K
1000P-50-04X-K
10U-6.3-06R
22U-6.3-08R-K
22U-6.3-08R-K
C1621
C1621
C1141
C1141
C1620
C1620
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
10U-6.3-06R
C1622
C1622
.1U-16-04Y-Z
.1U-16-04Y-Z
C1195
C1195
1000P-50-04X-K
1000P-50-04X-K
C1148
C1148
22U-6.3-08R-K
22U-6.3-08R-K
B B
+1.5VS
C1617
C1619
C1619
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
C1139
C1139
1U-10-04R-K
1U-10-04R-K
1000P-50-04X-K
1000P-50-04X-K
C1617
C1271
C1271
5
.1U-16-04Y-Z
.1U-16-04Y-Z
2.2U-6.3-04R
2.2U-6.3-04R
C1618
C1618
+1.5VS
A A
C1149
C1149
C1624
C1624
.1U-16-04Y-Z
.1U-16-04Y-Z
C1146
C1146
1000P-50-04X-K
1000P-50-04X-K
22U-6.3-08R-K
22U-6.3-08R-K
C1623
C1623
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
C1140
C1140
2.2U-6.3-04R
2.2U-6.3-04R
220P-50-04N-J
220P-50-04N-J
1000P-50-04X-K
1000P-50-04X-K
C1197
C1197
C1627
C1627
.1U-16-04Y-Z
.1U-16-04Y-Z
C1138
C1138
1U-10-04R-K
1U-10-04R-K
1000P-50-04X-K
1000P-50-04X-K
C1113
C1113
.1U-16-04Y-Z
.1U-16-04Y-Z
1000P-50-04X-K
1000P-50-04X-K
C1147
C1147
C1254
C1254
.1U-16-04Y-Z
.1U-16-04Y-Z
4
1000P-50-04X-K
1000P-50-04X-K
C1111
C1111
1U-10-04R-K
1U-10-04R-K
C1270
C1270
1U-10-04R-K
1U-10-04R-K
C1194
C1194
1000P-50-04X-K
1000P-50-04X-K
C1115
C1115
2.2U-6.3-04R
2.2U-6.3-04R
1000P-50-04X-K
1000P-50-04X-K
C1192
C1192
C1112
C1112
2.2U-6.3-04R
2.2U-6.3-04R
C1117
C1117
2.2U-6.3-04R
2.2U-6.3-04R
1000P-50-04X-K
1000P-50-04X-K
C1193
C1193
1000P-50-04X-K
1000P-50-04X-K
1000P-50-04X-K
1000P-50-04X-K
C1120
C1120
C1114
C1114
2.2U-6.3-04R
2.2U-6.3-04R
C1118
C1118
1U-10-04R-K
1U-10-04R-K
1U-10-04R-K
1U-10-04R-K
1000P-50-04X-K
1000P-50-04X-K
C1198
C1198
1000P-50-04X-K
1000P-50-04X-K
C1121
C1121
1000P-50-04X-K
1000P-50-04X-K
C1116
C1116
.1U-16-04Y-Z
.1U-16-04Y-Z
1000P-50-04X-K
1000P-50-04X-K
C1199
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1000P-50-04X-K
1000P-50-04X-K
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C1167
C1167
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C1200
C1200
C1130
C1130
C1168
C1168
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@2.2U-6.3-04R
1000P-50-04X-K
1000P-50-04X-K
1000P-50-04X-K
1000P-50-04X-K
C1201
C1201
1000P-50-04X-K
1000P-50-04X-K
1000P-50-04X-K
1000P-50-04X-K
C1137
C1137
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C1169
C1169
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3
C1136
C1136
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C1143
C1143
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C1170
C1170
1000P-50-04X-K
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C1119
C1119
1000P-50-04X-K
1000P-50-04X-K
C1158
C1158
C1171
C1171
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1000P-50-04X-K
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C1625
C1625
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C1159
C1159
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C1172
C1172
1000P-50-04X-K
1000P-50-04X-K
C1626
C1626
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C1160
C1160
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C1173
C1173
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1000P-50-04X-K
1000P-50-04X-K
C1628
C1628
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C1161
C1161
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C1174
C1174
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C1162
C1162
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C1163
C1163
2
@2.2U-6.3-04R
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12
12
R1053
R1053
1K-1-04
1K-1-04
R1054
R1054
1K-1-04
1K-1-04
C1181
C1181
@.1U-16-04Y-Z
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C1202
C1202
.01U-25-04X-K
.01U-25-04X-K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR3 SODIMM DECOUPLING
DDR3 SODIMM DECOUPLING
DDR3 SODIMM DECOUPLING
DDR_VREF1
C1203
C1203
1000P-50-04X-K
1000P-50-04X-K
Shuttle Inc
Shuttle Inc
Shuttle Inc
A14RV
A14RV
A14RV
1
A0
A0
12 39Tuesday, April 10, 2012
12 39Tuesday, April 10, 2012
12 39Tuesday, April 10, 2012
A0
of
of
of
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