LZ2346
Twopower
LZ2346
DESCRIPTION
LZ2346 is 1 /3-type (6.0 mm) solid-state image
sensor that consists of PN phote-diodes and
CCDS (charge-coupled devices) driven by only
positive voltages. Having approximately 220000
pixels (horizontal 384 X vertical 582), the sensor
provides a stable B/W image.
FEATURES
●
Number of pixels : 362 (H) X 582 (V)
Pixel pitch : 13.6
Number of optical black pixels
●
Low fixed pattern noise and lag
●
No sticking and no image distortion
●
Blooming suppression structure
●
Built-in output amplifier
●
Variable electronic shutter (1/50 to 1/10 000 s)
●
Compatible with
●
Package : 16-pin
Mm
(H) x 6.3 Km (V)
: Horizontal; front 2 and rear 20
CCIR
standard
SDIPICERDIP](WDIPO1 6-N-0500B)
1/3 type B/W CCD Area Sensor for
supply
(+5
V and +12 V) operation
PIN CONNECTIONS
16-PIN
SDIP
~m 1
RD 2
,—— ———. —— —-— .
GND 3
0s 4
OD 5
4
H2 B 6
dH2 7
dHIB 8
I
I
I
1
I
!
I
I
,
.—. ——— —— ..__ :
i
CCIR
CCIR
TOP VIEW
16 TI
15 OFD
14
4TG
I
I
I
1
I
I
1
,
13 4V2
12
4V1
11 4V4
10 4V3
9 tiH1
!
—
BLOCK DIAGRAM
GND
0s
“IO
tie
1741
abwnca of confimtlm
data Wks,
etc Untact
TI
by device ~!ticatron
SHARP
In
order to
II
t
OD RD
4175
shseb, WAR? tikaa rM msib!lm ti
obb+n me Iataat WM oi M deviw ~Ifimtion &b teti u~ng
Horizontal Shift Register
4H1
4.2
6H16 6H2B
any
dafecta Mat wcur
4
in
qu!mnt
any SHARPS device”
using any oi SHARPS
OFD
4TG
dewcea, shm !n cshlcgs,
PIN DESCRIPTION
SYMBOL
RD
OD
I
0s
!
dRs
I dVi, $V2rdV3, dV4
4HI,4H2,4H16,4H2B
d TG
I
OFD
TI
GND
PIN NAME
Reset transistor drain
Output transistor drain
I
Video
OUtDUt
I
Reset transistor gate clock
I
Vertical shift register gate clock
Horizontal shift register gate clock
Transfer gate clock
I
Overflow drain
Test terminal
Ground
LZ2346
ABSOLUTE MAXIMUM RATINGS
PARAMETER
OutDut
transistor drain
Reset transistor drain voltage
Test terminal, TI
Reset gate clock voltage
Vertical shift register clock voltage
Horizontal shift register clock voltage
Transfer gate clock voltage
Overflow drain voltage
Storage temperature
ODeratina
ambient temperature
VOltage
SYMBOL
VOD
vRD
VTI
vdRs
Vdv
V+t.
V+TG
vOFD
Tstg
Topr
RATING
+15
Oto
Oto +15
Oto +15
–0.3 to +15
–0.3 to
+15
–0.3 to +15
–0,3 to +15
O to
+27
–40 to
+85
–20 to +70
(Ta
=25°C)
UNIT
v
v
v
v
v
v
v
v
“c
‘c
175
RECOMMENDED OPERATING CONDITIONS
PARAM~ER
Operating ambient temperature
Output transistor drain voltage
Reset transistor drain voltage
Overflow
drain
voltage
Test terminal, T!
Ground voltage
Transfer gate clock
Vertical
register clock
Horizontal shift
register clock
Reset gate
Vertical
Horizontal shift register clock frequency
Reset gate clock frequency
Horizontal shift register clock phase
When DC is applied
When pulse is applied
p-p level
LOW level
HIGH level
shiti
LOW level
HIGH level
LOW level
HIGH level
level
clcck
shif-t register clock frequency
LOW
HIGH
level
VH! -2L, V 4 HI B-2BL – 0.05
VdHI-ZH, VBd HI
SYMBOL
MIN.
Topr 25.0
Voo
VRD
V
OFD
V60m
VT1
GND
v
$
VdV1-4L
V4VI-4H
fdH1-2,
twl ,
TGL
v
dTGH
V4RSL
VdRSH
fdvl-4
f#HIB-2B
f$m
B-ZBH
twz
– 0.05 0.0 0.05
–
V
RD – 6.0
TYP.
12,0 12.5
3.0
MAX.
14.0
Voo
12,0 v
12,0 12.5 14.0
Voo
0.0
12.0
4.7
12.5 14,0
0.05
4.7
0.0 0,05
5.0 6.0
0,0
5.0
0.0
15.63
6,75 MHz
6.75 MHz
0.0
5,0
0.05
6.0
VHD
-10.5 v
9,5
10.0
UNIT
‘c
v
v
v
v
v
v
v
v
v
v
v
v
kHz
ns
LZ2346
NOTE
1
2
3
NOTES :
1. When DC voltage is applied, shutter speed is 1 /50 seconds.
2. When pulse is applied, shutter spaed is less than 1/50 seconds.
3
~
“
~
twl
,, ,,
-
::
,,
-
twz
‘H’”
‘“l’”
176