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LRS1329
Datasheet
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Sharp LRS1329 Datasheet

®
Integrated Circuits Group
LRS1329
Stacked Chip
16M Flash and 2M SRAM
(Model No.: LRS1329)
Spec No.: MFM2-J11601
PRELIMINARY PRODUCT SPECIFICATIONS
SHARP
LRS1329
l
Handle this document carefully for it contains material protected by international copyright law. Any reproduction,
full or in part,. of this material is prohibited
without the express written permission of the company.
l
When using the products covered herein, please observe.the conditions written herein and the precautions outlined in the following paragraphs. In no event shall the company be liable for any damages resulting from failure to strictly adhere to these conditions and precautions.
(1) The products covered herein are designed and manufactured for the following
application areas. When using the products covered herein for the equipment
listed in Paragraph (2), even for the following application areas, be sure to observe the precautions given in Paragraph (2). Never use the products for the equipment listed in Paragraph (3).
*Office electronics * Instrumentation and measuring equipment *Machine tools
-Audiovisual equipment *Home appliances * Communication equipment other than for trunk lines
(2) Those contemplating using the products covered herein for the following
equipment which demands high reliability, should first contact a sales representative of the company and then accept responsibility for incorporating
into the design fail-sale operation,
redundancy, and other appropriate measures
for ensuring reliability and safety of the equipment and the overall system.
*Control and safety devices for airplanes, trains, automobiles, and other
transportation equipment
* Mainframe computers
-Traffic control systems . Gas leak detectors and automatic cutoff devices *Rescue and security equipment . Other safety devices and safety equipment,etc.
(3) Do not use the products covered herein for the following equipment which
demands extremely high performance in terms of functionality, reliability, or accuracy.
.
* Aerospace equipment . Communications equipment for trunk lines
*Control equipment for the nuclear power industry
-Medical equipment related to life support, etc.
(4) Please direct all queries and comments regarding the interpretation of the
above three Paragraphs to a sales representative of the company.
l
Please direct all queries regarding the products covered herein to a sales representative of the company.
SHARP
LRS1329
1
1. Description
Contents
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
4. Block Diagram
. . . . . . . . . . . . . . . . . . . . . . . . . .
4
5. Command Definitions for Flash Memory
- * - - * - * - - - - - * - - - - 5
8. Absolute Maximum Ratings
. . . . . . . . . . . . . . . f . . . . .
8
9. Recommended DC Operating Conditions
. . . . . . . . . . . . . . .
8
10. pi* Capacitance . - . . . . . a . . . . . a . - . a s s s s s ‘- s - e 8
11. DC Electrical Characteristics
- * - * - * * * + * - * - - * - * - *
9
12. AC Electrical Characteristics (Flash Memory) - * - * * - * * - * - * - 11
13. AC Electrical Characteristic’s (SRAM) - - * - * - - - - - - * - - - * - 18
14. Data Retention Characteristics for SRM * - * - * - - - * - - - * - - - 21
15. Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
17. Design Consideration . . . . . . . . . . . . , . . . . . . . . . . . . 24
SHARI=
LRS1329
2
Part 1 Overview
1. Description The LR S 1 3 2 9 is a combination memory organized as lMx16/2M ~8 bit
flash memory and 256K x8 bit static RAM in one package.
Features
OPower supply
. . . .
2.7 v to 3.6 V
OOperat ing temperature
. . . .
-25 “c to +85 ‘c
ONot designed or rated as radiation hardened
0
72 pin CSP
( LCSPO72-P-0811 ) plastic package
OFlash memory has P-type bulk silicon, and SRAM has P-type bulk silicon.
Flash Memory
OAccess Time
. . . .
100 ns (Max.)
OOperating current (Ihe current for F-V, pin)
Read Word/Byte write Block erase
ODeep power down current (The current for F-V,, pin)
. . .
- 25 mA (Max. t,U=200ns)
. . . .
17 mA (Max.)
. . .
- 17 mA (Max.)
* * * * 10 PA (Max. F-ZZF-Vcc-0. 2V,
F-EsO. ZV, F-V&O. 2V)
OOptimized Array Blocking Architecture
Two 4X-word/8K-byte Boot Blocks/ Six 4K-word/8K-byte Parameter Blocks/ Thirty-one 32X-word/64K-byte Main Blocks/ Top Boot Location
0 Extended Cycling Capabi 1 i ty
~100,000 Block Erase Cycles
0
Enhanced Automated Suspend Options
Word/Byte write Suspend to Read
Block Erase Suspend to Nerd/Byte write Block Erase Suspend to Read
SRAM OAccess Time
.
OOperat ing current
OStandby current OData retention current
. . . .
85 ns &ax. >
. . . .
30 d OhL >
. . . .
3 mA (Max. t,, t,=lp s)
. . . .
15 PA (Max.)
. . . .
15 ,uA (Max.)
SHARP
LRS1329
3
2. Pin Configuration
r INDEX
Block erase and Word/Byte Write : Vi, or V w, Read 1 V,, or V k,, Deep Power Down : VIL
F7@ Write Protect (Flash)
Two Boot Blocks Locked : ViL
(With F-&V m, Erase/Write can operate to all block)
F-BYTE
Byte
Enable (Flash); x8 mode: VIL, x16 mode: VI,
F-RY/BY
Ready/Busy (Flash)
During an Erase or Write operation: V,, Block Erase and Word/Byte Write Suspend: High-Z Deep Power Down: V,
DQ,to DQ, Data Input/Outputs (Common)
F-DQ 8 to F-DQ is Data Inputs/Outputs (Flash) ; Not used in x8 mode.
F-V,,
Power Supply (Flash)
s-“cc
Power Supply (SRAl4)
F-V,,
Write, Erase Power Supply (Flash)
Block Erase and Word/Byte Write : F-V,,=V,,,
:
Al 1 Blocks Locked 1 F-V,,<Vppll( F-GND GND (Flash) S-GND
GND (SRAM)
NC
No Connect
r
T, to T, Test pins (Should be open)
SHARI=
LRS1329
4
3. Truth Table (*l) Note F-a F-B F-3 F-E S-CE, S-GE, S-s S* F-mtoDPh
F-DQ
Flash
SRAM
, to hu&
Read
*4.5
H DOUT
L
output
H
L
DOUT 1 High-Z
Disable ’
Standby L H *7
H
x x.7-.
Bigh-Z
H
L
DIN
Write
*2,3,4
L DIN High-Z
Read
*6 L
DOUT
output
H
Standby
Disable *6 H H ’ ’ L H H
X High-Z High-Z
Write
*6
L
DIN
Read *6
L
DOUT
Reset Power Output
H
Down Disable *6
XLXXLH
X High-Z Bigh-2
H -
Write
*6
L
DIN
Standby ’
*6
H H
Reset Power
Standby -
x x
*7
x x x
High-Z
Down
*6
x L
tes) *l. L=V,,, H=V,, , X=H or L . Refer to DC Characteristics.
*2. Command writes involving block erase or word/byte write are reliably executed when
F-V,,+., and F-V,=2.7V to 3-W. Block erase or word/byte write with V,,<F-B<V,
produce spurious results and should not be attempted. *3. Refer Section 5. Flash Memory Comand Definition for valid DIN during a write operation. *4. Never hold F-2 low and F-s low at the same timing.
-
*5. F-A., set to V,, or VI, in byte mode (F-BYTE=Vn).
*6. F-‘RP set to V,, or V,, .
*7. See the following SRAM Standby mode.
-1
Block Diagram
F-V, F-V, F-GND
----------------,
.
.F-?i? i =-
> F-RY/?%
F-X
F-E :’
16M (x8/x16) b i t
F-m +
Flash memory
F-D’& to F-W,,
F* :>
F-BYTE :T
S-A,, 4 b S-E, I >
s-c> j >
S-OE ; >
S-IRE
2M (x8) bit
SRAM
+DQ, to W,
s-v,
S-GND
SHARP
LRS1329
5
I
5 Command Definitions for Flash Memory (*I)
I
Word/Byte Write
Block Erase and Word/Byte Write Suspend Block Erase and Word/Byte Write Resume
2 *5
Wr i t,e WA
4OH or
10H
Write WA
WD
1
*5
Write
XA Boll
XA DOH
1 *5 Write
Note)
*l. Commands other than those shown above are reserved by SHARP for future device
implementations and should not be used. ’ *2. BUS operations are defined in 3. Truth Table. *3. XA=Any valid address within the device.
IA=Identifier Code Address.
BA=Address within the block being erased. WA=Address of memory location to be written. SRD=Data read from status register(See the next page”Status Register Definition”). WD=Data to be written at location WA. Data is latched on the rising edge of F-%?or F-5 (whichever goes high first).
II&Data read from identifier codes.
*4. See the Following Identifier Codes.
*5. See the following Write Protection Alternatives.
Write Protection Alternatives
Operation F-V,, F-i@
F?@ Effect
V
IL
X X All Blocks Locked.
Block Erase
V
X
All Blocks Locked.
or
Word/Byte Write >V,,
“t
X All Blocks Unlocked.
v
IH
V
IL
2 Boot Blocks Locked.
V
IH
V
IH
All Blocks Unlocks.
SHARP
LRS1329
6
6. Status Register Definition
WSMS
ESS
ES
WBWS VPPS WBWSS
DPS R
7 6 5 4 3
2
1 0
NOTES :
S R. 7= WRITE STATE MACHINE STATUS ( W SMS) Check RYm or SR.7 to determine block erase OI
1 = Ready
word/byte write completion. SR.6-0 are invalid
0 = Busy
whi 1 e SR. 7=“0”.
SR. 6= ERASE SUSPEND STATUS( ESS)
1 = Block Erase Suspended 0 = Block Erase in Progress/Completed
SR.5=ERASESTATUS( ES )
If both SR. 5 and SR.4 are “1”s after a block
1 = Error in Block Erasure
erase attempt, an improper command sequence
0 = Successful Block Erase was entered.
S R. 4= WORD/BYTE WRITE STATUS ( WBWS )
1 = Error in Word/Byte Write 0 = Successful Word/Byte Write
SR. 3= V,, STATUS ( VPPS )
SR.3 does not provide a continuous indication
1 = F-V,, Low Detect, Operation Abort
of F-V,, level. The WSM interrogates and
0 = F-V,, OK
indicates the F-V,, level only after Block
Erase or Word/ByteWrite command sequences. SR.:
S R. 2 = WORD/BYTE WRITE SUSPENDED STATUS
is not guaranteed to reports accurate feedback
(WBWSS)
on 1 y when F-V, +Vepm,2.
1 =Word/ByteWrite Suspended 0 =Word/ByteWrite in Progress/Completed
S R . l= DEVICE PROTECT STATUS ( D P S )
1 = F-‘WP or F-@’ Lock Detected,
Operation Abort
0 = Unlock
The WSM interrogates the F-s and F-E only after Block Erase orWord/ByteWrite command
sequences.
It informs the system, depending
on the attempted operation, if the F-w is not VIM,
F-E is not Vm+
S R. 0 = RESERVED FOR FUTURE ENBANCEMENTS
SR.0 is reserved for future use and should be
4,R > masked out when polling the status register.
SHARP
LRS1329
7
Memory Map for Flash Memory
Address
[A,.-hl
4K*word/8K-byte Parameter Block
4K-word/BK-byte Parameter
Block
4K-word/BK-byte Parameter Block
32K-word/64K-byte Main Block 32X-word/64K-byte Main Block
323.word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K.byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block
32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-aord/64K-byte Main Block 32K-word/64K-byte tdain Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block
32K-word/64K-byte Main Block
32K-word/64K-byte Main Block
32K-word/64K-byte Main Block 32X-word/64K-byte Main Block
32K-word/64K-byte Main Block 32K-word/64K-byte Main Block 32K-word/64K-byte Main Block
32K-word/64K-byte Main Block 32K-word/64K-byte Main Block
32K-word/64K-byte Main Block 32K-word/64K-byte Main Block
32K-word/64K-byte Main Block
I ~~~
32K-word/64K-byte Main Block
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19 18 17 ..... 2 1 0 20 19 18 .....
2 1 0
MSB
LSB YSB
LSB
X8
Mode
X16
Mode
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