Sharp LR38574 Datasheet
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1
DESCRIPTION
The LR38574 is a CMOS timing generator IC
which generates timing pulses for driving 1 090 k/
1 310 k-pixel CCD area sensors and processing
pulses.
FEATURES
• Designed for 1/3-type 1 090 k/1 310 k-pixel CCD
area sensors
• Frequency of driving horizontal CCD : 12.27 MHz
• Both double speed drive monitoring mode and
still mode are possible
• Two still mode types :
3 fields period and 4 fields period
• External shutter control function with serial data
input is possible
• +3 V and +4.5 V power supplies
• Package :
48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch
PIN CONNECTIONS
LR38574
LR38574
Timing Generator IC for
1 090 k/1 310 k-pixel CCDs
1
48 47 46 45 44 43 42 41 40 39 37
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2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
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27
26
25
OFDC
V
1x
VH1Ax
VH1Bx
V2x
VDD3
GND
V
3x
VH3Ax
VH3Bx
V4x
OFDX
ID
ED
2
ED1
ED0
HD
GND
V
DD3
VD
DCLK
CLK
CKO
CKI
PBLK
BCPX
CLPX
ADCK
GND
FCDS
FS
V
DD3
ACLX
RS
GND
VCON
SHTR
DRMDFRTST
3
VDD4
FH2
GND
FH1VDD4
CCD
TST
2
TST1
38
48-PIN QFP
TOP VIEW
(QFP048-P-0707)
LR38574
2
BLOCK DIAGRAM
ID
ED2ED1
ED0
HD
GND
V
DD3
VD
DCLK
CLK
CKO
CKI
36 35 34 33 32 31 30 29 28 27 26 25
VCON
GND
RS
ACLX
V
DD3
FS
FCDS
GND
ADCK
CLPX
BCPX
PBLK
OFDC
V
1X
VH1AX
VH1BX
V2X
VDD3
GND
V
3X
VH3AX
VH3BX
V4X
OFDX
TST1
TST2
CCD
V
DD4
FH1
GND
FH
2
VDD4
TST3
FR
DRMD
SHTR
1/2 1/8
GATE
OSC
DATA LATCH & SHUTTER CONTROL
RESET
RESET
RESET
1/2
GATE
H COUNTER
V COUNTER
LEVEL
SHIFTER
DECODER
13
14
15
16
17
18
19
20
21
22
23
24
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37
3
LR38574
PIN NO.
SYMBOL I/O
POLARITY
PIN NAME DESCRIPTION
1 OFDC O3
Control pulse output
for OFD voltage
A pulse to control OFD voltage.
2V
1X O3
Vertical transfer
pulse output 1
A vertical transfer pulse for CCD.
Connect to V
1X pin of vertical driver IC.
3VH1AX O3
Readout pulse
output 1A
A pulse that transfers the charge of the photo-diode to
the vertical shift register.
Connect to VH1AX pin of vertical driver IC.
4VH1BX O3
Readout pulse
output 1B
A pulse that transfers the charge of the photo-diode to
the vertical shift register.
Connect to VH1BX pin of vertical driver IC.
5V2X O3
Vertical transfer
pulse output 2
A vertical transfer pulse for CCD.
Connect to V
2X pin of vertical driver IC.
6VDD3 – Power supply Supply of +3.3 V power.
A grounding pin.Ground–GND7–
9VH
3AX O3
Readout pulse
output 3A
A pulse that transfers the charge of the photo-diode to
the vertical shift register.
Connect to VH
3AX pin of vertical driver IC.
8V
3X O3
Vertical transfer
pulse output 3
A vertical transfer pulse for CCD.
Connect to V
3X pin of vertical driver IC.
A pulse that transfers the charge of the photo-diode to
the vertical shift register.
Connect to VH
3BX pin of vertical driver IC.
Readout pulse
output 3B
O3VH3BX10
11 V
4X O3
Vertical transfer
pulse output 4
A vertical transfer pulse for CCD.
Connect to V
4X pin of vertical driver IC.
A pulse that sweeps the charge of the photo-diode for
the electronic shutter. Connect to OFD pin of CCD
through the vertical driver IC and DC offset circuit.
Held at H level at normal mode.
OFD pulse outputO3OFDX12
13 PBLK O3
Pre-blanking pulse
output
A pulse that corresponds to the cease period of the
horizontal transfer pulse.
A pulse to clamp the optical black signal.
This pulse stays high during the absence of effective
pixels within the vertical blanking or the period of
sweep-out signal.
Optical black clamp
pulse output
O3BCPX 14
15 CLPX O3 Clamp pulse output
A pulse to clamp the dummy outputs of CCD signal.
This pulse stays high during the sweep-out period.
An output pin for AD converter. The output phase of
ADCK is selected by serial data step by 90˚.
AD clock outputO6MA3ADCK16
–
PIN DESCRIPTION
17 GND – Ground A grounding pin.–
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