SHARP LK400D3LC03 Specification
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SPECIFICATION
PREPARED BY: DATE
APPROVED BY: DATE ISSUE: Dec, 2, 2011
LIQUID CRYSTAL DISPLAY GROUP
SHARP CORPORATION
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SPEC No. LD-K23Z01
FILE No.
PAGE : 26 pages
APPLICABLE GROUP
LIQUID CRYSTAL DISPLAY GROUP
DEVICE SPECIFICATION FOR 㻌
㻌
TFT - LCD module㻌
MODEL No. LQ038Q5DRQ1
CUSTOMER'S APPROVAL
DATE
PRESENTED
BY
6+$53&25325$7,21
BY
LK400D3LC03
.7DQDND
$66,67$17'(3$570(17*(1(5$/0$1$*(5
'(9(/230(17'(3$570(17
/,48,'&5<67$/',63/$<*5283
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RECORDS OF REVISION
MODEL No. : LK400D3LC03
SPEC No. : LD-K23Z01
www.panelook.com
DATE
NO.
2011.12.2 LD-K23Z01
REVISED
No.
㸫㸫
PAGE SUMMARY NOTE
㸫
1st Issue
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1. Application
This specification applies to the color 40.0” TFT-LCD module LK400D3LC03.
* These specifications are proprietary products of SHARP CORPORATION (“SHARP”) and include materials
protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or
by any means, electronic or mechanical, for any purpose, in whole or in part, without the express written
permission of SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.
* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
life support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these specifications.
* Contact and consult with a SHARP sales representative for any questions about this device.
2. Overview
This module is a color active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It
is composed of a color TFT-LCD panel, driver ICs, control circuit, and edge-lit LED backlight system etc. Graphics
and texts can be displayed on a 1920RGB1080 dots panel with one billion colors (RGB 10bits) by using LVDS
(L
ow Voltage Differential Signaling) to interface, +12V of DC supply voltages.
And in order to improve the response time of LCD, this module applies the Over Shoot driving (O/S driving)
technology for the control circuit. In the O/S driving technology, signals are being applied to the Liquid Crystal
according to a pre-fixed process as an image signal of the present frame when a difference is found between image
signal of the previous frame and that of the current frame after comparing them.
With this technology, image signals can be set so that liquid crystal response completes within one frame. As a
result, motion blur reduces and clearer display performance can be realized
This LCD module also adopts Double Frame Rate driving method.
With combination of these technologies, motion blur can be reduced and clearer display performance can be
realized.
3. Mechanical Specifications
Paramete
Display size
Active area 885.6(H) x 498.15 (V) mm
Pixel Format
Pixel pitch 0.15375(H) x 0.46125 (V) mm
Pixel configuration R, G, B vertical stripe
Display mode Normally black
Unit Outline Dimensions (*1) 914.6(W) x 529.1(H) x 10.8(D) mm
Mass
Surface treatment
(*1) Outline is shown in Fig.1
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Specifications Unit
101.609 㸦Diagonal㸧
40.0 㸦Diagonal㸧
1920(H) x 1080(V)
㸦1pixel = R + G + B dot㸧
7.6s1.0
Low-Haze Anti Glare
Hard coating: 3H and more
Haze value : 7% (typ)
LD-K23Z01-1
c
inch
pixel
kg
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4. Input Terminals
4.1. TFT panel driving
CN1 (Interface signals and +12V DC power supply)
Using connector : 91213-0510 (Aces Electronics Co., Ltd.)
Mating connector : FI-RE51HL, FI-RE51CL (Japan Aviation Electronics Ind., Ltd.)
Mating LVDS transmitter : THC63LVD1023 or equivalent device
Pin No. Symbol Function Remark
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NC Non-connection (default : OPEN)
I2C_SDA I2C data signal [Note 1]
I2C_SCL I2C clock signal [Note 1]
Reserved Non-connection (default : OPEN)
R/W
Reserved Non-connection (default : OPEN) Open
SELLVDS
Reserved Non-connection (default : OPEN) Open
Reserved Non-connection (default : OPEN) Open
Reserved Non-connection (default : OPEN) Open
GND
AIN0- Aport (-)LVDS CH0 differential data input
AIN0+ Aport (+)LVDS CH0 differential data input
AIN1- Aport (-)LVDS CH1 differential data input
AIN1+ Aport (+)LVDS CH1 differential data input
AIN2- Aport (-)LVDS CH2 differential data input
AIN2+ Aport (+)LVDS CH2 differential data input
GND
ACK- Aport LVDS Clock signal(-)
ACK+ Aport LVDS Clock signal(+)
GND
AIN3- Aport (-)LVDS CH3 differential data input
AIN3+ Aport (+)LVDS CH3 differential data input
AIN4- Aport (-)LVDS CH4 differential data input
AIN4+ Aport (+)LVDS CH4 differential data input
GND
GND
BIN0- Bport (-)LVDS CH0 differential data input
BIN0+ Bport (+)LVDS CH0 differential data input
BIN1- Bport (-)LVDS CH1 differential data input
BIN1+ Bport (+)LVDS CH1 differential data input
BIN2- Bport (-)LVDS CH2 differential data input
BIN2+ Bport (+)LVDS CH2 differential data input
GND
BCK- Bport LVDS Clock signal(-)
BCK+ Bport LVDS Clock signal(+)
GND
BIN3- Bport (-)LVDS CH3 differential data input
BIN3+ Bport (+)LVDS CH3 differential data input
BIN4- Bport (-)LVDS CH4 differential data input
BIN4+ Bport (+)LVDS CH4 differential data input
GND
GND
GND
Read/write enable for TCON ROM
(Low : Disenable, High : Enable)
Select LVDS data order [Note2]
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LD-K23Z01-2
Open *If the 0Ȑ is mounted on the R128,
Pin No.1 is connected to GND.
Slave address㸸B4 / Pull up (3.3[V])
Slave address㸸B4 / Pull up (3.3[V])
Pull down (GND) [Note 3]
Pull down (GND) [Note 3]
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45
46
47
48
49
50
51
CN2 (Interface signals)
Using connector : 91213-0410 (Aces Electronics Co., Ltd.)
Mating connector : FI-RE41HL, FI-RE41CL (Japan Aviation Electronics Ind., Ltd.)
Pin No. Symbol Function Remark
1
2
3
4
5
6 Reserved
7 Reserved
8 Reserved
9 GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
[Note] GND of a liquid crystal panel drive part has connected with a module chassis.
GND
GND
Reserved Non-connection (default : OPEN)
VCC +12V Power Supply
VCC +12V Power Supply
VCC +12V Power Supply
VCC +12V Power Supply
Reserved (VCC) +12V Power Supply
Reserved (VCC) +12V Power Supply
Reserved (VCC) +12V Power Supply
Reserved Non-connection (default : OPEN)
Reserved Non-connection (default : OPEN)
CIN0- Cport (-)LVDS CH0 differential data input
CIN0+ Cport (+)LVDS CH0 differential data input
CIN1- Cport (-)LVDS CH1 differential data input
CIN1+ Cport (+)LVDS CH1 differential data input
CIN2- Cport (-)LVDS CH2 differential data input
CIN2+ Cport (+)LVDS CH2 differential data input
GND
CCK- Cport LVDS Clock signal(-)
CCK+ Cport LVDS Clock signal(+)
GND
CIN3- Cport (-)LVDS CH3 differential data input
CIN3+ Cport (+)LVDS CH3 differential data input
CIN4- Cport (-)LVDS CH4 differential data input
CIN4+ Cport (+)LVDS CH4 differential data input
GND
GND
DIN0- Dport (-)LVDS CH0 differential data input
DIN0+ Dport (+)LVDS CH0 differential data input
DIN1- Dport (-)LVDS CH1 differential data input
DIN1+ Dport (+)LVDS CH1 differential data input
DIN2- Dport (-)LVDS CH2 differential data input
DIN2+ Dport (+)LVDS CH2 differential data input
GND
DCK- Dport LVDS Clock signal(-)
DCK+ Dport LVDS Clock signal(+)
GND
DIN3- Dport (-)LVDS CH3 differential data input
DIN3+ Dport (+)LVDS CH3 differential data input
DIN4- Dport (-)LVDS CH4 differential data input
DIN4+ Dport (+)LVDS CH4 differential data input
GND
GND
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LD-K23Z01-3
Non-connection (default : OPEN)
Non-connection (default : OPEN)
Non-connection (default : OPEN)
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[Note 1] Slave address “9E” is allocated for internal use for TCON board.
The equivalent circuit figure of the terminal
Te rm in al
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LD-K23Z01-4
[Note 2] LVDS Data order
Data
TA0
TA1
TA2
TA3
TA4
TA5
TA6
TB0
TB1
TB2
TB3
TB4
TB5
TB6
TC0
TC1
TC2
TC3
TC4 N/A N/A
TC5 N/A N/A
TC6 DE(*) DE(*)
TD0
TD1
TD2
TD3
TD4
TD5
TD6
TE0
TE1
TE2
TE3
TE4
TE5
TE6
N/A: Not Available
(*)Since the display position is prescribed by the rise of DE(Display Enable)signal, please do not fix DE
signal during operation at ”High”.
100
10KȐ
SELLVDS
L(GND) or Open [VESA㸪NS]
R0(LSB)㻌
R1㻌
R2㻌
R3㻌
R4㻌
R5㻌
G0(LSB)㻌
G1㻌
G2㻌
G3㻌
G4㻌
G5㻌
B0(LSB)㻌
B1㻌
B2㻌
B3㻌
B4㻌
B5㻌
R6㻌
R7㻌
G6㻌
G7㻌
B6㻌
B7㻌
N/A㻌
R8㻌
R9(MSB)㻌
G8㻌
G9(MSB)㻌
B8㻌
B9(MSB)㻌
N/A㻌
H(3.3V) [JEIDA]
R4
R5
R6
R7
R8
R9(MSB)
G4
G5
G6
G7
G8
G9(MSB)
B4
B5
B6
B7
B8
B9(MSB)
R2
R3
G2
G3
B2
B3
N/A
R0(LSB)
R1
G0(LSB)
G1
B0(LSB)
B1
N/A
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[Note 3] LVDS Data order
SELLVDS
Data L(GND) or Open
[VESA]
TA0
TA1
TA2
TA3
TA4
TA5
TA6
TB0
TB1
TB2
TB3
TB4
TB5
TB6
TC0
TC1
TC2
TC3
TC4 NA NA
TC5 NA NA
TC6 DE(*) DE(*)
TD0
TD1
TD2
TD3
TD4
TD5
TD6
TE0
TE1
TE2
TE3
TE4
TE5
TE6
NA: Not Available
(*)Since the display position is prescribed by the rise of DE(Display Enable)signal, please do not fix DE
signal during operation at ”High”.
R0(LSB)㻌
R1㻌
R2㻌
R3㻌
R4㻌
R5㻌
G0(LSB)㻌
G1㻌
G2㻌
G3㻌
G4㻌
G5㻌
B0(LSB)㻌
B1㻌
B2㻌
B3㻌
B4㻌
B5㻌
R6㻌
R7㻌
G6㻌
G7㻌
B6㻌
B7㻌
N/A㻌
R8㻌
R9(MSB)㻌
G8㻌
G9(MSB)㻌
B8㻌
B9(MSB)㻌
N/A㻌
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LD-K23Z01-5
H(3.3V)
[JEIDA]
R4
R5
R6
R7
R8
R9(MSB)
G4
G5
G6
G7
G8
G9(MSB)
B4
B5
B6
B7
B8
B9(MSB)
R2
R3
G2
G3
B2
B3
N/A
R0(LSB)
R1
G0(LSB)
G1
B0(LSB)
B1
N/A
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SELLVDS= Low (GND) or OPEN
ACK+,BCK+
ACK– ,BCK–
AIN0+,BIN0+
–,BIN0–
AIN0
AIN1+,BIN1+
–,BIN1–
AIN1
AIN2+,BIN2+
–,BIN2–
AIN2
AIN3+,BIN3+
–,BIN3–
AIN3
AIN4+,BIN4+
–,BIN4–
AIN4
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LD-K23Z01-6
1 cycle
G0 R5 R4 R3 R2 R1 R0 R0 R1 G0
B1 B0 G5 G4 G3 G2 G1 G1 G2 B1
DE
NA NA
B7 B6 G7 G6 R7 R6 R6 R7 NA NA
B9 B8 G9 G8 R9 R8 R8 R9 NA NA
B5 B4 B3 B2 B2 B3
DE
SELLVDS= High (3.3V)
ACK+,BCK+
ACK– ,BCK–
AIN0+,BIN0+
–,BIN0–
AIN0
AIN1+,BIN1+
–,BIN1–
AIN1
AIN2+,BIN2+
–,BIN2–
AIN2
AIN3+,BIN3+
AIN3
–,BIN3–
AIN4+,BIN4+
–,BIN4–
AIN4
DE: Display Enable, NA: Not Available (Fixed Low)
1 cycle
G4 R9 R8 R7 R6 R5 R4 R4 R5 G4
B5 B4 G9 G8 G7 G6 G5 G5 G6 B5
DE
NA NA
B3 B2 G3 G2 R3 R2 R2 R3 NA NA
B1 B0 G1 G0 R1 R0 R0 R1 NA NA
B9 B8 B7 B6 B6 B7
DE
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