SHARP LK400D3HC75 Specification

FOR

LD

No.

LD----KKKK22225653

LDLD

5653

56535653

DATE

TECHNICAL LITERATURE

TFT - LCD PANEL

(Open Cell )

July. 22. 2013

MODEL No.

The technical literature is subject to change without notice.
So, please contact SHARP or its representative before designing

your product based on this literature.

LK400D3HC75

DEVELOPMENT DEPARTMENT 1

DISPLAY DEVICE UNIT V

DISPLAY DEVICE BUSINESS DIVISION

SHARP CORPORATION

LK400D3HC75

RECORDS OF REVISION

SPEC No. DATE

No. PAGE

LD-K25653 Jul. 22. 2013

REVISED

- - - 1st. Issue

SUMMARY NOTE

LD-K25653‐

Driver

)

Gate Driver

1

[LK

1

1 Application

This specification applies to the color 40.0” TFT-LCD Open Cell LK400D3HC75

With parts (S-Dr, G-Dr, S-PWB) to drive it.）

（

* This specification sheets are proprietary products of SHARP CORPORATION (“SHARP”) and include materials

protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or
by any means, electronic or mechanical, for any purpose, in whole or in part, without the express written
permission of SHARP.

* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,

automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.

* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,

telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
life support.

* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with

the instructions and the precautions specified in these specification.

* Contact and consult with a SHARP sales representative for any questions about this device.

2 Overview

This Open Cell (LK400D3HC75) is a color active matrix LCD PANEL incorporating amorphous silicon TFT (Thin
Film Transistor), polarizers, Control-PWB(C-PWB), Source-PWBs, Source-Drivers, Gate-Drivers and FPCs. The
following content can be achieved in using C-PWB (LK0DZ1C0539) that SHARP specifies.

Graphics and texts can be displayed on a 1920×RGB×1080 dots panel with one billion colors by using 10bit
LVDS (Low Voltage Differential Signaling) to interface, +12V of DC supply voltages.

In order to improve the response time of LCD, This C-PWB applies the Over Shoot driving (O/S driving)
technology for the control circuit. In the O/S driving technology, signals are being applied to the Liquid Crystal
according to a pre-fixed process as an image signal of the present frame when a difference is found between image
signal of the previous frame and that of the current frame after comparing them.

With combination of these technologies, motion blur can be reduced and clearer display performance can be
realized.

[Caution] You should design thermal conductive interface pad and C-PWB cover enough to radiate heat from T-CON
IC in C-PWB.

TFT LCD Panel

(1920 x RGB x 1080)

Open Cell

400D3HC75]

Source
Source PWB (S-PWB)

FPC (LK0DZ1C0112

CN

Control-PWB (LK0DZ1C0539)

Fig.1 Overview of Open-Cell: LK400D3HC75 & peripheral parts.

3 Mechanical Specifications

Parameter

Specifications

Unit

cm

inch

Active area

885.60

(

H) x

498.15

(V) mm

1920

(H)

x 1080(V)

Pixel pitch

0.36375

(H) x

0.36375

(V) mm

Pixel configuration

R, G, B vertical stripe

Disp

lay mode

Normally black

Cell Outline Dimensions

[Note1]

921.18

(H) x

548.55

(V) x

1.8

(D) mm

Mass

1.88+0.3 kg

Surface treatment [Note2]

Anti glare

, Low Haze

Underside

Surface

P

in No.

Symbol

Function

Remark

1

GND

2

Reserved

It is required to set non

-

connection(OPEN)

3

Reserved

It is required to set non

-

connection(OPEN)

4

Reserved

It is required to set non

-

connection(OPEN)

5

Reserved

It is required to set non

-

connection(

OPEN)

6

Reserved

It is required to set non

-

connection(OPEN)

7

SELLVDS

Select LVDS data order

[Note

1,2]

Pull down

8

Reserved

It is required to set non

-

connection(OPEN)

9

Reserved

It is required to set non

-

connection(OPEN)

10

Reserved

It is require

d to set non

-

connection(OPEN)

11 GND

12

AIN0

- Aport (

-

)LVDS CH0 differential data input

13

AIN0+

Aport (+)LVDS CH0 differential data input

14

AIN1

- Aport (

-

)LVDS CH1 differential data input

15

AIN1+

Aport (+)LVDS CH1 differential data input

16

AIN2

- Aport (

-

)LVDS CH2 differential data input

17

AIN2+

Aport (+)LVDS CH2 differential data input

18

GND

19

ACK

- Aport LVDS Clock signal(

-)

20

ACK+

Aport LVDS Clock signal(+)

21

GND

22

AIN3

- Aport (

-

)LVDS CH3 differential data input

23

A

IN3+

Aport (+)LVDS CH3 differential data input

24

AIN4

- Aport (

-

)LVDS CH4 differential data input

25

AIN4+

Aport (+)LVDS CH4 differential data input

26

GND

27

GND

28

BIN0

- Bport (

-

)LVDS CH0 differential data input

29

BIN0+

Bport (+)LVDS CH0 d

ifferential data input

30

BIN1

- Bport (

-

)LVDS CH1 differential data input

31

BIN1+

Bport (+)LVDS CH1 differential data input

LD-K25653‐

2

Display size

Pixel Format

treatment [Note2]
[Note1] Outline dimensions are shown in P20.
[Note2] With the protection film removed.

101.609 （Diagonal）

40.0036 （Diagonal）

1pixel = R + G + B dot）

（

Hard coating : 2H and more
Hard coat less

4 Cell Driving Specifications

4.1 Driving interface of Control PWB SHARP specifies

Parts code: LK0DZ1C0539
CN1 (Interface signals and +12V DC power supply) shown in Fig.1

Using connector : 187124-51221 (P-Two)
Matching connector : FI-RE51HL, FI-RE51CL (Japan Aviation Electronics Ind., Ltd.) or
187087-51193 (P-Two) or equivalent device
Matching LVDS transmitter : THC63LVD1023 or equivalent device

pixel

32

BIN2

- Bport (

-

)LVDS CH2 differential data input

33

BIN2+

Bport (+)LVDS CH2 differential data input

34

GND

35

BCK

- B

port LVDS Clock signal(

-)

36

BCK+

Bport LVDS Clock signal(+)

37

GND

38

BIN3

- Bport (

-

)LVDS CH3 differential data input

39

BIN3+

Bport (+)LVDS CH3 differential data input

40

BIN4

- Bport (

-

)LVDS CH4 differential data input

41

BIN4+

Bport (+)LVDS

CH4 differential data input

42

GND

43

GND

44

GND

45

GND

46

GND

47

VCC

+12V Power Supply

48

VCC

+12V Power Supply

49

VCC

+12V Power Supply

50

VCC

+12V Power Supply

51

VCC

+12V Power Supply

[Note] You should connect GND plane in Control PWB to module chassis.

[Note 1] The equivalent circuit figure of the terminal:

Terminal

LD-K25653‐

3

4.7KΩ

Control PWB

[Note 2] LVDS Data order

SELLVDS

Data L(GND)

or Open

H(3.3V)

TA0

R0

R4

TA1

R1

R5

TA2

R2

R6

TA3

R3

R7

TA4

R4

R8

TA5

R5

R9(MSB)

TA6

G0

G4

TB0

G1

G5

TB1

G2

G6

TB2

G3

G7

TB3

G4

G8

TB4

G5

G9(MSB)

TB5

B0

B4

TB6

B1

B5

TC0

B2

B6

TC1

B3

B7

TC2

B4

B8

TC3

B5

B9(MSB)

TC4 NA NA

TC5 NA NA

TC6 DE(*)

DE(*)

TD0

R6

R2

TD1

R7

R3

TD2

G6

G2

TD3

G7

G3

TD4

B6

B2

TD5

B7

B3

TD6

N/A

TE0

R8

R0(LSB)

TE1

R9

R1

TE2

G8

G0(LSB)

TE3

G9

G1

TE4

B8

B0(LSB)

TE5

B9

B1

TE6

N/A

LD-K25653‐

4

[VESA]

(LSB)

(LSB)

(LSB)

[JEIDA]

N/A

(MSB)

(MSB)

(MSB)

N/A

NA: Not Available
(*)Since the display position is prescribed by the rise of DE(Display Enable)signal, please do not fix DE signal
at ”High” during operation. And you should input DE signal in all LVDS port.

SELLVDS= Low (GND) or OPEN

ACK+,BCK+

ACK– ,BCK

AIN0+,BIN0+
AIN0–,BIN0

–

–

AIN1+,BIN1+

AIN1–,BIN1

–

AIN2+,BIN2+
AIN2–,BIN2

–

AIN3+,BIN3+

AIN3–,BIN3

–

AIN4+,BIN4+

AIN4–,BIN4

–

SELLVDS= High (3.3V)

ACK+,BCK+

ACK– ,BCK

AIN0+,BIN0+
AIN0–,BIN0

AIN1+,BIN1+

AIN1–,BIN1

AIN2+,BIN2+
AIN2–,BIN2

AIN3+,BIN3+

AIN3–,BIN3

AIN4+,BIN4+
AIN4

–

,BIN4

–

–

–

–

–

–

DE: Display Enable, NA: Not Available (Fixed Low)

1 cycle

G0 R5 R4 R3 R2 R1 R0 R0 R1 G0

B1 B0 G5 G4 G3 G2 G1 G1 G2 B1

DE

NA NA

B7 B6 G7 G6 R7 R6 R6 R7 NA NA

B9 B8 G9 G8 R9 R8 R8 R9 NA NA

B5 B4 B3 B2 B2 B3

1 cycle

G4 R9 R8 R7 R6 R5 R4 R4 R5 G4

B5 B4 G9 G8 G7 G6 G5 G5 G6 B5

DE

NA NA

B3 B2 G3 G2 R3 R2 R2 R3 NA NA

B1 B0 G1 G0 R1 R0 R0 R1 NA NA

B9 B8 B7 B6 B6 B7

LD-K25653‐

DE

DE

5