SHARP LK400D3HC75 Specification

FOR
LD
No.
LD----KKKK22225653
LDLD
5653
56535653
DATE
TECHNICAL LITERATURE
TFT - LCD PANEL
(Open Cell )
July. 22. 2013
MODEL No.
The technical literature is subject to change without notice. So, please contact SHARP or its representative before designing
your product based on this literature.
LK400D3HC75
DEVELOPMENT DEPARTMENT 1
DISPLAY DEVICE UNIT V
DISPLAY DEVICE BUSINESS DIVISION
SHARP CORPORATION
LK400D3HC75
RECORDS OF REVISION
SPEC No. DATE
No. PAGE
LD-K25653 Jul. 22. 2013
REVISED
- - - 1st. Issue
SUMMARY NOTE
LD-K25653
Driver
)
Gate Driver
1
[LK
1
1 Application
This specification applies to the color 40.0” TFT-LCD Open Cell LK400D3HC75
With parts (S-Dr, G-Dr, S-PWB) to drive it.)
* This specification sheets are proprietary products of SHARP CORPORATION (“SHARP”) and include materials
protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant system design should be taken.
* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for life support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these specification.
* Contact and consult with a SHARP sales representative for any questions about this device.
2 Overview
This Open Cell (LK400D3HC75) is a color active matrix LCD PANEL incorporating amorphous silicon TFT (Thin Film Transistor), polarizers, Control-PWB(C-PWB), Source-PWBs, Source-Drivers, Gate-Drivers and FPCs. The following content can be achieved in using C-PWB (LK0DZ1C0539) that SHARP specifies.
Graphics and texts can be displayed on a 1920×RGB×1080 dots panel with one billion colors by using 10bit LVDS (Low Voltage Differential Signaling) to interface, +12V of DC supply voltages.
In order to improve the response time of LCD, This C-PWB applies the Over Shoot driving (O/S driving) technology for the control circuit. In the O/S driving technology, signals are being applied to the Liquid Crystal according to a pre-fixed process as an image signal of the present frame when a difference is found between image signal of the previous frame and that of the current frame after comparing them.
With combination of these technologies, motion blur can be reduced and clearer display performance can be realized.
[Caution] You should design thermal conductive interface pad and C-PWB cover enough to radiate heat from T-CON IC in C-PWB.
TFT LCD Panel
(1920 x RGB x 1080)
Open Cell
400D3HC75]
Source Source PWB (S-PWB)
FPC (LK0DZ1C0112
CN
Control-PWB (LK0DZ1C0539)
Fig.1 Overview of Open-Cell: LK400D3HC75 & peripheral parts.
3 Mechanical Specifications
Parameter
Specifications
Unit
cm
inch
Active area
885.60
(
H) x
498.15
(V) mm
1920
(H)
x 1080(V)
Pixel pitch
0.36375
(H) x
0.36375
(V) mm
Pixel configuration
R, G, B vertical stripe
Disp
lay mode
Normally black
Cell Outline Dimensions
[Note1]
921.18
(H) x
548.55
(V) x
1.8
(D) mm
Mass
1.88+0.3 kg
Surface treatment [Note2]
Anti glare
, Low Haze
Underside
Surface
P
in No.
Symbol
Function
Remark
1
GND
2
Reserved
It is required to set non
-
connection(OPEN)
3
Reserved
It is required to set non
-
connection(OPEN)
4
Reserved
It is required to set non
-
connection(OPEN)
5
Reserved
It is required to set non
-
connection(
OPEN)
6
Reserved
It is required to set non
-
connection(OPEN)
7
SELLVDS
Select LVDS data order
[Note
1,2]
Pull down
8
Reserved
It is required to set non
-
connection(OPEN)
9
Reserved
It is required to set non
-
connection(OPEN)
10
Reserved
It is require
d to set non
-
connection(OPEN)
11 GND
12
AIN0
- Aport (
-
)LVDS CH0 differential data input
13
AIN0+
Aport (+)LVDS CH0 differential data input
14
AIN1
- Aport (
-
)LVDS CH1 differential data input
15
AIN1+
Aport (+)LVDS CH1 differential data input
16
AIN2
- Aport (
-
)LVDS CH2 differential data input
17
AIN2+
Aport (+)LVDS CH2 differential data input
18
GND
19
ACK
- Aport LVDS Clock signal(
-)
20
ACK+
Aport LVDS Clock signal(+)
21
GND
22
AIN3
- Aport (
-
)LVDS CH3 differential data input
23
A
IN3+
Aport (+)LVDS CH3 differential data input
24
AIN4
- Aport (
-
)LVDS CH4 differential data input
25
AIN4+
Aport (+)LVDS CH4 differential data input
26
GND
27
GND
28
BIN0
- Bport (
-
)LVDS CH0 differential data input
29
BIN0+
Bport (+)LVDS CH0 d
ifferential data input
30
BIN1
- Bport (
-
)LVDS CH1 differential data input
31
BIN1+
Bport (+)LVDS CH1 differential data input
LD-K25653
2
Display size
Pixel Format
treatment [Note2] [Note1] Outline dimensions are shown in P20. [Note2] With the protection film removed.
101.609 (Diagonal)
40.0036 (Diagonal)
1pixel = R + G + B dot)
Hard coating : 2H and more Hard coat less
4 Cell Driving Specifications
4.1 Driving interface of Control PWB SHARP specifies
Parts code: LK0DZ1C0539 CN1 (Interface signals and +12V DC power supply) shown in Fig.1
Using connector : 187124-51221 (P-Two) Matching connector : FI-RE51HL, FI-RE51CL (Japan Aviation Electronics Ind., Ltd.) or 187087-51193 (P-Two) or equivalent device Matching LVDS transmitter : THC63LVD1023 or equivalent device
pixel
32
BIN2
- Bport (
-
)LVDS CH2 differential data input
33
BIN2+
Bport (+)LVDS CH2 differential data input
34
GND
35
BCK
- B
port LVDS Clock signal(
-)
36
BCK+
Bport LVDS Clock signal(+)
37
GND
38
BIN3
- Bport (
-
)LVDS CH3 differential data input
39
BIN3+
Bport (+)LVDS CH3 differential data input
40
BIN4
- Bport (
-
)LVDS CH4 differential data input
41
BIN4+
Bport (+)LVDS
CH4 differential data input
42
GND
43
GND
44
GND
45
GND
46
GND
47
VCC
+12V Power Supply
48
VCC
+12V Power Supply
49
VCC
+12V Power Supply
50
VCC
+12V Power Supply
51
VCC
+12V Power Supply
[Note] You should connect GND plane in Control PWB to module chassis.
[Note 1] The equivalent circuit figure of the terminal:
Terminal
LD-K25653
3
4.7KΩ
Control PWB
[Note 2] LVDS Data order
SELLVDS
Data L(GND)
or Open
H(3.3V)
TA0
R0
R4
TA1
R1
R5
TA2
R2
R6
TA3
R3
R7
TA4
R4
R8
TA5
R5
R9(MSB)
TA6
G0
G4
TB0
G1
G5
TB1
G2
G6
TB2
G3
G7
TB3
G4
G8
TB4
G5
G9(MSB)
TB5
B0
B4
TB6
B1
B5
TC0
B2
B6
TC1
B3
B7
TC2
B4
B8
TC3
B5
B9(MSB)
TC4 NA NA
TC5 NA NA
TC6 DE(*)
DE(*)
TD0
R6
R2
TD1
R7
R3
TD2
G6
G2
TD3
G7
G3
TD4
B6
B2
TD5
B7
B3
TD6
N/A
TE0
R8
R0(LSB)
TE1
R9
R1
TE2
G8
G0(LSB)
TE3
G9
G1
TE4
B8
B0(LSB)
TE5
B9
B1
TE6
N/A
LD-K25653
4
[VESA]
(LSB)
(LSB)
(LSB)
[JEIDA]
N/A
(MSB)
(MSB)
(MSB)
N/A
NA: Not Available (*)Since the display position is prescribed by the rise of DE(Display Enable)signal, please do not fix DE signal at ”High” during operation. And you should input DE signal in all LVDS port.
SELLVDS= Low (GND) or OPEN
ACK+,BCK+
ACK– ,BCK
AIN0+,BIN0+ AIN0–,BIN0
AIN1+,BIN1+
AIN1–,BIN1
AIN2+,BIN2+ AIN2–,BIN2
AIN3+,BIN3+
AIN3–,BIN3
AIN4+,BIN4+
AIN4–,BIN4
SELLVDS= High (3.3V)
ACK+,BCK+
ACK– ,BCK
AIN0+,BIN0+ AIN0–,BIN0
AIN1+,BIN1+
AIN1–,BIN1
AIN2+,BIN2+ AIN2–,BIN2
AIN3+,BIN3+
AIN3–,BIN3
AIN4+,BIN4+ AIN4
,BIN4
DE: Display Enable, NA: Not Available (Fixed Low)
1 cycle
G0 R5 R4 R3 R2 R1 R0 R0 R1 G0
B1 B0 G5 G4 G3 G2 G1 G1 G2 B1
DE
NA NA
B7 B6 G7 G6 R7 R6 R6 R7 NA NA
B9 B8 G9 G8 R9 R8 R8 R9 NA NA
B5 B4 B3 B2 B2 B3
1 cycle
G4 R9 R8 R7 R6 R5 R4 R4 R5 G4
B5 B4 G9 G8 G7 G6 G5 G5 G6 B5
DE
NA NA
B3 B2 G3 G2 R3 R2 R2 R3 NA NA
B1 B0 G1 G0 R1 R0 R0 R1 NA NA
B9 B8 B7 B6 B6 B7
LD-K25653
DE
DE
5
INPUT SIGNALS
GATE DRIVER
SOURCE
DRIVER
SOURCE
DRIVER
CN3
SOURCE
PWB SOURCE
PWB SOURCE
PWB SOURCE
PWB
INPUT SIGNALS
4.2
4.2
4.24.2
SELLVDS AIN0- AIN0+ AIN1- AIN1+ AIN2- AIN2+ AIN3- AIN3+ AIN4- AIN4+ ACK- ACK+ BIN0- BIN0+ BIN1- BIN1+ BIN2- BIN2+ BIN3- BIN3+ BIN4- BIN4+ BCK- BCK+
POWER SUPPLY
+12V DC
4.3
4.3
4.34.3
Interface block diagram
Display position of data
LCD PANEL
1920×3(RGB)×1080
GATE DRIVER
Control
Control Signals
Signals
Power Supply
Power Supply
Circuit
Circuit
C-PWB
CN1
Fig.2 Interface block diagram
LD-K25653
6
I2C SDA I2C SCL
B1 G1 R1 B2 G2 R2
(1、1) (1,2)
1・1 1・2 1・3
2・1 2・2
3・1
B G R
1080・1
S-PWB S-PWB
1・1920
1080・1920
[Note] You should assemble Open-Cell for S-PWBs to be located at the downside of your TV set.
LD-K25653
1 pixel
Pin No.
symbol
Function
Remark
1 SDA
I2C DATA
Pull up:3.3V[Note1]
2 SCL
I2C CLK
Pull up:3.3V[Note1]
3 GND
GND
-
4.4 Vcom Adjusting interface of Control PWB SHARP specifies[LK0DZ1C0539]
For the prevention of long-time image sticking of TFT-LCD panel, be sure to adjust Vcom flicker to be minimized on the center of display by visual or flicker meter. .
[Note 1] Please adjust VCOM voltage at below pattern:
V0
V0
V0
V0
V512
V512
V512
V0
V0
V512
V512
V0
V0
V512
V0
V512
V0
V512
V512
V0
V512
V0
V512
V512
V0
V0
V512
1 dot
[Note 2] VCOM voltage can be adjusted through via hole (CN3). Potentiometer IC and via hole are as follows:
IC for adjusting VCOM : MAX9667ETP+ (MAXIM) Using Via Hole : 1.5mm Pitch (φ0.7mm ) Mating connector : (housing)3P-SZN,
(contact)SZN-002T-P0.7K (JST Co.,Ltd.)
Communication method
: I2C
7
[Note3] The equivalent circuit figure of the terminal
3.3[V]
3.3[V]
2 [Kohm]
Terminal
TerminalTerminal
5 Absolute Maximum Ratings
Parameter Symbol Condition Ratings Unit Remark
Input voltage
(for Control)
12V supply voltage
(for Control)
VI
VCC
Ta=25 °C Ta=25 °C
LD-K25653
-0.3 ~ 3.6 V [Note 1]
0 ~ + 14 V [Note 2]
8
Storage temperature Tstg - -25 ~ +60
Operation temperature
(Ambient)
[Note 1] Applies to the input signals to C-PWB SELLVDS.
[Note 2] Applies to the supply voltage of C-PWB. [Note 3] Applies to the LK400D3HC75 (Open-Cell) and C-PWB, CS-FPC
-
Humidity: 95%RH Max.(Ta < 40oC)
-
Maximum wet-bulb temperature at 39oC or less. (Ta > 40oC)
-
No condensation.
Topa - 0 ~ +50
°C
[Note 3]
°C
LD-K25653
=10.8V
V2
=9.1V
ON
t4
0.9Vcc
0.1Vcc
t3
OFF
ON
OFF
Data1
t2
t5-1t5-
2
ON
2
0.9Vcc
0.1Vcc
0.1Vcc
ON
t1
t3
6 Electrical Characteristics of input signals
Parameter Symbol Min. Typ. Max. Unit Remark
Supply voltage Vcc 11.4 12 12.6 V [Note 1]
Current dissipation
+12V supply
voltage
Inrush current
Permissible input ripple voltage VRP - - 100 mV
Differential input
threshold voltage
High VTH 100 - mV
Low VTL - -100 mV
Input Low voltage VIL 0 - 1.0 V
Input High voltage VIH 2.3 3.3 3.6 V
Input leak current (Low) IIL - - 1700 µA
Input leak current (High) IIH - - 700 µA
Terminal resistor RT - 100 -
[Note]VCM: Common mode voltage of LVDS driver.
[Note1]
Input voltage sequences Dip conditions for supply voltage
50µs < t1 < 20ms V2 < Vcc < V1 20ms < t2 < 50ms td < 10ms 20ms < t3 < 50ms 0 < t4 < 1s This case is based on input voltage sequences. 1s < t 0 < t 1s < t
6 -1
5-1
7
1s < t
0 < t
5-2
6 -2
Vcc
t6-1
Data1: ACK±, AIN0±, AIN1±, AIN2±, AIN3±, AIN4±,BCK±, BIN0±, BIN1±, BIN2±, BIN3±, BIN4± Data2: SELLVDS
Icc - (0.73) (1.6) A [Note 2]
I
1 - TBD - A
RUSH
I
2 TBD - A
RUSH
P-P
Vcc = +12.0V
VCM = +1.2V
t7
td
t6-
Differential
Vcc
V1
9
Ta=25 °C
t1=500µs
[Note 6] T1>5ms [Note 6]
[Note 5] [Note 3]
VI = 0V
[Note 4]
VI = 3.3V
[Note 3]
input
LD-K25653
About the relation between data input and back light lighting, we recommend the above-mentioned input
sequence. If the back light is switched on before a panel operation begins or after a panel operation stops, the screen may not be displayed properly. But this phenomenon is not caused by change of an incoming signal, and does not give damage to a liquid crystal display.
[Note 2] Typical current situation: 1024 gray-bar patterns. (Vcc = +12.0V) The explanation of RGB gray scale is seen in section 8.
R G B G S 0
R G B G S 1
R G B G S 2
. . ..
G S 1 0 2 2
R G B
G S 1 0 2 3
Vcc+12.0V
CK=74.25MHz
Th=14.8µs
[Note 3] SELLVDS [Note 4] SCL, SDA [Note 5] ACK±, AIN0±, AIN1±, AIN2±, AIN3±, AIN4±, BCK±, BIN0±, BIN1±, BIN2±, BIN3±, BIN4± [Note 6] Vcc12V inrush current waveform is as follows. (I
: t1=500µs)
RUSH
TBD
10
7
Parameter
Symbol
Min.
Typ. Max.
Unit Remark
NTSC
PAL
Clock
Frequency
1/Tc 69
76 MHz
1300 clock
16.1 µs
H
orizontal period
1400 line
63 Hz
Vertical period
7 Timing characteristics of input signals
Timing characteristics of input signals for C
77
Timing characteristics of input signalsTiming characteristics of input signals
7.1 Timing characteristics
Timing diagrams of input signal are shown in Fig.3.
Horizontal period TH
for C----PWB
PWB
for Cfor C
PWBPWB
1050 1100
14.2 14.8
74.25
LD-K25653
11
Data enable
signal
(High)
Vertical period
(High)
TV
TVd 1080 1080 1080 line
960 960
1109 1125 1350
47
THd
[Note]-When vertical period is very long, flicker and etc. may occur.
-Please turn off the module after it shows the black screen.
-Please make sure that length of vertical period should become of an integral multiple of horizontal length of period. Otherwise, the screen may not display properly.
-As for your final setting of driving timing, we will conduct operation check test at our side, please inform your final setting.
TH
DE
Aport DATA
1
3
(R,G,B)
Bport DATA
2
4
(R,G,B)
Tc
DE
TV
Fig.3 Timing characteristics of input signal.
960 clock
60 50
THd
1919 1917
1920 1918
1 2 1080 1079
TVd
7.2
7.2 LVDS signal characteristics
7.27.2
CLK-
Voc
CLK+
Voc
Data x-
Voc
Data x+
Voc
CLK­CLK+
Data x­Data x+
tpd0
Vdiff=0 Vdiff=0
tpd1
tpd2
tpd3
t
CLK
Vod
Vod
tpd4 tpd5
tpd6
The item Symbol
min. typ. max. unit
Differential voltage Vod 200 400 600 Common mode voltage Voc 600 1200 1800 LVDS clock period t
Delay time, CLK rising edge to serial bit position 0 Delay time, CLK rising edge to serial bit position 1 Delay time, CLK rising
edge to serial bit position 2 Data position
Delay time, CLK rising
edge to serial bit position 3
Delay time, CLK rising
edge to serial bit position 4
Delay time, CLK rising
edge to serial bit position 5
Delay time, CLK rising
edge to serial bit position 6
12.35 13.50 13.69
CLK
tpd0
tpd1
tpd2
tpd3
tpd4
tpd5
tpd6
-0.25 0 0.25
1*
t
2*
3*
4*
5*
6*
CLK
t
CLK
t
CLK
t
CLK
t
CLK
t
CLK
/7-0.25 1*
/7-0.25 2*
/7-0.25 3*
/7-0.25 4*
/7-0.25 5*
7-0.25 6*
t
CLK
t
CLK
t
CLK
t
CLK
t
CLK
t
CLK
/7 1*
/7 2*
/7 3*
/7 4*
/7 5*
/7 6*
t t t t t t
CLK
CLK
CLK
CLK
CLK
CLK
/7+0.25
/7+0.25
/7+0.25
/7+0.25
/7+0.25
/7+0.25
LD-K25653
mV
ns
12
8 Input Signal, Basic Display Colors and Gray Scale of Each Color
LD-K25653
13
Colors &
Gray scale
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
Green 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
Cyan 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Basic Color
Magenta – 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
Yellow
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Black GS0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Darker GS2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Brighter GS1021 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Gray
R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9
Scale
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
GS1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
↓ ↓
↓ ↓
↓ ↓
↓ ↓
Gray Scale of Red
GS1022 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Data signal
Red GS1023 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Black GS0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GS1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Darker GS2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Brighter GS1021 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
Gray Scale of Green
GS1022 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 Green GS1023 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 Black GS0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
GS1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Darker GS2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Brighter GS1021 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1
Gray Scale of Blue
GS1022 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1
Blue GS1023 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
↓ ↓
↓ ↓
↓ ↓
↓ ↓
↓ ↓
↓ ↓
↓ ↓
↓ ↓
0: Low level voltage, 1: High level voltage. Each basic color can be displayed in 1021 gray scales from 10 bits data signals. According to the combination of total 30 bits data signals, one billion-color display can be achieved on the screen.
9 Optical Specifications
Parameter Symbol Condition
Horizontal
Viewing angle
range
Vertical
θ θ
θ θ
21 22
11 12
CR>10
Ta=25°C, Vcc=12.0V, Frame rate:60Hz (typical)
Min. Typ.
Max. Unit
80 88 - Deg.
80 88 - Deg.
LD-K25653
Remark
[Note1,4]
14
Contrast ratio CRn
Response time
White
Red
Luminance
Green
Blue
τ
DRV
x y x y x y x y
θ
=0 deg.
4000 5000
- - [Note2,4]
6 ms [Note3,4,5]
Typ.-0.03 Typ.-0.03 Typ.-0.03 Typ.-0.03 Typ.-0.03 Typ.-0.03 Typ.-0.03 Typ.-0.03
TBD TBD TBD TBD TBD TBD TBD TBD
Typ.+0.03 Typ.+0.03 Typ.+0.03 Typ.+0.03 Typ.+0.03 Typ.+0.03 Typ.+0.03
Typ.+0.03 Luminance White YL 350 400 - cd/m Luminance
uniformity
White
δw
- - 1.25 [Note6]
-Optical characteristics are based on SHARP standard module.
-The measurement shall be executed 60 minutes after lighting at rating.
[Note]The optical characteristics are measured using the following equipment.
DetectorEZ-CONTRAST/ Photodiode
400mm
Field=1°
Center of the screen (θ=0°)
Center of the screen (θ=0°)
TFT-LCD Module
TFT-LCD Module
Fig.4-1 Measurement of viewing angle range and
Response time. Viewing angle range: EZ-CONTRAST Response time: Photodiode
Fig.4-2 Measurement of Contrast, Luminance,
Chromaticity.
-
-
-
-
-
[Note4]
-
-
-
2
Detector (SR-3A-UL1, or equivalent one
LD-K25653
0%
90%
100%
time
(Relative Value)
[Note 1] Definitions of viewing angle range:
Normal line
θ
11
θ
21
θ
12
θ
22
6 o’clock direction
[Note 2] Definition of contrast ratio:
The contrast ratio is defined as the following.
Luminance (brightness) with all pixels white
Contrast Ratio
Luminance (brightness) with all pixels black
[Note 3] Definition of response time
The response time (τd and τr) is defined as the following figure and shall be measured by switching the input
signal for “any level of gray (0%, 25%, 50%, 75% and 100%)” and “any level of gray (0%, 25%, 50%, 75% and 100%)”.
15
0% 25% 50% 75% 100%
0% 25% 50% 75%
100%
tr:0%-25% tr:0%-50% tr:0%-75% tr:0%-100% td: 25%-0% tr: 25%-50% tr25%-75% tr: 25%-100% td: 50%-0% td: 50%-25% td: 75%-0% td: 75%-25% td: 75%-50%
td: 100%-0% td: 100%-25% td: 100%-50% td:100%-75%
tr: 50%-75% tr: 50%-100%
t*:x-y...response time from level of gray(x) to level of gray(y) τr = Σ(tr:x-y)/10 , τd = Σ(td:x-y)/10
Bright Bright
Dark
Photodetector
10%
Output
τd
τr
[Note 4] This shall be measured at center of the screen. [Note 5] This value is valid when O/S driving is used at typical input time value.
tr: 75%-100%
[Note 6] Definition of white uniformity;
LK
400D3HC75M
A production year (the last figures of the Christian Era)
A production month (
○ ○ ○
Identification Code
White uniformity is defined as the following with five measurements. (AE)
Maximum luminance of five points (brightness)
=
δ
w
Minimum luminance of five points (brightness)
480 960 1440
A
C
B
10 Shipping and Packing
10.1 Packing form
a) Open Cell quantity in 1 cell box : 15 pcs b) Piling number of cell box : 14 pcs (Max.) c) 1 palette size : 1390(W) x 1150(D) x 1059(H) [mm] d) Total mass of 1 palette filled with full open cells : (490.5)kg (Max.)
10.2 Label
a) Cell label
This label is stuck on the protection film of front polarizer. (Please trace the Cell lot number after the film is peeled off.) ex[LK400D3HC75] JAPAN PRODUCTION
2D Barcode
 
** *******
  
1-9,X,Y,Z)
K: Kameyama Plant.
L: Kameyama Tec. Kameyama Fab.
Z:Sakai Plant.
Model No. Barcode
Lot No.
How to express Lot No.
○ ○
Serial No.
Management No.
LD-K25653
pixel
D
E
270 540 810
pixel
16
b) Packing Label This label is stuck on the packing case (cell box) and carton.
Ex) [LK400D3HC75] JAPAN PRODUCTION
社内品番:
Bar code
LotNO.
(4)
LK400D3HC75M (①)
・(1T)****. *.** (②)
Bar code
Quantity:
Bar code
ユーザ品番:
Bar code
シャープ物流用ラベルです。
Management No.
Lot No. (Date)
Quantity
Model No.
(Q)
15
pcs (③)
(④)
LD-K25653
17
11 Carton storage condition.
Temperature 0°C to 40°C Humidity 95%RH or less Reference condition : 20°C to 35°C, 85%RH or less (summer)
: 5°C to 15°C, 85%RH or less (winter)
· the total storage time (40°C, 95%RH) : 240H or less Sunlight Be sure to shelter a product from the direct sunlight.
Atmosphere Harmful gas, such as acid and alkali which bites electronic components and/or wires must not be detected.
Notes Be sure to put cartons on palette or base, don’t put it on the floor, and store them
keeping off the wall. Please take care of ventilation in storehouse and around cartons, and control temperature not to exceed the limit one of natural environment.
Storage life Six months
LD-K25653
12 Reliability
Reliability test item:
No.
1 2
3 4
5
6
7
Above tests are executed under the CCFL module conditions.
High temperature storage test
Low temperature storage test
High temperature and high humidity
High temperature operation test
Low temperature operation test
(Cell Box with full Open Cells)
(Cell Box with full Open Cells)
Test item Condition
Ta = 60°C 240h Ta = -25°C 240h Ta = 40°C ; 95%RH 240h
operation test
Vibration test
Drop test
(No condensation) Ta = 50°C 240h Ta = 0°C 240h X and Y direction: 15min, Z direction: 60min.
5Hz to 50Hz acceleration velocity: 1.0G Sweeping ratio: 3min Height: 25cm (corner and edge), 32cm (surface) Number: 8times (corner 1time and edge 3times and surface 4times)
13 Precautions
a) Be sure to turn off the power supply when inserting or disconnecting the cable. b) Be sure to design the cabinet so that the Open Cell can be installed without any extra stress such as warp or
twist.
c) Since the polarizer is easily damaged, pay attention not to scratch it. d) Since long contact with water may cause discoloration or spots, wipe off water drop immediately. e) When the polarizer is soiled, wipe it with absorbent cotton or other soft cloth. f) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. Handle with
care.
g) Precautions of peeling off the protection film.
- Be sure to peel off slowly (recommended more than 7sec) and constant speed.
- Peeling direction shows below Fig.5.
- Be sure to ground person with adequate methods such as the anti-static wrist band.
- Be sure to ground S-PWB while peeling of the protection film.
- Ionized air should be blown over during peeling action.
- The protection film must not touch drivers and S-PWBs.
- If adhesive may remain on the polarizer after the protection film peeling off, please remove with isopropyl-alcohol.
Fig.5 Direction of peeling off a protection film.
18
LD-K25653
h) Since the Open Cell consists of TFT and electronic circuits with CMOS-ICs, which are very weak to
electrostatic discharges, persons who are handling the Open Cell should be grounded through adequate methods such as the anti-static wrist band. Connector pins should not be touched directly with bare hands.
- Reference : Process control standard of sharp Item Management standard value and performance standard 1 Anti-static mat (floor) 1 to 50 [M ohm]
2 Anti-static mat (shelf, desk) 1 to 100 [M ohm] 3 Ionizer Attenuate from +1000V to +100V within 2 sec 4 Anti-static wrist band 0.8 to 10 [M ohm] 5 Anti-static wrist band entry and
Below 1000 [ohm]
ground resistance
6 Temperature
22 to 26 [°C]
7 Humidity 60 to 70 [%RH]
i) The Open Cell has some PWBs, take care to prevent them from any stress or pressure when handling or
installing the Open Cell, otherwise some of electronic parts on the PWBs may be damaged.
j) Be sure to turn off the power supply when inserting or disconnecting the cable. k) Be sure to design the module and cabinet so that the Open Cell can be installed without any extra stress
such as warp or twist.
l) When handling the Open Cell and assembling them into module and cabinets, please be noted that
long-term storage in the environment of oxidization or deoxidization gas and the use of such materials as reagent, solvent, adhesive, resin, etc. which generate these gasses, may cause corrosion and discoloration of the Open Cell.
m) Applying too much force and stress to PWB and driver may cause a malfunction electrically and
mechanically.
n) The Open Cell has high frequency circuits. Sufficient suppression to EMI should be done by system
manufacturers.
o) Please be careful since image retention may occur when a fixed pattern is displayed for a long time. p) The chemical compound, which causes the destruction of ozone layer, is not used. q) Please design the heat dissipation of the module with enough care for C-PWB, Source-Driver and
Gate-Driver’ IC.
r) This Open Cell is corresponded to RoHS. ‘‘R.C.’’ label on the side of palette shows it.
s) When any question or issue occurs, it shall be solved by mutual discussion.
19
LD-K25653-20
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