SHARP LK400D3HA3K Specification
RECORDS OF REVISION
MODEL No. : LK400D3HA3K
SPEC No. : LD-K22223A
DATE
NO.
2010.02.23
LD-K22223
REVISED
2010.04.12 LD-K22223A A
No.
PAGE SUMMARY NOTE
- - - 1st Issue
All Reformat of all pages
10
[Add]Scan Direction
[Change]Optical calacteristics
2nd Issue
13
Chromaticity ,Luminance uniformity
[Change]Optical calacteristics[Note6]
15
Definition of white uniformity(5point -> 9point)
[Add]Optical characteristics[Note7]
15
[Add]Reliability test item
16
LD-K22223A-1
1 Application
This specification applies to the color 40.0” TFT-LCD Open Cell LK400D3HA3K
* This specification is proprietary products of SHARP CORPORATION (“SHARP”) and include materials protected
under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by any
means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of
SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.
* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
life support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these technical literature.
* Contact and consult with a SHARP sales representative for any questions about this device.
2 Overview
This Open Cell is a color active matrix LCD Open-Cell incorporating amorphous silicon TFT (Thin Film Transistor).
It is composed of a color TFT-LCD panel, driver ICs and Source PWB. The following content can be achieved in
using LK0DZ1C0115 (C-PWB) and LK0DZ1C0114 (FPC) that SHARP specifies. Graphics and texts can be
displayed on a 1920×RGB×1080 dots panel with one billion colors by using 10bit+ LVDS (L
ifferential Signaling) to interface, +12V of DC supply voltages.
D
And in order to improve the response time of LCD, This module applies the Over Shoot driving (O/S driving)
technology for the control circuit .In the O/S driving technology, signals are being applied to the Liquid Crystal
according to a pre-fixed process as an image signal of the present frame when a difference is found between image
signal of the previous frame and that of the current frame after comparing them.
With combination of these technologies, motion blur can be reduced and clearer display performance can be
realized.
ow Voltage
CN1
Power Supply
SOURCE DRIVER
LCD PANEL
CN3
Circuit
FPC
GATE DRIVER
LK0DZ1C0115
LK0DZ1C0114
CONTROL PWB
Control Signals
FPC
GATE DRIVER
1920×3(RGB)×1080
LK400D3HA3K (Open Cell)
3 Mechanical Specifications
Parameter Specifications Unit
Display size
Active area 885.6H) x 498.15 (V) mm
Pixel Format
Pixel pitch 461.25(H) x 461.25 (V) um
Pixel configuration R, G, B vertical stripe
Display mode Normally black
Open Cell Outline Dimensions
[Note1]
Mass
Surface treatment[[Note2]
[Note1]Outline Dimensions are shown fig.1
[Note2]With the protection film removed.
101.609 （Diagonal）
40.0 （Diagonal）
1920(H) x 1080(V)
（1pixel = R + G + B dot）
921.18(H) x 555.7(V) x 1.82(D)
1.88 ±0.3
- Front polarizer : Glare
Hard coating: 2H and more
- Rear polarizer :
Hard coating less (B)
4 Open Cell Driving Specifications
4.1
Driving interface of Control PWB SHARP specifies[LK0DZ1C0115]
CN1 (Interface signals and +12V DC power supply)
Using connector : PF050-C82B-C35 (UJU Electronics Co, Ltd.)
Mating LVDS transmitter : THC63LVD1023 or equivalent device
Pin No. Symbol Function Remark
1 VCC
2 VCC +12V Power Supply
3 VCC +12V Power Supply
4 VCC +12V Power Supply
5 VCC +12V Power Supply
6 Reserved It is required to set non-connection(OPEN)
7 GND
8 GND
9 GND
10
11
12
13
14
15
16 GND
17
18
19
20
21
22
23
24 GND
25
26
27
28
29
30
AIN0-
AIN0+
AIN1-
AIN1+
AIN2-
AIN2+
ACK-
ACK+
GND
AIN3-
AIN3+
AIN4-
AIN4+
CIN0-
CIN0+
CIN1-
CIN1+
CIN2-
CIN2+
+12V Power Supply
Aport (-)LVDS CH0 differential data input
Aport (+)LVDS CH0 differential data input
Aport (-)LVDS CH1 differential data input
Aport (+)LVDS CH1 differential data input
Aport (-)LVDS CH2 differential data input
Aport (+)LVDS CH2 differential data input
Aport LVDS Clock signal(-)
Aport LVDS Clock signal(+)
Aport (-)LVDS CH3 differential data input
Aport (+)LVDS CH3 differential data input
Aport (-)LVDS CH4 differential data input
Aport (+)LVDS CH4 differential data input
Cport (-)LVDS CH0 differential data input
Cport (+)LVDS CH0 differential data input
Cport (-)LVDS CH1 differential data input
Cport (+)LVDS CH1 differential data input
Cport (-)LVDS CH2 differential data input
Cport (+)LVDS CH2 differential data input
LD-K22223A-2
cm
inch
pixel
mm
kg
LD-K22223A-3
31
32
33
34
35
36
37
38
39 GND
40 I2C_SCL I2C CLK Pull up 3.3V[Note1]
41 Reserved It is required to set non-connection(OPEN)
42 Reserved
43 WP
44 I2C_SDA I2C DATA Pull up 3.3V[Note1]
45 SELLVDS
46 Reserved
47 Reserved It is required to set non-connection(OPEN)
48 Reserved
49 Reserved
50 Reserved
51 Reserved
52 GND
53 DIN4+
54 DIN455 DIN3+
56 DIN357 GND
58 DCK+
59 DCK60 GND
61 DIN2+
62 DIN263 DIN1+
64 DIN165 DIN0+
66 DIN067 GND
68 BIN4+
69 BIN470 BIN3+
71 BIN372 GND
73 BCLK+
74 BCLK75 GND
76 BIN2+
77 BIN278 BIN1+
79 BIN180 BIN0+
81 BIN082 GND
GND
CCK-
CCK+
GND
CIN3-
CIN3+
CIN4-
CIN4+
Cport LVDS Clock signal(-)
Cport LVDS Clock signal(+)
Cport (-)LVDS CH3 differential data input
Cport (+)LVDS CH3 differential data input
Cport (-)LVDS CH4 differential data input
Cport (+)LVDS CH4 differential data input
It is required to set non-connection(OPEN)
I2C bus enable(L/Open:enable, H:disable)
Select LVDS data order [Note4]
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
Dport (+)LVDS CH4 differential data input
Dport (-)LVDS CH4 differential data input
Dport (+)LVDS CH3 differential data input
Dport (-)LVDS CH3 differential data input
Dport LVDS Clock signal(+)
Dport LVDS Clock signal(-)
Dport (+)LVDS CH2 differential data input
Dport (-)LVDS CH2 differential data input
Dport (+)LVDS CH1 differential data input
Dport (-)LVDS CH1 differential data input
Dport (+)LVDS CH0 differential data input
Dport (-)LVDS CH0 differential data input
Bport (+)LVDS CH4 differential data input
Bport (-)LVDS CH4 differential data input
Bport (+)LVDS CH3 differential data input
Bport (-)LVDS CH3 differential data input
Bport LVDS Clock signal(+)
Bport LVDS Clock signal(-)
Bport (+)LVDS CH2 differential data input
Bport (-)LVDS CH2 differential data input
Bport (+)LVDS CH1 differential data input
Bport (-)LVDS CH1 differential data input
Bport (+)LVDS CH0 differential data input
Bport (-)LVDS CH0 differential data input
[Note2]
Pull up 3.3V[Note3]
LD-K22223A-4
[note] GND of a liquid crystal panel drive part should be connected with a module chassis..
[Note 1] The equivalent circuit figure of the terminal [Note2] The equivalent circuit figure of the terminal
[Note3] The equivalent circuit figure of the terminal
[Note 4] LVDS Data order
Data L(GND)
TA0
TA1
TA2
TA3
TA4
TA5
TA6
TB0
TB1
TB2
TB3
TB4
TB5
TB6
TC0
TC1
TC2
TC3
TC4 NA NA
TC5 NA NA
TC6 DE(*) DE(*)
TD0
TD1
TD2
TD3
TD4
TD5
TD6
TE0
TE1
TE2
TE3
TE4
TE5
TE6
NA: Not Available
(*)Since the display position is prescribed by the rise of DE(Display Enable)signal, please do not fix DE
signal during operation at ”High”.
SELLVDS
[VESA]
R0(LSB)
R1
R2
R3
R4
R5
G0(LSB)
G1
G2
G3
G4
G5
B0(LSB)
B1
B2
B3
B4
B5
R6
R7
G6
G7
B6
B7
N/A
R8
R9(MSB)
G8
G9(MSB)
B8
B9(MSB)
N/A
LD-K22223A-5
H(3.3V) or Open
[JEIDA]
R4
R5
R6
R7
R8
R9(MSB)
G4
G5
G6
G7
G8
G9(MSB)
B4
B5
B6
B7
B8
B9(MSB)
R2
R3
G2
G3
B2
B3
N/A
R0(LSB)
R1
G0(LSB)
G1
B0(LSB)
B1
N/A
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