Sharp LH168P Datasheet
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1
DESCRIPTION
The LH168P is a 309-output TFT-LCD source
driver IC which can simultaneously display 262 144
colors in 64 gray scales.
FEATURES
• Selectable number of LCD drive outputs : 309/300
• Built-in 6-bit digital input DAC
• Possible to display 262 144 colors in 64 gray
scales with reference voltage input of 11 gray
scales : This reference voltage input corresponds
to ‹ correction and intermediate reference voltage
input can be abbreviated
• Cascade connection
• Sampling sequence :
Output shift direction can be selected
XO
1, YO1, ZO1/XO103, YO103, ZO103 or
ZO
103, YO103, XO103/ZO1, YO1, XO1
• Shift clock frequency : 55 MHz (MAX.)
• Supply voltages
–V
CC (for logic system) : +3.0 to +5.5 V
–V
LS (for LCD drive system) : +3.0 to +5.5 V
• Package : 350-pin TCP (Tape Carrier Package)
PIN CONNECTIONS
LH168P
LH168P
309-output TFT-LCD Source Driver IC
XO103
YO103
ZO103
307
308
309
XO
1
YO1
ZO1
1
2
3
CHIP SURFACE
GND
VLS
V9
V7
V5
V3
V1
XI5
XI4
XI3
XI2
XI1
XI0
YI5
YI4
YI3
YI2
YI1
YI0
SPOI
GND
MODE
CK
VCC
SPIO
LS
ZI5
ZI4
ZI3
ZI2
ZI1
ZI0
LBR
V0
V2
V4
V6
V8
V10
VLS
GND
350
349
348
347
346
345
344
343
342
341
340
339
338
337
336
335
334
333
332
331
330
329
328
327
326
325
324
323
322
321
320
319
318
317
316
315
314
313
312
311
310
350-PIN TCP
TOP VIEW
NOTE :
Doesn't prescribe TCP outline.
2
LH168P
PIN DESCRIPTION
PIN NO. SYMBOL I/O DESCRIPTION
1 to 309 XO
1-ZO103 O LCD drive output pins
310, 330, 350 GND – Ground pins
311, 349 V
LS – Power supply pins for analog circuit
312 to 317 V
10, V8, V6, V4, V2, V0 I Reference voltage input pins
318 LBR I Shift direction selection input pin
319 to 324 ZI
0-ZI5 I Data input pins
325 LS I Latch input pin
326 SPIO I/O Start pulse input/cascade output pin
327 V
CC – Power supply pin for digital circuit
328 CK I Shift clock input pin
329 MODE I 309/300-output selection input pin
331 SPOI I/O Start pulse input/cascade output pin
332 to 337 YI
0-YI5 I Data input pins
338 to 343 XI
0-XI5 I Data input pins
344 to 348 V1, V3, V5, V7, V9 I Reference voltage input pins
LH168P
3
BLOCK DIAGRAM
CK 328
YI0 332
XI5
LS
343
XI0 338
SPOI 331
LBR 318
MODE 329
V0 317
V
1
V2
V3
V4
V5
V6
V7
V8
V9
V10 312
1
ZI0 319
YI5 337
ZI5 324
325
307
311
326
330327
350310
SPIO
V
LS
349 VLS
XO1
2
YO
1
3
ZO
1 XO103
308
YO
103
309
ZO
103
6
6
6
6
6
6
64
6
6
6
6
10321
6
6
V
CC GND GND GND
SHIFT REGISTER
SAMPLING MEMORY
HOLD MEMORY
DATA
LATCH
REFERENCE
VOLTAGE
GENERATION
CIRCUIT
LEVEL SHIFTER
DA CONVERTER
OUTPUT CIRCUIT
344
316
345
315
346
314
347
313
348
FUNCTIONAL OPERATIONS OF EACH BLOCK
BLOCK FUNCTION
Shift Register
Used as a bi-directional shift register which performs the shifting operation by CK and
selects bits for data sampling.
Data Latch Used to temporary latch the input data which is sent to the sampling memory.
Sampling Memory Used to sample the data to be entered by time sharing.
Hold Memory Used for latch processing of data in the sampling memory by LS input.
Level Shifter
Used to shift the data in the hold memory to the power supply level of the analog circuit
unit and sends the shifted data to DA converter.
Reference Voltage
Generation Circuit
Used to generate a gamma-corrected 64-level voltage by the resistor dividing circuit.
DA Converter
Used to generate an analog signal according to the display data and sends the signal to
the output circuit.
Output Circuit
Used as a voltage follower, configured with an operational amplifier and an output buffer,
which outputs analog signals of 64 gray scales to LCD drive output pin.
INPUT/OUTPUT CIRCUITS
I
V
CC
GND
To Internal Circuit
Fig. 1 Input Circuit (1)
¿Applicable pins¡
CK, LS, LBR, XI0-XI5,
YI
0-YI5, ZI0-ZI5
I
V
CC VCC
GND
To Internal Circuit
Fig. 2 Input Circuit (2)
¿Applicable pin¡
MODE
LH168P
4
LH168P
5
VCC
GND
Output Signal
Output Control Signal
VCC
GND
To Internal Circuit
I
O
Nch Tr
Pch Tr
Fig. 3 Input/Output Circuit
¿Applicable pins¡
SPIO, SPOI
O
V
LS
GND
From Internal Circuit
Operational Amplifier
+
–
Fig. 4 Output Circuit
¿Applicable pins¡
XO
1-XO103,
YO
1-YO103,
ZO
1-ZO103
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