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1
DESCRIPTION
The LH168K is a 324-output TFT-LCD source
driver IC which can simultaneously display 262 144
colors in 64 gray scales.
FEATURES
• Selectable number of LCD drive outputs :
324/321/312/309
• Built-in 6-bit digital input DAC
• Dot-inversion drive : Outputs the inverted gray
scale voltages between LCD drive pins next to
each other
• 2-port input for each circuit of data inputs R, G
and B, and it is possible to sample and hold
display data of two pixels at the same time at
324-output and 312-output modes. 1-port input for
each circuit of data inputs R, G and B at 321output and 309-output modes.
• Possible to display 262 144 colors in 64 gray scales
with reference voltage input of 18 gray scales : This
reference voltage input corresponds to ‹ correction
and intermediate reference voltage input can be
abbreviated
• Cascade connection
• Sampling sequence :
Output shift direction can be selected
XO
1, YO1, ZO1/XO108, YO108, ZO108 or
ZO
108, YO108, XO108/ZO1, YO1, XO1
• Shift clock frequency : 55 MHz (MAX.)
• Supply voltages
–V
CC (for logic system) : +2.7 to +3.6 V
–V
LS (for LCD drive system) : +12 V (MAX.)
• Package : 395-pin TCP (Tape Carrier Package)
PIN CONNECTIONS
LH168K
LH168K
324-output TFT-LCD Source Driver IC
XO108
YO108
ZO108
322
323
324
XO
1
YO1
ZO1
1
2
3
CHIP SURFACE
GND
VLS
GND
MODE
PBS
XB5
XB0
XA5
XA0
YA5
YA0
SPOI
VH0
VH8
VH16
VH24
VH32
VH40
VH48
VH56
VH63
VL63
VL56
VL48
VL40
VL32
VL24
VL16
VL8
VL0
POLB
POLA
CK
SPIO
LS
REV2
REV
YB5
YB0
ZB5
ZB0
ZA5
ZA0
LBR
VCC
VLS
GND
395
394
393
392
391
390
385
384
379
378
373
372
371
370
369
368
367
366
365
364
363
362
361
360
359
358
357
356
355
354
353
352
351
350
349
348
347
346
341
340
335
334
329
328
327
326
325
395-PIN TCP
TOP VIEW
NOTE :
Doesn't prescribe TCP outline.
LH168K
2
PIN DESCRIPTION
PIN NO. SYMBOL I/O DESCRIPTION
1 to 324 XO
1-ZO108 O LCD drive output pins
325, 393, 395 GND – Ground pins
326, 394 V
LS – Power supply pins for analog circuit
327 V
CC – Power supply pin for digital circuit
328 LBR I Shift direction selection input pin
329 to 334 ZA
0-ZA5 I Data input pins
335 to 340 ZB0-ZB5 I Data input pins
341 to 346 YB
0-YB5 I Data input pins
347, 348 REV, REV
2 I LCD drive output polarity exchange input pins
349 LS I Latch input pin
350 SPIO I/O Start pulse input/cascade output pin
351 CK I Shift clock input pin
352, 353 POLA, POLB I Input data polarity exchange input pins
354 to 362 VL
0-VL63 I Reference voltage input pins
363 to 371 VH63-VH0 I Reference voltage input pins
Data input pinsIXB
0-XB5385 to 390
Data input pinsIXA
0-XA5379 to 384
Data input pinsIYA
0-YA5373 to 378
Start pulse input/cascade output pinI/OSPOI372
392 MODE I Input pin for selecting the number of LCD drive outputs
391 PBS I 2-port/1-port selection input pin
LH168K
4
FUNCTIONAL OPERATIONS OF EACH BLOCK
BLOCK FUNCTION
Shift Register
Used as a bi-directional shift register which performs the shifting operation by CK and
selects bits for data sampling.
Data Latch Used to temporary latch the input data which is sent to the sampling memory.
Sampling Memory Used to sample the data to be entered by time sharing.
Hold memory Used for latch processing of data in the sampling memory by LS input.
Level Shifter
Used to shift the data in the hold memory to the power supply level of the analog circuit
unit and sends the shifted data to DA converter.
Reference Voltage
Generation Circuit
Used to generate a gamma-corrected 64 x 2-level voltage by the resistor dividing circuit.
DA Converter
Used to generate an analog signal according to the display data and sends the signal to
the output circuit.
Output Circuit
Used as a voltage follower, configured with an operational amplifier and an output buffer,
which outputs analog signals of 64 x 2 gray scales to LCD drive output pin.
INPUT/OUTPUT CIRCUITS
I
V
CC
GND
To Internal Circuit
Fig. 1 Input Circuit (1)
¿Applicable pins¡
CK, LS, REV, LBR,
MODE, PBS,
XA
0-XA5, XB0-XB5,
YA
0-YA5, YB0-YB5,
ZA
0-ZA5, ZB0-ZB5
I
V
CC
GND
To Internal Circuit
GND
Fig. 2 Input Circuit (2)
¿Applicable pins¡
POLA, POLB, REV
2
O
V
LS
GND
From Internal Circuit
Operational Amplifier
+
–
Fig. 4 Output Circuit
¿Applicable pins¡
XO
1-XO108,
YO
1-YO108,
ZO
1-ZO108
VCC
GND
Nch Tr
Output Signal
Output Control Signal
VCC
GND
To Internal Circuit
I
O
Pch Tr
Fig. 3 Input/Output Circuit
¿Applicable pins¡
SPIO, SPOI