Sharp LH1687 Datasheet
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1
DESCRIPTION
The LH1687 is a 240-output TFT-LCD source
driver IC used in such products as TV sets. The
LH1687 samples and holds three video signals of
R, G and B by sample and hold circuits
synchronized with the CK, and simultaneously
outputs the LCD drive voltage from all output pins.
FEATURES
• Number of LCD drive outputs : 240
• Output circuit form : Push pull output
• Power save function : By setting the LCD drive
output in a high-impedance condition, the current
source of the LCD drive output circuit is cut off,
which makes low power operation possible
• Sampling timing : Normal sampling operation and
3-point simultaneous sampling operation can be
selected
• Video signal setting : Available for stripe pixel
array panels and delta pixel array panels using
mode setting circuit
• Sampling clock frequency : 25 MHz (MAX.)
• Cascade connection
• Sampling sequence :
Output shift direction can be selected
OS
1/OS240 or OS240/OS1
• Output amplitude voltage :
4.8 Vp-p (at 5.0 V supply voltage)
• Supply voltages
–V
CCL (for logic system) : +3.0 to +5.5 V
–V
CCA (for LCD drive system) : +3.0 to +5.5 V
• Operating temperature : –30 to + 85 ˚C
• Package : 264-pin TCP (Tape Carrier Package)
PIN CONNECTIONS
LH1687
LH1687
240-output TFT-LCD Source Driver IC
OS240240
OS
11
CHIP SURFACE
VCCA
VCCL
GNDA
GNDL
TST5
VC
VB
VA
MODE
PS
RL
SAM
CTR
CK
SPIO
SPOI
TEST4
TEST3
TEST2
TEST1
GNDL
GNDA
VCCL
VCCA
264
263
262
261
260
259
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
264-PIN TCP
TOP VIEW
NOTE :
Doesn't prescribe TCP outline.
LH1687
2
PIN NO. SYMBOL I/O DESCRIPTION
1 to 240 OS
1-OS240 O LCD drive output pins
241, 264 V
CCA – Power supply pins for LCD drive circuit
242, 263 VCCL – Power supply pins for logic circuit
243, 262 GNDA – Ground pins for LCD drive system
244, 261 GNDL – Ground pins for logic system
245 to 248 TST
1-TST4 I IC test pins
249 SPOI I/O Start pulse input/cascade output pin
250 SPIO I/O Start pulse input/cascade output pin
251 CK I Horizontal shift clock input pin
252 CTR I LCD drive circuit operation selection pin
253 SAM I Sampling mode selection pin
254 RL I Sampling sequence selection pin
255 PS I Power save mode setting pin
256 MODE I Video signals form setting pin
257 to 259 V
A, VB, VC I Video signal input pins
IC test pinITST
5260
PIN DESCRIPTION
3
LH1687
TST5
VCCAVCCAVCCLVCCL GNDA GNDA GNDL GNDL OS1 OS240
241
260
TST
4 248
PS 255
V
C 259
V
B 258
V
A 257
TST
3 247
TST
2 246
TST
1 245
RL 254
SAM 253
CTR 252
CK 251
SPIO
CONTROL
LOGIC
MODE
SETTING
CIRCUIT
BIAS
GENERATION
CIRCUIT
250
SPOI 249
MODE 256
264 242 263 243 262 244 261 1 240
BI-DIRECTIONAL SHIFT
REGISTER
SAMPLING SIGNAL
CREATION CIRCUIT
SAMPLE AND HOLD CIRCUIT
OUTPUT CIRCUIT
1 240
1 240
1 240
1 240
BLOCK DIAGRAM
LH1687
4
INPUT/OUTPUT CIRCUITS
I
V
CCL
GNDL
To Internal Circuit
Fig. 1 Input Circuit (1)
¿Applicable pins¡
CK, CTR, MODE
I
V
CCA
GNDA
To Internal Circuit
Fig. 2 Input Circuit (2)
¿Applicable pins¡
V
A, VB, VC
BLOCK FUNCTION
Control Logic
Used to create signals necessary for each operation mode setting and sampling signal
creation circuits, etc.
Bi-directional Shift
Register
Used as transfer circuit of video sampling start signals.
It is possible to set the direction of sampling start signal sequence OS
1/OS240 or
OS240/OS1 by setting the R/L pin.
Sampling Signal
Creation Circuit
Used to create the sampling signals corresponding to each output pin based on the
sampling start signals transferred by the bi-directional shift register.
Mode Setting Circuit Used to set the form of the video signals to be sent to the sample and hold circuits.
Sample and Hold
Circuit
Used to sample the video signals input from the mode setting circuit at the timing of the
sampling signals and hold the sampling data until the next sampling operation.
Bias Generation Circuit Used to generate bias voltage necessary for output circuits.
Output Circuit
The circuit consists of a push-pull output operational amplifier and outputs the voltage
corresponding to the data held in the sample and hold circuits.
FUNCTIONAL OPERATIONS OF EACH BLOCK
5
LH1687
I
V
CCLVCCL
GNDL
To Internal Circuit
Fig. 3 Input Circuit (3)
¿Applicable pins¡
SAM, RL, PS,
TST
1-TST4
I
V
CCAVCCA
GNDA
To Internal Circuit
Fig. 4 Input Circuit (4)
¿Applicable pin¡
TST
5
VCCL
GNDL
Nch Tr
Output Signal
Output Control Signal
VCCL
GNDL
To Internal Circuit
I
O
Pch Tr
Fig. 5 Input/Output Circuit
¿Applicable pins¡
SPIO, SPOI
6
LH1687
O
V
CCA
GNDA
From Internal Circuit
Operational
Amplifier
+
–
Fig. 6 Output Circuit
¿Applicable pins¡
OS
1-OS240
FUNCTIONAL DESCRIPTION
Pin Functions
SYMBOL FUNCTION
V
CCL Used as power supply pin for logic circuit, connected to +3.0 to +5.0 V.
V
CCA
Used as power supply pin for LCD drive circuit, connected to +3.0 to +5.0 V.
Must be set to V
CCL ≤ VCCA.
GNDL Used as ground pin for logic circuit, connected to 0 V.
GNDA Used as ground pin for LCD drive circuit, connected to 0 V.
TST
1-TST4 Used as input pins for IC testing, connected to VCCL (high level).
TST5 Used as input pins for IC testing, connected to VCCA (high level).
SPIO
SPOI
Used as input/output pins of cascade operation start signal.
SPIO becomes input pin of operation start signal and SPOI becomes output pin of
operation start signal of next IC when set to R/L = "H".
SPOI becomes input pin of operation start signal and SPIO becomes output pin of
operation start signal of next IC when set to R/L = "L".
CK
Used as horizontal shift clock input pin.
Video signals are sampled in order at the rising and falling edge of CK.
CTR
Used as input pin of selecting video signal sampling circuits and selecting input signal of
output operational amplifiers.
SAM
Used as input pin for setting the selecting of normal sampling operation or 3-point
simultaneous sampling operation.
For normal sampling operation, video signals are sampled into sample and hold circuits
every 1 LCD drive output.
For 3-point simultaneous sampling operation, video signals are sampled into sample and
hold circuits every 3 LCD drive outputs simultaneously.
For either operation, sampling signals are shifted at every rising and falling edge of
horizontal shift clock of CK pin (half clock), and their sampling period is equal to the period
of one clock.
LH1687
7
SYMBOL FUNCTION
PS
Used as input pin for setting of power save mode.
LCD drive output pins output voltage corresponding to video signals held in the sample
and hold circuits when set PS to "H".
The LH1687 is set low power mode by setting high-impedance condition and cutting off
current source of LCD drive outputs when set PS to "L".
MODE
Used as input pin for setting video signals for sampling in the sample and hold circuits.
By mode setting circuit, video signals are sampled and output in order of V
B, VA, and VC
when set to "H" and in order of VC, VB, and VA when set to "L" with respect to OS1 to
OS
240 .
OS
1-OS240
Used as LCD drive output pins.
Voltage corresponding to video signals held in the sample and hold circuits is output when
set to PS = "H", and becomes high-impedance condition when set to PS = "L".
Used as input pins of video signals.
V
B, VA, VC, π VB, VA, VC or VC, VB, VA, π VC, VB, VA are input with respect to LCD drive
outputs OS1, OS2, OS3, π OS238, OS239, OS240 by MODE pin setting condition.
V
A
VB
VC
RL
Used as input pin for setting the shift direction of video signal sampling sequence and the
selecting input/output of SPIO/SPOI pins.
Video signals are sampled in order of OS
1/OS240, set SPIO to input of operation start
signal and set SPOI to output of operation start signal of next IC when set RL to "H".
Video signals are sampled in order of OS
240/OS1, set SPOI to input of operation start
signal and set SPIO to output of operation start signal of next IC when set RL to "L".
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