Sharp LC-42XD10RU, LC-42XD10E Service Manual

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LC-42XD10E/RU

SERVICE MANUAL

No. S37C8LC42XD10

LCD COLOUR TELEVISION

MODEL

In the interests of user-safety (Required by safety regulations in some countries) the set should be restored to its original condition and only parts identical to those specified should be used.

LC-42XD10E/RU

CONTENTS

SAFETY PRECAUTION

IMPORTANT SERVICE SAFETY PRE-

CAUTION ............................................................i

Precautions for using lead-free solder ...............ii

CHAPTER 1. OPERATION MANUAL

[1] SPECIFICATIONS ......................................... 1-1

[2] OPERATION MANUAL .................................. 1-2

[3] DIMENSIONS ................................................ 1-5

CHAPTER 2. REMOVING OF MAJOR PARTS

[1] REMOVING OF MAJOR PARTS ................... 2-1

CHAPTER 3. ADJUSTMENT PROCEDURE

[1] ADJUSTMENT PROCEDURE....................... 3-1

CHAPTER 6. BLOCK DIAGRAM/WIRING DIAGRAM

[1] OVERALL WIRING DIAGRAM ......................6-1

[2] BLOCK DIAGRAM.........................................6-3

[3] POWER BLOCK DIAGRAM .......................... 6-5

CHAPTER 7. PRINTED WIRING BOARD

[1] KEY UNIT PRINTED WIRING BOARD .........7-1

[2] R/C, LED UNIT PRINTED WIRING

BOARD.......................................................... 7-2

[3] MAIN UNIT PRINTED WIRING BOARD........7-3

[4] AV UNIT PRINTED WIRING BOARD .......... 7-11

[5] POWER UNIT PRINTED WIRING BOARD......7-17

[6] DIGITAL TUNER UNIT PRINTED WIRING

BOARD........................................................7-21

[7] DIGITAL UNIT PRINTED WIRING BOARD......7-23

CHAPTER 4. TROUBLESHOOTING TABLE

[1] TROBLESHOOTING TABLE ......................... 4-1

CHAPTER 5. MAJOR IC INFORMATIONS

[1] MAJOR IC INFORMATIONS.......................... 5-1

Parts marked with " " are important for maintaining the safety of the set. Be sure to replace these parts with specified ones for maintaining the safety and performance of the set.

CHAPTER 8. SCHEMATIC DIAGRAM

[1] DESCRIPTION OF SCHEMATIC DIA-

GRAM............................................................8-1

[2] SCHEMATIC DIAGRAM ................................8-2

Parts Guide

This document has been published to be used for after sales service only. The contents are subject to change without notice.

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Service Manual

SAFETY PRECAUTION

IMPORTANT SERVICE SAFETY PRECAUTION

 WARNING

1. For continued safety, no modification of any circuit should be attempted.

2. Disconnect AC power before servicing.

 BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard)

Before returning the receiver to the user, perform the following safety checks:

3. Inspect all lead dress to make certain that leads are not pinched, and check that hardware is not lodged between the chassis and other metal parts in the receiver.

4. Inspect all protective devices such as non-metallic control knobs, insulation materials, cabinet backs, adjustment and compartment covers or shields, isolation resistor-capacitor networks, mechanical insulators, etc.

5. To be sure that no shock hazard exists, check for leakage current in the following manner.

• Plug the AC cord directly into a 220~240 volt AC outlet.

• Using two clip leads, connect a 1.5k ohm, 10 watt resistor paralleled by a 0.15µF capacitor in series with all exposed metal cabinet parts and a known earth ground, such as electrical conduit or electrical ground connected to an earth ground.

• Use an AC voltmeter having with 5000 ohm per volt, or higher, sensitivity or measure the AC voltage drop across the resistor.

• Connect the resistor connection to all exposed metal parts having a return to the chassis (antenna, metal cabinet, screw heads, knobs and control shafts, escutcheon, etc.) and measure the AC voltage drop across the resistor. All checks must be repeated with the AC cord plug connection reversed. (If necessary, a nonpolarized adaptor plug must be used only for the purpose of completing these checks.) Any reading of 1.05 V peak (this corresponds to 0.7 mA peak AC.) or more is excessive and indicates a potential shock hazard which must be corrected before returning the monitor to the owner.

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

SAFETY NOTICE

Many electrical and mechanical parts in LCD color television have special safety-related characteristics.

These characteristics are often not evident from visual inspection, nor can protection afforded by them be necessarily increased by using replacement components rated for higher voltage, wattage, etc.

Replacement parts which have these special safety characteristics are identified in this manual; electrical components having such features

are identified by “ ” and shaded areas in the Replacement Parts List and Schematic Diagrams.

For continued protection, replacement parts must be identical to those used in the original circuit.

The use of a substitute replacement parts which do not have the same safety characteristics as the factory recommended replacement parts shown in this service manual, may create shock, fire or other hazards.

Service work should be performed only by qualified service technicians who are thoroughly familiar with all safety checks and the

servicing guidelines which follow:

CAUTION:

FOR CONTINUED PROTECTION AGAINST A RISK OF FIRE REPLACE ONLY WITH SAME TYPE FUSE.

F701 (6.3A/250V)

DVM

AC SCALE

1.5k ohm 10W

TO EXPOSED METAL PARTS

CONNECT TO KNOWN EARTH GROUND

0.15µF

TEST PROBE

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Precautions for using lead-free solder

Employing lead-free solder

• “PWBs” of this model employs lead-free solder. The LF symbol indicates lead-free solder, and is attached on the PWBs and service manuals. The alphabetical character following LF shows the type of lead-free solder.

Example:

Using lead-free wire solder

• When fixing the PWB soldered with the lead-free solder, apply lead-free wire solder. Repairing with conventional lead wire solder may cause damage or accident due to cracks.

As the melting point of lead-free solder (Sn-Ag-Cu) is higher than the lead wire solder by 40 °C, we recommend you to use a dedicated soldering bit, if you are not familiar with how to obtain lead-free wire solder or soldering bit, contact our service station or service branch in your area.

Soldering

• As the melting point of lead-free solder (Sn-Ag-Cu) is about 220 °C which is higher than the conventional lead solder by 40 °C, and as it has poor solder wettability, you may be apt to keep the soldering bit in contact with the PWB for extended period of time. However, Since the land may be peeled off or the maximum heat-resistance temperature of parts may be exceeded, remove the bit from the PWB as soon as you confirm the steady soldering condition.

Lead-free solder contains more tin, and the end of the soldering bit may be easily corroded. Make sure to turn on and off the power of the bit as required.

If a different type of solder stays on the tip of the soldering bit, it is alloyed with lead-free solder. Clean the bit after every use of it.

When the tip of the soldering bit is blackened during use, file it with steel wool or fine sandpaper.

• Be careful when replacing parts with polarity indication on the PWB silk.

Lead-free wire solder for servicing

L Fa

Indicates lead-free solder of tin, silver and copper.

L F a/a

Indicates lead-free solder of tin, silver and copper.

Part No. Description Code

ZHNDAi123250E J φ0.3mm 250g (1roll) BL ZHNDAi126500E J φ0.6mm 500g (1roll) BK ZHNDAi12801KE J φ1.0mm 1kg (1roll) BM

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LC42XD10E

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CHAPTER 1. OPERATION MANUAL

[1] SPECIFICATIONS

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[2] OPERATION MANUAL

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[3] DIMENSIONS

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LC42XD10E

Service Manual

CHAPTER 2. REMOVING OF MAJOR PARTS

[1] REMOVING OF MAJOR PARTS

1. Detach the Terminal Cover.

2. Remove the 2 lock screws , 10 lock screws . and 4 lock screws . Detach the Rear Cabinet.

Terminal Cover

Rear Cabinet

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3. Detach the Main AV Cover Cover.

4. Remove the 4 lock screws and detach the Stand Fix Angle.

5. Remove the 2 lock screws . Detach the Bottom Cover.

Rear Cabinet

Main AV Cover

Stand Fix Angle

Bottom Cover

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6. Remove the 4 lock screws . Detach the Center Angle.

7. Remove the 2 lock screws . Detach the Stand Angle.

Center Angle

Stand Angle

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8. Remove the 5 lock screws . and 1 screw . Detach the Full Shield.

9. Remove all the connectors from PWBs.

8 9

Wire "KM" to WH

< CAUTIONS >

Do Not sandwich wire "RA","SP"

< CAUTIONS >

Do Not sandwich wire "KM"

INSULATION TAPE

Full Shield

Wire "SPL,R "

Wire "SP" to Pin

Wire "TWEETER "

Wire "SP" to WH

#Press Wire lightly

INSULATION TAPE

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10.Remove the 4 lock screws . Detach the Speaker L/R.

11.Remove the 14 lock screws , and 2 lock screws . Detach the Speaker Angle.

Speaker-LSpeaker-R

Speaker Angle

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12.Remove the 5 lock screws . Detach the Mini Unit.

13.Remove all the connectors from PWBs.

RA:MAIN-RC

for wire "RA"

SP:AV-SP

for "SP" wire

Wire "RA" to WH

Wire "RA"

Wire "SP"

Top

Bottom

# Caution Wire "SP" passes this WH, Wire "RA" doesn't pass by.

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14.Remove all the connectors from PWBs.

Wire "LA" to WH

Wire "LA" (to LA)

Wire "LA" curve like this

INSULATION TAPE

Wire "LB" to WH

Chassis Tray Unit

(

with TUNER

)

Wire "LV" (to CN1)

Wire "PL" (to CN2)

Wire "LB" (to LB)

Wire "LV","LB" to WH

Wire "LV","LP","LB" to WH

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15.Remove the 2 lock screws . Detach the Tuner Unit.

16.Remove the 2 lock screws . Detach the Tray Unit.

Chassis Tray Unit

Tuner Earth Plate

To the top of Lug

Tuner Unit (with Tuner)

Tuner Unit Sub Ass'y

B to B connector

Wire "LV" (to P2305)

Left

Right Left

Right

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17.Remove the 6 lock screws , 1 lock screw and 2 lock screws . Detach the LCD Angle.

18.Remove the 2 lock screws . Detach the Full HD Panel.

LCD Angle Top-LR

LCD Angle Top-C

LCD Angle Bottom

Tray Angle

#Caution Don't Fix Screw in this step. Fix with tray chasis later.

Place hole on convex of TRAY ANG

to hexagonal pillar

Front Cover

Pull wire out to bottom side

R/C LED PWB with Wire

Set guide lib to hole

42 FULLHD PANEL

Shorter

Longer

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LC42XD10E

Service Manual

CHAPTER 3. ADJUSTMENT PROCEDURE

[1] ADJUSTMENT PROCEDURE

The adjustment values are set to their optimum at the factory before shipping .

If by any chance a value should become improper or a readjustment is required due to part replacement, make an adjustment according to the following procedure.

1. After replacement of any PWB and/or IC for repair, note the following.

When replacing the following units, be sure to prepare the new units loaded with updated software.

MAIN-UNIT: DUNTKD915FM11

NOTE: That an IC into which ROM data is written is available for MAIN-UNIT servicing (see below).

IC1901 RH-iXB936WJZZS EDID(HDMI)

IC1902 RH-iXB937WJZZS EDID(HDMI)

IC2303 RH-iXB938WJZZS EDID(PC)

2. Software Upgrade

Main software update procedure of SHARP LCDTV

1. Connect your PC and LCDTV by 232C-CROSS-CABLE.

Set up starter298

2. Decompress starter_298_ver100.zip.

3. Double click on starter.exe and running.

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4. Set the parameters of the starter software as below.

i) [Options]-[Preferences] Setup window will be opened.

1) "General","Terminal","System update": no need to modify anything.

2) "Connection": set COM port number and configuration on your PC.

3) "Download": set configuration as below.

5. [File]-[Save as] you can save above settings as file name as you want.

Setting "9600"

(a) set directory path of starter tool

(b) set absolute path of target elf file

(d) set absolute path of "Cbus_boot_ver1.00.txt" for Cbus(boot).

¨Starter_298\Configs\Cbus_boot_ver1.00.txt

Starter_298\Configs\Cbus_flash_NoUART_ ver1.00.txt

(e) set absolute path of "Cbus_flash_NoUART_

ver1.00.txt" for Cbus(flash).

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Download

6. Connect to the LCD TV and start up "starter298" software.

7. After turn on the power of set, please push the below connect button.

NOTE: If set power was turned off and on with this condition, strange

character will be appear, so if this strange character appear, please ignore.

in capital letters

Input "USEROFF" command (non-visited) and return key on your ˴˴˴˴˴˴˴˴˴˴PC. (get "OK"message)

Input "DPON" command and return key on your PC. (get "MSH>" message)

in small letters

Input "fpga 3 0x80" command and return key on your PC, and the

LCD TV is turned off automatically.

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10.Change the port settings. 11.Connect to the LCD TV by activating the connection button.

12.[Programming]-[Download] Download window will be opened.

setting "115200"

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13.Select the file which you want to upload. 14.Click "Flash" button and get executed.

click once

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15.If the Flash has burned successfully, "OK" message is shown as below.

16.Turn the AC power off , and turn AC power on.

Return to default automatically.

17.Finish!!

18.Prepare for next model

If you have once write the software to the set, the PC side communication speed will be set up to "115200".

So before you connect the PC to the next set, please change back this speed to "9600".

(Please refer 4-(i)-2)

19.Software writing time

It takes about 15 minutes to write the all software with above method.

Please keep the cable connection during the PC and Set having a communication.

3. Entering and exiting the adjustment process mode

Unplug the AC power cord of running TV set to force off the power.

While holdin

down the “VOL(-)”and”MENU”keys on the set at once, Press the "POWER"keyon the se

to turn on the power. The letter appears on the screen.

Next, hold down the “VOL

(-)

”and㵘”P

(

)

”keys on the set at once.

Multi

le lines of orange characters appearingon the screen indicate that the set is now in the adjustment Process mode. If you fail to enter the adjustment process mode (the display is the same as normal startup), retry the procedure.

4 To exit the adjustment process mode after the adjustment is done, unplug the AC power cord to force off

the power. (When the power is turned off with the remote controller, once unplug the AC power cord and plug it in again. In this case, wait 10 seconds or so before plugging.)

5 To remove "K" mode, just repeat step1 and 2. This time the letter "K" disappears from screen.

Caution: Use due care in handling the information described here lest the users should

know how to enter the adjustment process mode. If the settings are tampered with in this mode, unrecoverable system damage may result.

(Alternative)

1) Press the "MENU" key on the set, and OSD appears.

2) Move the cursor to SERVICE(OSD) using the cursor keys on the remote controller. When pressing the "MENU" key on the remote controller, the set enters the adjustment process mode.

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4. Remote controller key operation and description of display in adjustment process mode.

䋨䋱䋩keyoperation

Remote controller key Function P䋨㺢/㺣䋩 Chan

ging

a selected line setting(䋫10/䋭10

)

VOL䋨䋫/䋭䋩 Turningapage䋨PREVIOUS/NEXT䋩 Cursor䋨 / 䋩 Movin

an item䋨line䋩byone䋨UP/DOWN䋩

Cursor䋨 / 䋩 Turnin

gapag

e䋨PREVIOUS/NEXT䋩

Chan

ging

a selected item setting(䋫1/䋭1

)

Direct control on TV set (Input/Wide Mode/Bright/Contrast)

INPUT SOURCE Input source switching (toggle switching) on remote controller

(TV 㸢EXT1㸢EXT2㸢EXT3㸢EXT4㸢EXT5㸢EXT6)

RETURN Returning to a present page OK Executing a function

*Input mode is switched automatically when relevant adjustment is started so far as the necessary

input signal is available.

(3) Current page item

Descri

tion of displa

(1)Current page title

[INIT]

[

PAL+TUNERMAIN][COMP] [SCART RGB] [TUNER]

Dev Version

Center Acutime Backlight Acutime

Temp Sensor

[5]

Main unit key

P䋨㺢/㺣䋩

VOL䋨䋫/䋭䋩

(2) Parameters

37/42XD10 ver 2.31(XX/XX/XX)

Error Standby Cause [1]

XX XX XX

Dev Loader Versio

Normal Standby Cause

Main Version

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5. Adjustment process mode menu

The character string in brackets [ ] will appear as a page title in the adjustment process menu header.

Page Line

1/13 [INFO]

1 Main Version

37/42XD10 ver 2.31 2007.03.15

Main microprocessor version 2 Dev Version ver 1.151 DTV version. 3 Dev Loader Version 2.7 DTV Loader Version 4 Center Acutime xxxxH xxM Main operating hours 5 Backlight Acutime xxxxH xxM Backlight operating hours 6 Temp Sensor 080

Temp Sensor setting

7 Normal Standby Cause 1 RC_STANDBY 8 Error Standby Cause [1]

1c POWER ERROR 0000H 00M

Error standby cause Total operating time before error

[2]

1c POWER ERROR 0000H 00M

[3]

1c POWER ERROR 0000H 00M

[4]

0 0000H 00M

[5]

0 0000H 00M

2/13 [INIT]

1 FACTORY INIT

EURO/UK/ITALY/FRANCE/RUSSIA

Initialization to factory settings execution 2 INCH SETTING Inch Setting 3 PUBLIC MODE off/on HOTEL MODE㵘flag setting 4 Center Acutime Reset off/on Main operating hours Reset 5 Backlight Acutime Reset off/on Backlight operating hours Reset 6 Picture Read Pos X 670 x-axis setting of picture data 7 Picture Read Pos Y 419 y-axis setting of picture data 8 Picture Read Signal Type PAL/COMP/HDMI/RGB Signal Type Setting 9 Picture Read 0 - 1023 Start/stop of picture data

3/13 [PAL+TUNERMAIN]

1 RF-AGC BG ADJ ENTER RF-AGC BG adjustment execution 2 RF-AGC L ADJ ENTER RF-AGC L adjustment execution 3 PAL+TUNER ADJ ENTER PAL TUNER auto adjustment execution 4PAL㵘ADJ ENTER PAL auto adjustment execution 5 TUNER ADJ ENTER TUNER auto adjustment execution 6PAL㵘DAC 29 PAL DAC adjustment 7 TUNER A DAC 29 Tuner DAC adjustment 8 Tuner AGC BG 5 Tuner AGC BG adjustment 9 Tuner AGC L 8 Tuner AGC L adjustment

10 Tuner AGC int. off 6 Tuner AGC gain adjustment

4/13 [COMP ]

1 COMP ALL ADJ

ENTER

COMP15K auto adjustment execution 2 COMP CONTRAST 32 COMP contrast adjustment execution 3 COMP Cb GAIN 32 COMP Cb gain adjustment execution 4 COMP Cr GAIN 32 COMP Cr gain adjustment execution 5 COMP BRIGHT 0 COMP bright adjustment execution

5/13 [SCART RGB]

1 SCART RGB CONTRAST 40 SCART RGB contrast adjustment execution 2 SCART RGB Cb GAIN 40 SCART RGB Cb gain adjustment execution 3 SCART RGB Cr GAIN 40 SCART RGB Cr gain adjustment execution 4 SCART RGB BRIGHT 0 SCART RGB bright adjustment execution

6/13 [TUNER]

1 TUNER TEST

7/13 [M GAMMA INFO]

1 M GAMMA POS 1

W/B adjustment, gradation 1 input setting 2 M GAMMA POS 2

W/B adjustment, gradation 2 input setting 3 M GAMMA POS 3

W/B adjustment, gradation 3 input setting 4 M GAMMA POS 4

W/B adjustment, gradation 4 input setting 5 M GAMMA POS 5

W/B adjustment, gradation 5 input setting 6 M GAMMA POS 6

W/B adjustment, gradation 6 input setting 7 M GAMMA WRITE off/on EEP writing of adjustment values 8 M GAMMA RESET off/on Initialization of adjustment values

Item

Remarks (adjustment detail,etc.)

Description

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8/13 [M GAMMA 1-3]

1 M GAMMA R 1 107 W/B adjustment, gradation 1R adjustment value 2 M GAMMA G 1 107 W/B adjustment, gradation 1G adjustment value 3 M GAMMA B 1 107 W/B adjustment, gradation 1B adjustment value 4 275 W/B adjustment, gradation 2R adjustment value 5 275 W/B adjustment, gradation 2G adjustment value 6 275 W/B adjustment, gradation 2B adjustment value 7 446 W/B adjustment, gradation 3R adjustment value 8 446 W/B adjustment, gradation 3G adjustment value 9 446 W/B adjustment, gradation 3B adjustment value

10 off/on EEP writing of adjustment values

9/13 [M GAMMA 4-6]

1 M GAMMA R 4 660 W/B adjustment, gradation 4R adjustment value 2 M GAMMA G 4 660 W/B adjustment, gradation 4G adjustmnet value 3 M GAMMA B 4 660 W/B adjustment, gradation 4B adjustment value 4 835 W/B adjustment, gradation 5R adjustment value 5 835 W/B adjustment, gradation 5G adjustmnet value 6 835 W/B adjustment, gradation 5B adjustment value 7 960 W/B adjustment, gradation 6R adjustment value 8 960 W/B adjustment, gradation 6G adjustment value 9 960 W/B adjustment, gradation 6B adjustment value

10 off/on EEP writing of adjustment values

10/13 [ETC]

1 EEP CLEAR off/on Clear of process㵘adjustment EEP value 2 EEP CLEAR B off/on Clear of process adjustment value㵘of B_mode. 3 STANDBYCAUSE RESET off/on Reset of STANDBY CAUSE 4 0/1 1䋺*** 0䋺*** 5 OPTION 0 6 AUTO/EURO/UK Destination setting 7 0 LAMP ERR RESET Initialization of L_ERR 8 0/1 LAMP ERR Inhibit L_ERR detection. 9 DTV CLR off/on Clear of DTV unit.

10 off/on STOP of I2C DATA execution

11/13 [LCD]

1 OSC FREQ50 1279 INVERTER drive frequency setting 2 OSC FREQ60 1279 INVERTER drive frequency setting 3 PWM FREQ50 218 Frequency setting for INVERTER dimmer 4 PWM FREQ60 218 Frequency setting for INVERTER dimmer 5 VCOM ADJ 64 COMMON VIAS adjustment setting 6 QS off/on on/off of Quick Shoot Function

12/13 [LCD TESTPATTERN]

1 PATTERN 0 Display LCD test pattern.

13/13 Service B

1 [HDTV] 0-10 Contrast,Bright and Color Adjustment of HDTV 2 [SERVICE B2] off/on on/off of Auto Sw Adjustment 3 [BASE GAMMA 1] 0-1023 Base Gamma Adjustment 1 4 [BASE GAMMA 2] 0-1023 Base Gamma Adjustment 2 5 [BASE GAMMA 3] 0-1023 Base Gamma Adjustment 3 6 [BASE GAMMA 4] 0-1023 Base Gamma Adjustment 4 7 [BASE GAMMA 5] 0-1023 Base Gamma Adjustment 5 8 [BASE GAMMA 6] 0-1023 Base Gamma Adjustment 6 9 [QUICK SHOOT] 0-255 QS Sreshuhorld Level Adjustment

MGAMMAR5 MGAMMAG5 MGAMMAB5 MGAMMAR6 MGAMMAG6 MGAMMAB6 M GAMMA WRITE

AUTO INSTALLATION SW

COUNTRY L ERR RESET L ERR STOP

I2C-OFF

MGAMMAG3 MGAMMAB3 M GAMMA WRITE

MGAMMAR2 MGAMMAG2 MGAMMAB2 MGAMMAR3

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6. Special features

* ERROR STANDBY CAUSE (Page 1/13)

The total time when the unit enters the standby due to operational error and cause of error are recorded on EEPROM as much as possible.

The values can be used to locate the fault for repair.

* EEP CLEAR (Page10/13)

Clear of process adjustment EEP value.

7. Video signal adjustment procedure * The adjustment process mode menu is listed in Section 5.

1. Signal check

Signal generator level adjustment check (Adjustment to the specified level)

• Composite signal PAL : 0.7Vp-p ± 0.02Vp-p (Pedestal to white level)

• 15K component signal : Y level 0.7Vp-p ± 0.02Vp-p (Pedestal to white level)

(50 Hz) PB, PR level 0.7Vp-p ± 0.02Vp-p

2. Entering the adjustment process mode

Enter the adjustment process mode according to Section 3.

3. RF AGC adjustment 1

1 Setting [Signal]

䊶

Feed the PAL S

rit Field colour bar signal(E-12ch)to TUNER.

PAL

㵘 Si

nal level: 65 dB V㵘±1dB 㵘㵘

Sprit Field Colour Bar RF signal UV [E-12CH]

[Terminal] TUNER

㸡100% white

Auto adjustment Adjustment process Bring the cursor on [ RF AGC BG ADJ] and press [OK] performance

Page 3

[ RF AGC BG ADJ 㵘OK] appears when finished.

Adjustment Conditions Adjustment㵘procedure

Adjustment poin

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4. Tuner adjustment

1 Setting [Signal]

PAL PAL sprit colour bar

䊶Feed the PAL sprit colour bar (E-12ch) to TUNER.

RF signal

䊶Make sure㵘the PAL colour bar pattern (E-12) has㩷the sync level of

㵘7:3 with the picture level.

[Terminal] TUNER

㸡100% white

Auto adjustment Adjustment process Bring the cursor on [ TUNER ADJ] and press [OK]. performance Page3. [ TUNER ADJ OK] appears when finished.

Adjustment point Adjustment conditions

䈀E-12CH䈁

Adjustment procedure

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8. White Balance Adjustment

Adjustment gradation values (IN) appear on page 7/13 of process adjustment, and adjustment initial values(offset value) appear on pages 8/13 and 9/

13.

For white balance adjustment, adjust the offset values on pages 8/13 and 9/13.

[Condition of the unit for inspection]

Modulated light: MAX (+8)

[Adjustment reference device]

Minolta CA-210

[Adjustment]

Check that the values on page 7/13 of process adjustment are set as below. If not, change them accordingly.

1. Display the current adjustment status at point 6. (Page 8/13 of process adjustment)

The display for checking the adjustment status is toggled by pressing the “6” button on the remote control.

(Normal OSD display → “6” → display for check (OSD disappears) → “6” →normal OSD display → . . . )

2. Read the value of the luminance meter. x=0.272 , y =0.277

3. Change MGAMMA R6/MGAMMA B6 (Adjustment offset value) on page 9/13 of process adjustment so that the values of the luminance meter approach x=0.272 and y =0.277.

(Basically, G is not changed. If adjustment fails with R and B, change G. When G is lowered, the weaker of R and B must be fixed.)

4. Display the adjustment status of the current point 5. (Each time the “5” button on the remote control is pressed, the adjustment status check display is toggled.)

(Normal OSD display → “5” → Check display (OSD disappears) → “5” →Normal OSD display → . . . )

Change M GAMMA R5/M GAMMA B5 (adjustment offset value) on page 9/13 of process adjustment so that the values of the luminance meter approach x = 0.272 and y = 0.277.

5. Repeat step 4) for points 4, 3, 2, and 1.

[Adjustment reference standard value]

Adjustment spec ± 0.004 Inspection spec ± 0.006 (point 1)

Adjustment spec ± 0.002 Inspection spec ± 0.004 (Excluding the above-mentioned)

MGAMMA POS 1 4 MGAMMA POS 2 9 MGAMMA POS 3 14 MGAMMA POS 4 19 MGAMMA POS 5 24 MGAMMA POS 6 29

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9. Initialization to factory settings

Caution: When the factory settings have been made, all user setting data, including the channel settings, are

initialized. (The adjustments done in the adjustment process mode are not initialized.) Keep this in mind when initializing these settings.

1 Factory settings [Factory setting with adjustment process mode]

䊶 Enter the ad

ustmentprocess mode.

(See to below caution) 䊶 Move the cursor to

[

FactoryInit]onpage 2/13.

䊶 Use the R/C 㵘㵘ke

to select a region from

[

EURO/UK/ITALY/FRANCE/RUSSIA]andpress the[OK]㵘key.

䊶 “EXECUTING” dis

playapp

ears .

䊶 After a while, "OK" display appears, the setting is

completed.

[

Factorysettingwith R/C ke

䊶 Enter the adjustmentprocess mode. 䊶 Push a remote controller code of each destination.

(

See below

)

䊶 It automaticallybecomes in theprocess adjustment menu(INIT

)

and change FACTORY INIT becomes "EXECUTING" display.

䊶 After a while, "OK" dis

playapp

ears, the settingis completed.

destination R/C code 42XD10K 䊶䊶䊶䊶䊶A8(Hex) 42XD10I 䊶䊶䊶䊶䊶E8(Hex) 42XD10F 䊶䊶䊶䊶䊶E9(Hex) 42XD10R 䊶䊶䊶䊶䊶EB(Hex) 42XD10E 䊶䊶䊶䊶䊶FE(Hex)

The following items are initialized in the factory setting.

1. User settings

2. Channel data (e.g. broadcast frequencies)

3. Maker option setting

4. Password data

After adjustments, exit the adjustment process mode. To exit the adjustment process mode, turn off the MAIN power key. When the power is turned off with the remoto control, unpulug the AC power cord and plug it back in.

ends by turning off the MAIN POWER key.

Adjustment item Adjustment conditions Adjustment procedure

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10. Public Mode

1. How to enter Public mode Enter the ad

ustmentprocess mode, referringto "3.Enteringand exitingthe adjustmentprocess mode".

In the

[

INIT],page2/13 of service, turns on the PUBLIC MODE option.

Turn off TV b

ressing"Power button" of TV unit.

Press "Power button" of TV unit and then

ress "V-" of RC and "V-" of TV at the same time duringthe switch-on action

(

before the screen is displayed

)

Note: Lan

guag

e: English onl

Options "Monitor", "Basic", Hotel", "Full" Default "Full"

Chart of available

arameters in each mode

Monitor Basic Hotel Full Power on fixed x - - Maximum volume

xxx

Volume fixed

---

Fixed volume level

---

ut mode start

xxx

ut fixed

---

Start-u

reset

xxx

Reset

xxx

ossible to select each item of function bypress cursor UP/DOWN keys on remote control.

The settin

osition of each item of function is made bypress cursor RIGHT/LEFT keys on remote control.

Press OK ke

on remote control for confirmation afteryou set all functions.

Valid/Invalid function table

(

R/C)KEY_CODE MONITOR BASIC HOTEL MONITOR BASIC HOTEL

Power

xx xx

TELETEXT - -

1-9,0 - -

FLASH_BAC

Input select 2

x2x

DTV x

x2x

EPG,ESG - - - - - -

RADIO - -

SOUND(MPX

)

xxx

mute - -

V+,V- 3

x3x

P+,P- 2

x2x

AV mode - -

---

Standard setting called

Surround

------

LIST -

i+ - -

DTV menu - - - - - -

Menu ------

(

Station/Program List

)

truD ------

SLEEP - -

Wide mode - -

OPC ------

(

TV unit)KEY_CODE MONITOR BASIC HOTEL MONITOR BASIC HOTEL

2 2

To select input only

P+,P- 2

xxx

V+,V-

MAIN SW

㫏

㶎䋱:The keyis avallable in a case that "Power on fixed" is set to "no". 㶎䋲:The ke

is avallable in a case that "Input fixed" is set to "no".

㶎䋳:The key is avallable in a case that "Volume fixed" is set to "no". 㶎䋴:The key is not avallable. Thereforejust displaying caution message.

Added new item Same operation. (repair the discription only). Change from ver2.21

In ATV mode In DTV mode

In input mode start if you select DTV, start-up preset (CH) can not be available.

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3. Parameter settin

(1)

POWER ON FIXED

tions "yes", "no"

Default "no"

(2)

MAXIMUM VOLUME

tions 0 --- 63

Default 63

(3)

VOLUME FIXED

tions "yes", "no"

Default "no"

(4)

VOLUME FIXED LEVEL

tions 0 --- Maximum volume

Default 20

(5)

INPUT MODE START

tions "normal", "TV","DTV", "EXT1", "EXT2", "EXT3", "EXT4", "EXT5", "EXT6"

Default "normal"

(6)

INPUT MODE FIXED

tions "yes", "no"

Default "no"

(7)

START-UP PRESET

tions 0 --- maximumpreset channel

Default 1

(8)

RESET

tions "execute", "no"

Default "no"

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LC42XD10E

Service Manual

CHAPTER 4. TROUBLESHOOTING TABLE

[1] TROBLESHOOTING TABLE

The unit is not powered on even if the power is turned on.

Are the power cable and harness in the unit properly connected? NO Reconnect the power cable and harness properly, and turn

on the power.

YES

Is F701 normal? NO Is the fuse still blown when turning on the power after replac-

ing F701?

YES

YES Is approx. 5V applied to the BU5V output [between pins 20 (+) and 22 (-) of PA]?

Is a voltage of 8V or more generated at C790?

YES

NO NO YES

Replace R790, D742, IC702, R780, and R781.

Replace Q705, D715, IC701, R726, and R721.

Are approx. 13V, approx. 24V and approx. 35V generated at the UR13V, S29V and UR35V outputs respectively?

NO Check D708, Q727, Q726, R830, R829, D762, D763, Q741,

R824, R825, IC704, R826, R827, and R828.

YES

Is a click heard when the replay is turned on? NO Check Q706, Q741, D707, R729, and R776.

YES

Is approx. 12V generated at UR12V [between pins 1 (+) and 3 (-) of PL]?

NO Check Q731, Q742, Q732, D767, D766, R843, R844 and

C799.

YES

Is a voltage of approx. 380V generated at C726? NO Check Q705, D715, IC701, R726, and R721.

YES Is approx. 60V generated at the INV60V output [between pins 1 (+) and 3 (-) of LA]?

NO Check Z1, Q707, Q708, Q716 and L706.

YES Is approx. 10V generated at the INV10V output [between pins 5 (+) and 3 (-) of LA]?

NO Check IC705, R832, R833, R834, and C813.

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No sound (1) (during the reception of TV broadcasting)

No audio output during UHF/VHF reception

Checklist:

1) Is the volume set to MIN or MUTE on the remote control ? ... Set the desired volume.

2) Are headphones connected to HEADPHONE (J1301 ) ? ... Disconnect them.

3) Is ANT-CABLE disconnected or connected improperly ? ... Connect it correctly as per the operation manual.

Is the audio signal (L/R) sent from pins (28) and (27) of IC3701 (MSP)?

Is the SIF signal (ANA_IN1+) sent to pin (67) of IC3701(MSP)?

YES Check whether +5V and

+8V are supplied to pins (12) and (39) of IC3701 respectively. Or,check peripheral circuits.

(AV-UNIT) YES NO Is the audio signal of pins (3) and (5) of IC303 (OPAMP) sent properly?

NO Check SC2704

and P1201 or peripheral circuits. Is the S-MUTE signal “L” ?

Is the audio signal (SIF) sent from pin (1) of CONNECTOR (SC2705)?

YES Check pin (67) of IC3701

(MSP) and peripheral circuits.

YES (TUNER) NO

Is the audio signal of pin (4) of IC301/IC302 (AUDIO-AMP) sent properly?

NO Check HEAD-

PHONE (J1301) or peripheral circuits.

Is the audio signal (SIF) sent from Q210 (Buffer)?

YES Check CONNEC-

TOR(P201) and peripheral circuits.

YES NO Is the audio signal output of pins (2) and (4) of P301 (AUDIO-CONNECTOR) normal ?

NO Check P301

(AUDIO- CONNECTOR) and peripheral circuits.

Is the SIF signal sent to Q203 (AMP)?

YES Confirm whether +8V is

supplied to Q203. Or, please check the peripheral circuit.

YES NO Check SP-BOX (right and left) and wire harness.

Is the SIF signal sent from pin (13) of TUNER (TU201)?

YES Check soldering the ter-

minal and peripheral circuits.

Check whether 5V (ANT )

and 5V are supplied to pins (4) and (10) of TUNER (TU201) respectively. Check SDA/SCL and AGC signal.

YES Replace TUNER

(TU201).

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No sound from external input devices (2) -1

No sound from an external input device connected to EXT1 (SCART1).

No sound from an external input device connected to EXT2 (SCART2).

No sound from an external input device connected to EXT3.

<EXT1> Is IN1-L audio signal sent from pin (6) of SCART1 terminal (J1101) to pin (53) of IC3701 (MSP)? Is IN1-R audio signal sent from pin (2) of SCART1 terminal (J1101) to pin (54) of IC3701 (MSP)?

YES

<EXT2> Is IN2-L audio signal sent from pin (27) of SCART2 terminal (J1101) to pin (56) of IC3701 (MSP)? Is IN2-R audio signal sent from pin (23) of SCART2 terminal (J1101) to pin (57) of IC3701 (MSP)?

YES

<EXT3> Is IN3-L audio signal sent from pin (3) of J1201 terminal to pin (47) of IC3701? Is IN3-R audio signal sent from pin (5) of J1201 terminal to pin (48) of IC3701?

NO NO NO

Check pins (6) and (2) of SCART1 and connection to an external input device.

Check pins (27) and (23) of SCART2 and connection to an external input device.

Check pins 3 and 5 of EXT3 (J1201) and connection to an external input device.

Is the audio signal properly sent from pins (28) and (27) of IC3701 ?

NO YES

Check IC3701 or peripheral circuits. Is the audio signal of pins (1)

and (7) of IC303 (OP-AMP) sent properly?

NO Check IC303 or peripheral circuits.

YES

Is the audio output signal of

pins (13) and (16) of IC302/ IC301(MAIN-AMP) normal?

NO Check IC302/IC301 (MAIN-AMP),

HEADPHONE and peripheral circuits.

YES

Check CONNECTOR(P301)

and SP-BOX(right and left).

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No sound from external input devices (2) -2

No sound from EXT4 (AUDIO) connecting an external input device.

No sound from EXT5 (AUDIO) connecting an external input device.

<EXT4> Is D-SUB-L audio signal sent from J2702 to pin (15) of IC2704? Is D-SUB-R audio signal sent from J2702 to pin (2) of IC2704?

<EXT5> Is HDMI-L audio signal sent from J2701 to pin (14) of IC2704? Is HDMI-R audio signal sent from J2701 to pin (5) of IC2704?

YES YES Is D-SUB-L audio signal sent to pin (50) of IC3701? Is D-SUB-R audio signal sent to

pin (51) of IC3701?

Is HDMI-L audio signal sent to pin (50) of IC3701? Is HDMI-R audio signal sent to pin (51) of IC3701?

NO Check output of pins (13) and (3) of

IC2704 and peripheral circuits.

YES YES

Is the audio signal properly sent from pins (28) and (27) of IC3701 ? NO Check IC3701 or peripheral circuits.

YES

Is the audio signal of pins (1)

and (7) of IC303 (OP-AMP) sent properly?

NO Check IC303 or peripheral circuits.

YES

Is the audio output signal of

pins (13) and (16) of IC302/ IC301(MAIN-AMP) normal?

NO Check IC302/IC301 (MAIN-AMP),

HEADPHONE and peripheral circuits.

YES

Check CONNECTOR(P301)

and SP-BOX(right and left).

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No sound except from speakers (3) -1

No audio output from the headphones.

No audio output from EXT1 (SCART) terminal.

Is there audio output on pins (2) and (3) of the headphone terminal (J1301)?

Checklist:

1) Is the MUTE button on the remote control set to ON? ... Set to OFF.

2) Check the connection to external devices....Is there any improper connection?

3) Is S-MUTE-LINE [IC1710 (pin92)] at H?

Is audio input/output signal of pins (3) and (5)/(1) and (7) of IC303 (OP-AMP) normal?

Is audio signal sent to pins (3) and (1) of EXT1 (J1101)?

NO ls S-MUTE-LINE

[IC1710 (pin 92)] at H? (Check Q1106/Q1105 operation.)

NO YES NO Is audio output signal (SPKOUT L/R) properly sent from pins (28) and (27) of IC3701

(MSP)?

Check the connection to EXT1 (J1101) and external devices.

Is audio signal sent from pins (33) and (34) of IC3701?

NO Check the power supply

8/5 V pins (39) and (12) of IC3701 and peripheral circuits.

NO YES Check audio input signal of pin (67) of IC3701(MSP), pins

(39) and (12) of the power line5 and 8V, pins (3) and (2) of I2C-LINE, and peripheral circuits.

Check the audio signal output line from pins (33) and (34) of IC3701 to pins (3) and (1) of EXT1.

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No sound except from speakers (3) -2

No audio output from EXT2 (SCART) terminal.

No audio output from AUDIO OUTPUT terminal.

Checklist:

1) Is the MUTE button on the remote control set to ON? ... Set to OFF.

2) Check the connection to external devices....Is there any improper connection?

3) Is S-MUTE-LINE [IC1710 (pin92)] at H?

Is audio signal sent to pins (24) and (22) of EXT2 (J1101)?

NO ls S-MUTE-LINE [IC1710

(pin 92)] or S2-MUTELINE [IC1710(pin 90)] at H? (Check Q1102/Q1101 operation.)

ls S-MUTE-LINE [IC1710 (pin 92)] at H? (Check 1204/Q1203 operation.)

Is audio signal sent to pins (13) and (15) [L/ R (white) (red)] of AUDIO OUTPUT terminal (J1201)?

YES NO NO YES

Check the connection to EXT2 (J1101) and external devices.

Is audio signal sent from pins (36) and (37) of IC3701?

Check the connection to AUDIO OUTPUT terminal (J1201) and external devices.

NO YES Check the power supply 8/ 5 V pins (39) and (12) of IC3701 and peripheral cir-

cuits.

Check the audio signal output line from pins (36) and (37) of IC3701 to Q1103/ Q1104/Q1201/Q1202.

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DTV troubleshooting 1

The unit does not enter the DTV mode. Or, the DTV menu does not appear.

YES Go to "The unit does not

enter the DTV mode. Or, the DTV menu does not appear."

The unit does not enter the DTV mode. Or, the DTV menu does not appear.

No video output during DTV reception.

YES Go to "No video output

during DTV reception."

Digital UNIT: Is a voltage supplied from IC4701(3.3V-REG)/ IC4704(1.8V-REG)?

NO Check peripheral cir-

cuits of IC4701/IC4704 and pin(7) of IC4701.

NO YES No audio output during DTV reception.

YES Go to "No audio output

during DTV reception."

Do X4001/X4002 oscillate? NO Check peripheral cir-

cuits of X4001/X4002.

YES D-TUNER UNIT: Is a voltage of 1.8/3.3V sup-

plied from IC205(REG) and IC206(REG)?

NO Check peripheral cir-

cuits of IC205/IC206.

YES

Is a voltage applied to

pin(20) (I2CSEL) of P202? (High=3.3V)

NO MAIN UNIT:

Check around the pin (85) of IC1710(FPGA).

YES

Is FESDA/FESCL signal sent

to pins (21) and (22) of P202 and pins (21) and (20) of IC202 (COFDM).

NO Check peripheral cir-

cuits of IC202(COFDM)/ IC4001(D-Processor).

YES

Does X-TAL X202 of IC202

oscillate?

NO Check peripheral cir-

cuits of X202.

YES

Check IC202(COFDM)/

IC4001(D-Processor).

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DTV troubleshooting 2

No video output during DTV reception. Colors of Images are not right.

No audio output during DTV reception. Sound is low.

D-TUNER UNIT: Is data FED[0:7] sent from pins (3),(4),(5),(6),(8),(9), (10) and (11) of P202?

NO Check R272 and R273. DIGITAL UNIT:

Is audio signal fed to pins (5) and (10) of IC4604 (OP-AMP)?

NO Check R4002(AD2pin)

and IC4001(D-Processor).

YES YES DIGITAL UNIT: Are video signals (R/G/ B,CVBS) sent from

C4639/C4640/C4641/ C4625?

NO Check

R4011(AC8pin),R4013(A C9pin) and IC4001(D-Processor).

Is audio signal sent from pins (7) and (8) of IC4604(OP-AMP)?

NO Check power supply of

IC4604(OP-AMP) and its peripheral circuits.

YES YES Are video signals (R/G/

B,CVBS) send from the C4636/C4637/C4638 and emitters of Q4607?

NO Check Q4601-

Q4605,Q4607 and their peripheral circuits.

MAIN UNIT: Is audio signal sent to pin (3) and (13) of IC2704 (SW)?

NO Check power supply and

control signal of pins (9) and (10) of IC2704(SW) and audio signal input of pins (4) and (11) of IC2704.

YES YES MAIN UNIT:

Are video signals (R/G/ B,CVBS) fed from pins (AA18),(AB18),(Y18) and (AA21) of IC3002?

Perform the same check as the tuner (U/ V) reception.

YES Are scrambled images not displyed?

YES DIGITAL UNIT:

Check 5V output of pin (1) of IC4702. Check 5V of pin (6) of Q4401.

Perform the same check as the tuner (U/V) reception.

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<0n input of the tuner (U/V)> No picture on the display (1)

No picture appears on LCD during the tuner (U/V) reception.

Checklist:

1) Is "INPUT SOURCE" button on the remote control set up correctly ? ... See the operation manual and set "INPUT SOURCE" to "TV".

2) Is MENU-Picture-Contrast/Brightness set to "MIN" ? ... Set it to an appropriate level.

3) Is ANT-CABLE disconnected or connected improperly? ...Connect it correctly as per the operation manual.

YES Is level of pins (9) and (8) of tuner (TU201) and pins (12) and (2) of

IC204 (MULTI) at H?

NO These are communica-

tions lines for control (I2C). Follow the path and check whether they are forced to L(PULL_DOWN).

YES Is the video signal (IF) sent from pin (11) of tuner (TU201 )?

NO Check the tuner (TU201)

and peripheral circuits.

YES Is the video signal

CVBS sent to pin (AC23) of lC3002 (VPRO.)?

NO Check CONNECTOR

(P201 /SC2705) and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) (AB3)/(AC3) of IC3002 (V-PRO.), and is CLK signal (CK1±) sent to pins (AB5)/(AC5)?

Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) (V2)/(V1) of IC3002 (V-PRO.), and is CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of BU3.3V line of IC3002 (V-PRO.),

pins (G10)/(N17) of BU2.5V line,pins (U16)/(G12) of BU1.8V line and peripheral circuits.

YES Is LVDS video signal (TA± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCD-CONT-UNIT, and is CLK signal (CK1±) sent to pins (10)/(9)?

Is LVDS video signal (TA2± - TD2±) sent to pins (17)/(16) -(26)/(25) of CONNECTOR CN1 of LCD-CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR (SC2302, CN1) and HARNESS WIRE

(LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT?

NO Check CONNECTOR (CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<Durlng external connectlon> No picture on the monitor (2) -1

SCART1: No picture appears on EXT1 -connected monitor during the tuner (U/V) reception.

SCART2: No picture from EXT1 appears on EXT2-connected montor. Note: Normally, if the screen during display is sent to EXT2, no picture is sent to EXT2.

Checklist:

1) Are input terminal on back of TV and "INPUT SOURCE"button on the remote control set up correctly ? ... See the operation manual and set "INPUT SOURCE "appropriately.

2) Is the Signal Type (item) in MENU-Connection-Input-Select set to the same as that of the external device ? ... Set it to "CVBS", "Y/C" or "RGB".

3) Is ANT-CABLE disconnected or connected improperly? ... Connect it correctly as per the operation manual.

4) The picture is sent to the monitor in a CVBS signal if the source during display is TV , CVBS or Y/C of EXT1-3. When sent by component, etc., that signal is not sent to the monitor.

5) When the monitor picture is not sent and is not displayed on the monitor, refer to “No picture” for each terminal.

6) The video output from EXT1 is not the monitor output (output of the picture now watching). The picture of the last selected TV channel is always sent to EXT1. (Specification).

Is video signal sent to pin (19) of SCART1 (J1101)?

YES Check SCART1 , external

connection or input setting.

Is video signal sent to pin (40) of SCART2 (J1101)?

YES Check SCART2, external

connection or input setting.

NO NO

Is video signal (VOUT1) sent from pin (2) of IC1102 (SW)?

YES Check SCART1 (J1101) and

peripheral circuits.

Is video signal (VOUT2) sent from pin (2) of IC1101 (SW)?

YES Check SCART2 (J1101)

and peripheral circuits.

NO NO Is video signal (VOUT1) sent from pin

(Y23) of IC3002 (VPRO.)?

YES Check IC1102(SW),Connector

(P1101,SC2702) and peripheral circuits.

Is video signal (VOUT2) sent from pin (Y20) of IC3002 (VPRO.)?

YES Check IC1101(SW), Con-

nector (P1102,SC2703) and peripheral circuits.

NO NO Is video signal (CVBS)

sent to pin (AC23) of lC3002 (V-PRO.)?

YES Check power supply of IC3002

(V-PRO.) and peripheral circuits.

Is video signal (VIN1) from EXT1 sent to pin (AB22) of IC3002 (VPRO.)?

YES Check power supply of

IC3002 (V-PRO.) and peripheral circuits.

NO NO Is video signal (IF) sent from pin (11) of tuner (TU201 )?

YES Check CONNEC-

TOR(P201,SC2705) and peripheral circuits.

Check whether video signal is sent to pin (20) of SCART1.

YES Check SCART1 , CON-

NECTOR (SC2702, P1101) and peripheral circuits.

NO NO Check 5/33 V power supply pins (10) and (7), I2C line pins (9) and (8) of tuner (TU201) and peripheral circuits.

Check SCART1 , external connection or input setting.

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<Durlng external connectlon> No picture on the monitor (2) -2

SCART2: No picture from EXT3 appears on EXT2- connected monitor.

Checklist:

1) Are input terminal on back of TV and "INPUT SOURCE"button on the remote control set up correctly ? ... See the operation manual and set "INPUT SOURCE "appropriately.

2) Is the Signal Type (item) in MENU-Connection-Input-Select set to the same as that of the external device ? ... Set it to "CVBS", "Y/C" or "RGB".

3) Is ANT-CABLE disconnected or connected improperly? ... Connect it correctly as per the operation manual.

4) The picture is sent to the monitor in a CVBS signal if the source during display is TV , CVBS or Y/C of EXT1-3. When sent by component, etc., that signal is not sent to the monitor.

5) When the monitor picture is not sent and is not displayed on the monitor, refer to “No picture” for each terminal.

6) The video output from EXT1 is not the monitor output (output of the picture now watching). The picture of the last selected TV channel is always sent to EXT1. (Specification).

Is video signal sent to pin (40) of SCART2 (J1101)?

YES Check SCART2, external con-

nection or input setting.

NO Is video signal (V- OUT2) sent from pin (2) of IC1101 (SW)?

YES Check SCART2 (J1101) and

peripheral circuits.

NO Is video signal (V- OUT2) sent from pin (Y20) of IC3002

(V-PRO.) ?

YES Check IC1101(SW), Connector

(P1102,SC2703) and peripheral circuits.

NO Is video signal (IN3Y) from EXT3 sent to pin (AB20) of IC3002 (V-

PRO.)?

YES Check power supply of IC3002

(V-PRO.) and peripheral circuits.

NO Is video signal (IN3YV) sent to pin (2) of IC1201 (SW)?

YES Check pin (AB20) of IC3002 (V-

PRO.), CONNECTOR (SC2703, P1102) and peripheral circuits.

NO Is video signal (CVBS) sent from pin(1) of A/V-TERMINAL

(J1201=EXT3)?

YES Check pin (1) (IN3SW) of

IC1201(SW), power supply and peripheral circuits.

NO Check A/V-TERMINAL (J1201 ), external connection or input setting.

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<When EXT1 is used for external input> No picture on the display (3)-1

No EXT1 -Composite output of the external input system. No EXT1-RGB output of the external input system.

Checklist:

1) Is "INPUT SOURCE" button on the remote control set up correctly? ...See the operation manual and set "INPUT SOURCE" to "EXIT".

2) Is MENU-Picture-Backlight/Contrast/Brightness set to "MIN"? ...Set it to an appropriate level.

3) Check the connection to the external device ...Connect it correctly as per the operation manual for the device.

Is composite video signal sent to pin (20) of SCART1 (J1101)?

NO Check external connec-

tion, input setting, SCART1 and peripheral circuits.

IIs RGB signal sent to pins (15),(11) and (7) of SCART1 (J1101) ?

NO Check external connec-

tion, input setting, SCART1 (J1101) and peripheral circuits.

YES YES Is composite video signal (VIN1(V)) sent to input terminal pin (AB22) of

IC3002 (V-PRO.) ?

NO Check CONNECTOR

(SC2702/ P1101),SCART1(J1101) and peripheral circuits.

Is RGB signal (RED1/ GREEN1/BLUE1) sent to input terminal pins (Y19)(AB19) and (AC18) of IC3002 (V-PRO.) ?

NO Check CONNECTOR

(SC2702/P1101),SCART1 (J1101) and peripheral circuits.

YES YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and

is CLK signal (CK1) sent to pins (AB5)/(AC5)? Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) - (V2)/(V1) of IC3002 (V-PRO.), and is CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of

BU3.3V line of IC3002 (VPRO.), pins (G10)/(N17) of BU2.5V line,pins (U16)/ (G12) of BU1.8V line and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCDCONT-UNIT, and is CLK signal (CK1±) sent to pins (10)/(9)?

Is LVDS video signal (TA2± - TD2±) sent to pins (17)/(16) -(26)/(25) of CONNECTOR CN1 of LCD- CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<When EXT1 is used for external input> No picture on the display (3)-2

No EXT1-Y/C output of the external input system.

Checklist:

1) Is "INPUT SOURCE" button on the remote control set up correctly? ...See the operation manual and set "INPUT SOURCE" to "EXIT".

2) Is MENU-Picture-Backlight/Contrast/Brightness set to "MIN"? ...Set it to an appropriate level.

3) Check the connection to the external device ...Connect it correctly as per the operation manual for the device.

Is Y/C signal sent to pins (20) and (15) of SCART1 (J1101) ?

NO Check external connec-

tion, input setting, SCART1 (J1101) and peripheral circuits.

YES Is Y/C signal (Y1/C1) sent to input terminal pins (AB22) and (Y19) of

IC3002 (V-PRO.) ?

NO Check CONNECTOR

(SC2702/P1101 ), SCART1 (J1101) and peripheral circuits..

YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and is CLK signal (CK1) sent to pins (AB5)/(AC5)? Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) - (V2)/(V1) of IC3002 (V-PRO.), and is

CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of

BU3.3V line of IC3002 (VPRO.), pins (G10)/(N17) of BU2.5V line,pins (U16)/ (G12) of BU1.8V line and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCDCONT-UNIT, and is CLK signal (CK1±) sent to pins (10)/(9)? Is LVDS video signal (TA2± - TD2±) sent to pins (17)/(16) -(26)/(25) of CONNECTOR CN1 of LCD-

CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<When EXT2 is used for external input> No picture on the display (4)

No EXT2-Composite output of the external input system. No EXT2-Y/C output of the external input system.

Checklist:

1) Is "INPUT SOURCE" button on the remote control set up correctly ? ... See the operation manual and set "INPUT SOURCE" to "EXT2".

2) Is MENU-Picture-Backlight/Contrast/Brightness set to "MIN"? ...Set it to an appropriate level.

3) Check the connection to the external device ... Connect it correctly as per the operation manual for the device.

Is composite video signal sent to pin (41) of SCART2 (J1101) ?

NO Check external connec-

tion, input setting, SCART2 (J1101) and peripheral circuits.

Is Y/C signal sent to pins (41) and (36) of SCART2 (J1101) ?

NO Check external connec-

tion, input setting, SCART2 (J1101) and peripheral circuits.

YES YES Is composite video signal (VIN2(V)) sent to input terminal pin (AB2) of

IC3002 (V-PRO.) ?

NO Check CONNECTOR

(SC2703/P1102) ,SCART2 (J1101) and peripheral circuits.

Is Y/C signal (VIN2 =Y2/ C2) sent to input terminal pins (AB2) and (AC21) of IC3002 (V-PRO) ?

NO Check CONNECTOR

(SC2703/P1102), SCART2 (J1101) and peripheral circuits.

YES YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and is CLK signal (CK1±) sent to pins (AB5)/(AC5)? Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) - (V2)/(V1) of IC3002 (V-PRO.), and is

CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of

BU3.3V line of IC3002 (VPRO.), pins (G10)/(N17) of BU2.5V line,pins (U16)/ (G12) of BU1.8V line and peripheral circuits.

CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<When EXT3 is used for external input> No picture on the display (5)

No EXT3 output of the external input system. No EXT3-Y/C output of the external input system.

Checklist;

1) Is"INPUT SOURCE" button on the remote control set up correctly? ... See the operation manual and set "INPUT SOURCE" to "EXT3".

2) Is MENU-Picture-Backlight/Contrast/Brightness set to "MIN" ? ... Set it to an appropriate level.

3) Check the connection to the external device ... Connect it correctly as per the operation manual for the device.

Is composite video signal sent to pin (1) of A/V-INTERMINAL (J1201) ?

NO Check external connec-

tion, input setting, A/VIN-TERMINAL (J1201) and peripheral circuits.

Is Y/C signal sent to pins (11) and (7) of S-TERMINAL (J1201) ?

NO Check external connection,

input setting, S-TERMINAL (J1201) and peripheral circuits

YES YES Is composite video signal (IN3- CVBS) sent to input terminal pin

(4) of IC1201 (SW) ?

NO Check A/V-I N-TERMI-

NAL (J1201) and peripheral circuits.

Is Y3 signal (IN3-Y) sent to Input terminal pin (6) of IC1201 (SW) ?

NO Check S-TERMINAL

(J1201) and peripheral circuits.

YES YES Is composite video signal (IN3(V)) sent to input terminal pin (AB20) of

IC3002 (V-PRO) ?

NO Check CONNECTOR

(SC2703/P1102 ), IC3002 (V-PRO.) and peripheral circuits.

Is Y/C signal (IN3Y/IN3C) sent to input terminal pins (AB20) and (AC20) of IC3002 (V-PRO.) ?

NO Check CONNECTOR

(SC2703/P1102 ), IC3002 (V-PRO.) and peripheral circuits.

YES YES Is LVDS video signal (TA1± -TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and

is CLK signal (CK1±) sent to pins (AB5)/(AC5)? Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) - (V2)/(V1) of IC3002 (V-PRO.), and is CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of

BU3.3V line of IC3002 (VPRO.), pins (G10)/(N17) of BU2.5V line,pins (U16)/ (G12) of BU1.8V line and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCD-

CONT-UNIT, and is CLK signal (CK1±) sent to pins (10)/(9)? Is LVDS video signal (TA2± - TD2±) sent to pins (17)/(16) -(26)/(25) of CONNECTOR CN1 of LCD- CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<When EXT4 is used for external input> No picture on the display (6)

No EXT4 (15pin-D-SUB terminal) output of the external input system.

Checklist:

1) Is "INPUT SOURCE" button on the remote control set up correctly ? ... See the operation manual and set "INPUT SOURCE" to "EXT4".

2) Connect the included D-SUB-Adapter-Cable to the COMPONENT terminal of an external device. ...See the operation manual (use a commer-

cially available Component-Cable to connect to the external device).

3) Is ANT-CABLE disconnected or connected improperly ? ... Connect it correctly as per the operation manual

Is "EXT4" selected

with button on the remote control

NO Select "EXT4" with

button on the

remote control.

YES Is D-SUB-COMPONENT signal (APC_R/G/B) sent

to pins (1),(2) and (3) of EXT4-TERMINAL (SC2303) ?

NO Check D-SUB-adaptor

and external connection.

YES Is D-SUB-COMPONENT signal (APC-R/G/B) sent to pins (AA17),(AB17)

and (Y17) of IC3002 (VPRO.) ?

NO Check EXT4-TERMI-

NAL and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and

is CLK signal (CK1±) sent to pins (AB5)/(AC5)? Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) - (V2)/(V1) of IC3002 (V-PRO.), and is CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of

BU3.3V line of IC3002 (VPRO.), pins (G10)/(N17) of BU2.5V line,pins (U16)/ (G12) of BU1.8V line and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCD-

CONT-UNIT, and is CLK signal± - TD2±) sent to pins (17)/(16) -(26)/(25) of CONNECTOR CN1 of LCD-CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV)..

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<When EXT5 is used for external input> No picture on the display (7)

No EXT5 (HDMI) output of the external input system.

Checklist:

1) Is "INPUT SOURCE" button on tne remote control set up correctly? ... See the operation manual and set "INPUT SOURCE" to "EXT5".

2) Have you checked the type video signal sent from HDMI-connected external device? ...Confirm the type (it should "RGB", "YCbCr 4:4:4" or "YCbCr 4:2:2").

3) Have you checked the type of Color matrix sent from HDMI-connected external device? ... Confirm the type (it should be "ITU601" or "ITU709".)

4) Is ANT-CABLE disconnected or connected improperly? ... Connect it correctly as per the operation manuall

Is "EXT5" selected with button on the remote control?

Select "EXT5" with button on the remote control.

YES Is the type of video signal (Signal Type) from HDMI- connected extennal device set?

NO From MENU-Connections-HDMI setup-EXT5-Signal type, select a

signal type ("RGB", "YCbCr 4:4:4" or "YCbCr 4:2:2")

YES Is the type of color signal (Color matrix) from HDMl -connected

external device set?

NO From MENU-Connections-HDMI setup-EXT5-Color Matrix, select

a color signal type ( "ITU601" or "ITU709")

YES Is TMDS signal (RX*±signal) sent to pins (1) - (12) of EXT5 (HDMI) termina (SC1901)?

NO Is I2C signal (SDA/SCL signal)sent to pins (16) and (15) of EXT5

(HDMI) terminal? Check external connection and peripheral circuits.

YES Is 8bit-DIGITAL signal (HDMI- R/G/B) sent from pins (110)(144) of IC1905 (HDMI-RECEIVER)?

NO Check power supply (3.3/1.8V) pins (99) and (74) of IC1905,

SDA/SCL signal pins (29) and (30), and peripheral circuits.

YES Is 8bit-DIGITAL signal (HDMI- R/G/B) sent to pins (B10) (D15) of IC3002 (V-PRO.)?

NO Check SDA3/SCL3 signal pins (27) and (28), interface between

IC1905 and lC3002, and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and is

CLK signal (CK1±) sent to pins (AB5)/(AC5)? Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) - (V2)/(V1) of IC3002 (V-PRO.), and is CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of

BU3.3V line of IC3002 (VPRO.), pins (G10)/(N17) of BU2.5V line,pins (U16)/ (G12) of BU1.8V line and peripheral circuits.

YES

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Is LVDS video signal (TA1± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCD-CONTUNIT, and is CLK signal (CK1±) sent to pins (10)/(9)? Is LVDS video signal (TA2± - TD2±) sent to pins (17)/(16) -(26)/(25) of CONNECTOR CN1 of LCD- CONT-UNIT, and is CLK signal (CK2±) sent to pins (24)/(23)?

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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<When EXT6 is used for external input> No picture on the display (8)

No EXT6 (HDMI) output of the external input system.

Checklist:

1) Is "INPUT SOURCE" button on tne remote control set up correctly? ... See the operation manual and set "INPUT SOURCE" to "EXT6".

2) Have you checked the type video signal sent from HDMI-connected external device? ...Confirm the type (it should "RGB", "YCbCr 4:4:4" or "YCbCr 4:2:2").

3) Have you checked the type of Color matrix sent from HDMI-connected external device? ... Confirm the type (it should be "ITU601" or "ITU709".)

4) Is ANT-CABLE disconnected or connected improperly? ... Connect it correctly as per the operation manuall

Is "EXT6" selected with button on the remote control?

Select "EXT6" with button on the remote control.

YES

Is the type of video signal (Signal Type) from HDMI- connected extennal device set?

NO From MENU-Connections-HDMI setup-EXT6-Signal type, select a

signal type ("RGB", "YCbCr 4:4:4" or "YCbCr 4:2:2")

YES Is the type of color signal (Color matrix) from HDMl -connected external device set?

NO From MENU-Connections-HDMI setup-EXT6-Color Matrix, select a

color signal type ( "ITU601" or "ITU709")

YES Is TMDS signal (RX*±signal) sent to pins (1) - (12) of EXT6 (HDMI) termina (SC1902)?

NO Is I2C signal (SDA/SCL signal)sent to pins (16) and (15) of EXT6

(HDMI) terminal? Check external connection and peripheral circuits.

YES Is 8bit-DIGITAL signal (HDMI- R/G/B) sent from pins (110)(144) of IC1905 (HDMI-RECEIVER)?

NO Check power supply (3.3/1.8V) pins (99) and (74) of IC1905,

SDA/SCL signal pins (29) and (30), and peripheral circuits.

YES Is 8bit-DIGITAL signal (HDMI- R/G/B) sent to pins (B10) -

(D15) of IC3002 (V-PRO.)?

NO Check SDA3/SCL3 signal pins (27) and (28), interface between

IC1905 and lC3002, and peripheral circuits.

YES Is LVDS video signal (TA1± - TD1±) sent to pins (AB8)/(AC8) - (AB3)/(AC3) of IC3002 (V-PRO.), and is CLK signal (CK1±) sent to pins (AB5)/(AC5)?

Is LVDS video signal (TA2± - TD2±) sent to pins (AC2)/(AC1) (V2)/(V1) of IC3002 (V-PRO.), and is CLK signal (CK2±) sent to pins (Y2)/(Y1)?

NO Check pins (G14)/(U10) of BU3.3V line of IC3002 (V-PRO.), pins

(G10)/(N17) of BU2.5V line,pins (U16)/(G12) of BU1.8V line and peripheral circuits.

YES

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YES Is LVDS video signal (TA1± - TD1±) sent to pins (3)/(2) -(12)/(11) of CONNECTOR CN1 of LCD-

NO Check CONNECTOR

(SC2302, CN1) and HARNESS WIRE (LV).

YES Is power (+12V) supplied to pins (1) - (5) of CONNECTOR CN2 in LCD-CONT-UNIT? NO Check CONNECTOR

(CN2,P707) and HARNESS WIRE (PL).

YES Replace LCD-CONT-UNIT.

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FRC circuit failure

Note: The SD signal (576i 480i) alone passes through the FRC circuit. (The HD signal does not go through.)

Does the image appear with the HD signal, but not with the SD signal ?

Does anything unusual (which or blackish screen, block noise, for example) appear on the screen?

Does the image look unusual with the power switch turned on?

YES YES YES

Is the power supplied to IC3301 (FRC)? Is there the FRC-IN signal input at pins (142) and (13) of IC3301? Check the soldering condition.

Is there the specified RESET-A signal input at pin (39) of IC3301(FRC)? (60 ms delay design)

Check the connection between pin (R22) of IC3002 (V-PRO.) and pin (142) of IC3301 (FRC) as well as that between pin (N20) of IC3302 and pin(13) of IC3301.

YES NO

Replace IC3301(FRC). Check "RESET-A " signal pin(34) of

IC1710 (FPGA).

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Backlight failure to light up

Do all the fluorescent tubes light up? NO Check the individual fluorescent

tubes for light-up failure.

YES Replace any defective fluorescent

tubes with new ones.

YES Is the power supplied to CN7501 on the inverter unit?

NO Check the connection between power

unit and inverter unit.

YES Is the fuse (F7501 or F7502) in the

inverter unit circuit functioning?

NO Replace the blown-out fuse (F7501

or F7502) on the inverter unit. Turn on the power again. If the fuse gets blown out again, check the short-circuited spot.

YES Check the transformer (T7501-

T7511, T7601-T7606) and their peripheral circuits as well as IC7501 and their peripheral circuits.

YES Is the VCC power supplied to the control IC (IC7501) on the inverter

unit?

NO Check the circuit connected with the

VCC terminal on the inverter control IC (IC7501).

YES Has each control signal come to CN7502(LB)?

(STB,OSC,OFL)

NO Have the STB,OSC and OFL signal

come to P1701(LB) in the MAIN substrate?

NO Check pins (89),(19) and (17) of

IC1710 (main PWB) .

YES Is the specified control signal inputted at IC7501 (INV-CTL) on the inverter unit.

NO Check the line between CN7502 and

IC7501.

YES Are the Q7501 and Q7502 transisters at the primary side of T7501 functioning?

NO Check the power line of IC7501, its

peripheral circuits or replace IC7501.

YES Is the secondary circuit of T7501 functioning.

NO Replace T7501 or the T*** trans-

former for the fluorescent tubes, or check their peripheral circuits.

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LCD failure 1

Does a single or several vertical stripes appear on the LCD screen?

Does a single or several horizontal stripes appear on the LCD screen?

Do luminescent or black dots appear on the screen?

Is the on-screen image rippling or distorted?

Replace the LCD panel.

LCD failure 2

The backlight functions. Does not the image come out in the LCD screen (screen black) ?

Does the entire LCD screen look whitish all over?

Does the QS drive function?

Are the data bit dropout? (No solution even when turning on and off the QS drive)

Is the gamma correction as specified?

Replace the LCD control unit.

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LC42XD10E

Service Manual

CHAPTER 5. MAJOR IC INFORMATIONS

[1] MAJOR IC INFORMATIONS

1. DESCRIPTION OF MAJOR ICs

REF NO Name Part Code Discruotion

Dwg. Code

IC1905 HDMI-

Receiver

VHISII9025+-1Q The SiI9025 is a second generation panelLink Cinema receiver that is compatible with

the HDMI 1.1 (High Definition Multimedia interface)specification. The SiI9025 is capable of receiving and outputting two channel digital audio at up to 192KHz - an excellent solution for Digital TVs. The features of this IC is as follow.

1) Digital video interface supports video processors:

2) Analog RGB and YPbPr output: 10-bit DAC

3) Digital audio interface supports high-end audio systems:

IC3002 VIDEO PRO-

CESSOR

RH-IXB755WJZZ This is a video processor IC.

This IC has the following six major function.

1)Video Processing

2) CPU

3)Scaling, Display Processing

4)Video decoder and 3D Combfilter

5) OSD and Text

6)PC Connectivity

IC3501 IC3502

256Mb-DDR SDRAM

RH-IXB765WJZZQ This is a 256Mb DDR SDRAM IC. This IC features a double-dara rate dynamic ran-

dom-access memory containing 16M-bits.columns by 16 bits. In this model, it uses it as a memory for the micon and a frame memory for Video Processor, etc.

IC3503 128Mbit-

FLASH Memory

RH-IXB754WJZZ This IC is a NOR-type 128Mbit Flash Memory.

The Flash-Memory stores the main program that is used for the CPU.

IC3504 D-TYPE

RATCH

RH-IXB753WJZZ This IC is a 16bit D-type RATCH-3 state output IC.

On this model, the IC is used to trnsfer the main program from the flash memory to the CPU.

IC3701 MSP4410K RH-IXB752WJZZQ This MSP (4410K) of single-chip Multistandard Sound Processors covers the sound

processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards and FM stereo radio.

IC3301 FRC B2 Ver-

sion

RH-IXB064WJN1Q This is an IC for Frame Rate Converter.

This IC mainly processes I/P conversion: Standard 50/60 Hz interlaced to 50/60 Hz progressive. It also has the following functions: 1 ) Image Improvement: (Chroma Transient Improvement, Luminance Transient Improvement, Dynamic Contrast Improvement, Back Stretcher)

2) Film mode detection (2-2/3-2 pull down)

3) Film judder cancellation.

IC2301 RS232C

Transmitters/ Receivers

VHIICL3225E-1Y This IC is a line driver receiver in conformity with EIA/TIA-232-E (former RS-

232C)standard. By connecting a PC, the system can be controlled externally.

IC1710 FPGA RH-IXB946WJZZQ This IC is F.P.G.A (Field rogramable Gate Arrays) for signal selector and synchronous

processing of each digitalized input signal. This IC functions as extended I/O of the main microcontroller and controls timing of bus signals among ICs, etc.

IC1712/08 Stepdown

Converter

VHIMP1410ES-1Y The MP1410 is a monolithic step down switch mode regurator with a built in internal

power MOSFET. In this model, it works to 1.8V regurator.

IC1706 Stepdown

Converter

VHIMP1583++-1Y The MP1583 is a step down DC-DC converter of class 3A current capacity.

In this model, it works to BU1.8V regurator.

IC3001 E2PROM RH-IXB992WJZZY This IC is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable.

This IC saves adjustment values of the adjustment process mode. The data is given out by commands from the main microprocessor.

IC1901 IC1902

E2PROM VHI24LC2BIN-1Y This IC is a 2-wire (I2C bus type) serial EEPROM this is electrically programmable.

This EEPROM chip stores EDID data of the input for HDMI. This data is controlled by the I2C signal.

IC2303 E2PROM VHIBR24C21F-1Y This IC is a 2-wire (I2C bus type) serial EEPROM this is electrically programmable.

This EEPROM chip stores EDID data of the input for PC. This data is controlled by the I2C signal.

IC1702 BU+3.3V VHIPQ20WZ11-1Y Low power-loss voltage regulators. Variable Output. Output current 1A.

Built-in overcurrent, overheat protection functions,ASO protection circuit.

IC1703 S+8V VHIPQ20WZ11-1Y Low power-loss voltage regulators. Variable Output. Output current 1A.

Built-in overcurrent, overheat protection functions,ASO protection circuit.

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IC1706 BU+1.8V VHIMP1583++-1Y DC to DC Converter. 3A Step down switch mode regulator with a built in internal Power

Mosfet. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

IC1707 +3.3V VHIPQ20WZ11-1Y Low power-loss voltage regulators. Variable Output. Output current 1A.

Built-in overcurrent, overheat protection functions,ASO protection circuit.

IC1708 +1.8V VHIMP1410ES-1Y DC to DC Converter. 2A Step down switch mode regulator with a built in internal Power

Mosfet. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

IC1712 BU+2.5V VHIMP1410ES-1Y DC to DC Converter. 2A Step down switch mode regulator with a built in internal Power

Mosfet. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

[AV SECTION]

IC301 IC302

Sound Amp VHITDA8931T-1Y The TDA8931 is a switching power stage for high efficiency class-D audio power ampli-

fier systems. With this amplifier a compact 1x 20 W closed loop self-oscillating digital amplifier system can be built. In this model, Audio amplifier is 15watt *2.

AV1

[DIGITAL SECTION]

IC4001 DTV-PRO-

CESSOR

RH-IXB680WJZZQ This is a video/audio signal processing IC (Digital Processor) (STi5516) for digital

tuner, which has been manufactured by STMicroelectronics, and incorporates a CPU. In this equipment, it implements GUI processing and video/audio processing for digital tuner, negotiation processing with CI-CARD, etc.

IC4201 64M-SDRAM RH-IXB742WJZZQ This IC is 64Mb SDRAM (static dynamic random-access memory )IC.

In this equipment, it is used for SMI memory (for image processing), and data is used for operation of the digital processor.

IC4202 64M-SDRAM RH-IXB742WJZZQ This IC is 64Mb SDRAM (static dynamic random-access memory )IC.

In this equipment, it is used for EMI memory (generally for CPU), and data is used for operation of the digital processor.

IC4203 16Mbit-

FLASH

RH-IXB921WJZZQ This IC is a high performance CMOS super technology 16Mbit Flash Memory.

Start software (loader) for the CPU with a built-in digital processor and application software have been written on this Flash Memory. The digital processor reads these softwares on start-up and implements them.

IC4402/05 RATCH-3

STATE

VHILVC573AP-1Y This is a RATCH-3 STATE output IC. In this equipment, it is used to establish negotia-

tion communication with CI-CARD.

IC4401 BALANCE

TRANCEIVER

VHITCLCX245-2Y This IC is a low voltage (3.3V) CMOS 8bit bidirectional transceiver. When setting the

transmission direction change input DIR to “H”, the A bus is switched to input and the B bus is changed to output; if the DIR is set to “L”, the B bus is switched to input and the A bus is changed to output. When setting the enable input OE to “H”, both A and B buses enter the high impedance state. In this equipment, it used to switch bus of the data from CICARD.

IC4404 Buffer/Line

Driver

VHILCX244MT-1Y This lC is fabricated with an advanced CMOS technology to achieve high speed opera-

tion while maintaining CMOS low power dissipation. In this equipment, it is used to control negotiation communication with CI-CARD.

IC4604 3-OP-AMP VHITSH73CPT-1Y This IC is a Triple operational amplifiers featuring high video performances with large

bandwidth, low distortion and excellent supply voltage rejection. In this equipment, it is used to convert audio output signal of the digital processor to normal analog signal level and to buffer it.

[DIGITAL TUNER SECTION] IC202 COFDM

Demod IC

RH-IXB682WJZZQ This is a COFDM (Coded Orthogonal Frequency Division Multiplex) Demodulator IC. In

this equipment, IF signal from the digital tuner is decoded to MPEG-2 signal, and it is digitally output. Output signal is fed to the digital processor to implement video/audio decode processing. This IC is used for digital signal is fed to the digital processor to implement video/audio decode processing. This IC is used for digital tuner only.

TUN ER

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2. IC1905: VHISii9023+-1Q

HDMI RECIEVER

Pin No. Pin Name I/O Pin Function

144 Q0 O 24-bit Output Pixel Data Bus. 143 Q1 O 24-bit Output Pixel Data Bus. 142 Q2 O 24-bit Output Pixel Data Bus. 141 Q3 O 24-bit Output Pixel Data Bus. 140 Q4 O 24-bit Output Pixel Data Bus. 137 Q5 O 24-bit Output Pixel Data Bus. 136 Q6 O 24-bit Output Pixel Data Bus. 133 Q7 O 24-bit Output Pixel Data Bus. 132 Q8 O 24-bit Output Pixel Data Bus. 131 Q9 O 24-bit Output Pixel Data Bus. 130 Q10 O 24-bit Output Pixel Data Bus. 129 Q11 O 24-bit Output Pixel Data Bus. 126 Q12 O 24-bit Output Pixel Data Bus. 125 Q13 O 24-bit Output Pixel Data Bus. 124 Q14 O 24-bit Output Pixel Data Bus. 123 Q15 O 24-bit Output Pixel Data Bus. 119 Q16 O 24-bit Output Pixel Data Bus. 118 Q17 O 24-bit Output Pixel Data Bus. 117 Q18 O 24-bit Output Pixel Data Bus. 116 Q19 O 24-bit Output Pixel Data Bus. 113 Q20 O 24-bit Output Pixel Data Bus. 112 Q21 O 24-bit Output Pixel Data Bus. 111 Q22 O 24-bit Output Pixel Data Bus. 110 Q23 O 24-bit Output Pixel Data Bus.

1 DE O Data enable. 2 HSYNC O Horizontal Sync Output control signal. 3 VSYNC O Vertical Syanc Output control signal.

121 ODCK O Output Data Clock.

97 XTALIN I Crystal Clock Input. 96 XTALOUT O Crystal Clock Output. 88 MCLKOUT O Audio Master Clock Output. 86 SCK O I2S Serial Clock Output. 85 WS O I2S Word Select Output. 84 SDO O I2S Serial Data Output. 78 SPDIF O S/PDIF Audio Output

77 MUTEOUT O Mute Audio Output. 104 INT O Interrupt Output. 102 RESET# I Reset Pin. Active LOW. 5V Tolerant.

32 DSCL0 I DDC I2C Clock for Port 0. 5V Tolerant.

31 DSDA0 Bi-Di DDC I2C Data for Port 0. 5V Tolerant.

30 DSCL1 I DDC I2C Clock for Port 1. 5V Tolerant.

29 DSDA1 Bi-Di DDC I2C Data for Port 1. 5V Tolerant.

28 CSCL I Configuration I2C Clock. 5V Tolerant.

27 CSDA Bi-Di Configuration I2C Data. 5V Tolerant. 103 SCDT O Indicates active video at HDMI input port. 107 CLK48B Bi-Di Data Bus Latch Enable. 2

34 R0PWR5V I Port 0 Transmitter Detect. 5V Tolerant.

33 R1PWR5V I Port 1 Transmitter Detect. 5V Tolerant. 101 RSVDL I Reserved, must be tied Low.

56 RSVD_A Bi-Di Reserved Pin, leave unconnected.

6,7,8,10,

11,12,13, 14,17,18, 19,20,81,

82,93,10

NC - No internal connection.

87 MCLKIN O Audio Master Clock Input Reference.

9 EVNODD O Indicates Even or Odd field for interlaced formats. Polarity programmable in register. 40 R0XC+ I TMDS input clock pair. HDMI Port 0. 39 R0XC- I TMDS input clock pair. HDMI Port 0. 44 R0X0+ I TMDS input data pair. HDMI Port 0. 43 R0X0- I TMDS input data pair. HDMI Port 0.

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48 R0X1+ I TMDS input data pair. HDMI Port 0. 47 R0X1- I TMDS input data pair. HDMI Port 0. 52 R0X2+ I TMDS input data pair. HDMI Port 0. 51 R0X2- I TMDS input data pair. HDMI Port 0. 59 R1XC+ I TMDS input clock pair. HDMI Port 1. 58 R1XC- I TMDS input clock pair. HDMI Port 1. 63 R1X0+ I TMDS input data pair. HDMI Port 1. 62 R1X0- I TMDS input data pair. HDMI Port 1. 67 R1X1+ I TMDS input data pair. HDMI Port 1. 66 R1X1- I TMDS input data pair. HDMI Port 1. 71 R1X2+ I TMDS input data pair. HDMI Port 1. 70 R1X2- I TMDS input data pair. HDMI Port 1.

22,23,35, 74,79,92,

105,114,

128,139

CVCC18 - Digital Logic VCC.

21,24,36, 73,80,91,

106,115,

127,138

CGND - Digital Logic GND.

5,16,26,7 6,89,109,

122,134

IOVCC - Input/Output Pin VCC.

4,15,25,7 5,90,108,

120,135

IOGND - Input/Output Pin GND.

38,42,46, 50,57,61,

65,69

AVCC - TMDS Analog VCC.

41,45,49, 53,60,64,

68,72

AGND - TMDS Analog GND.

37 PVCC0 - TMDS Port 0 PLL VCC. 55 PVCC1 - TMDS Port 1 PLL VCC. 54 TMDSPGND - TMDS PLL GND. 94 AUDPVCC18 - ACR PLL VCC. 95 AUDPGND - ACR PLL GND. 98 XTALVCC - ACR PLL Crystal Input VCC. 99 REGVCC - ACR PLL Regulator VCC.

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3. IC3002: RH-IXB755WJZZ

Video Graphics Controller

Pin No. Pin Name I/O Description

M23 XIN I 20.25MHz clock or crystal input M22 XOUT O Output to a crystaI that is connected to XIN . D18 RESET_N I Reset input (active low) G15 POR_N O Power-on reset generator (active low), May be connected to RESET_N.

H7 TM I Test mode enable.

L20 VARCLK O Vriable clock output (e.g. FRC94xxAclk) Y20 CV01 O Analog video out (CVBS or Y) (EXT2-VOUT2) Y23 CV02 O Analog video out (CVBS or Y) (EXT1-VOUT1) Y22 CV03 O - (pull up) Y21 CV04 O - (pull up)

AA23 CV05 O - (pull up) AA22 CV06 O - (pull up) AB23 CV09 O - (pull up) AC23 CVI1 I Analog video in (CVBS) (TUNER CVBS IN) AB22 CVI2 I Analog video in (CVBS) (EXT1 VIN1) AC22 CVI3 I AA21 CVI4 I Analog video in (CVBS) (DVB CVBS IN) AB20 YI1 I Analog video in (Y or CVBS) (EXT3 CVBS IN) AB21 YI2 I Analog video in (Y or CVBS) (EXT2 Y/CVBS IN) AA20 YI3 I AC20 CI1 I Analog video in (chroma) (EXT3 IN3C IN) AC21 CI2 I Analog video in (chroma) (EXT2 C2 IN) AC19 CI3 I -

Y19 RI1 I Analog component input 1 (EXT1-RED1)

AB19 GI1 I Analog component input 1 (EXT1-GREEN1) AC18 BI1 I Analog component input 1 (EXT1-BLUE1) AA19 FBI1 I Analog component input 1 (EXT1-FAST-SW1) AA18 RI2 I Analog component input2 (DVB-R) AB18 GI2 I Analog component input2 (DVB-G)

Y18 BI2 I Analog component input2 (DVB-B)

AC17 FBI2 I Analog component input2 GND AA17 RI3 I Analog component input3 (APC_R) AB17 GI3 I Analog component input3 (APC_G)

Y17 BI3 I Analog component input3 (APC_B)

AC16 FBI3 I Horizontal sync input. (PCV_H)

W21 VIN I Vertical sync input. (PCV_V)

B17 I2SWS I I2S word strobe (digital audio left/right select input) C17 I2SCL I I2S clock (digital audio bit clock input) D17 I2SDA1 I I2S data input (PCM audio data) A18 I2SDA0 O I2S data output (PCM audio data)

L3 RAMD_31 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_31) L4 RAMD_30 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_30)

K3 RAMD_29 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_29)

Kl RAMD_28 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_28)

K4 RAMD_27 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_27)

J3 RAMD_26 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_26)

J4 RAMD_25 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_25) H3 RAMD_24 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_24) H4 RAMD_23 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_23) G3 RAMD_22 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_22) G4 RAMD_21 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_21) F3 RAMD_20 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_20) F1 RAMD_19 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_19) G2 RAMD_18 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_18) G1 RAMD_17 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_17) H2 RAMD_16 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_16) C1 RAMD_15 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_15) D2 RAMD_14 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_14) D1 RAMD_13 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_13) E2 RAMD_12 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_12) D3 RAMD_11 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_11) E4 RAMD_10 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_10)

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E3 RAMD_9 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_9) F4 RAMD_8 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_8) C7 RAMD_7 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_7) D6 RAMD_6 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_6) C6 RAMD_5 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_5) D5 RAMD_4 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_4) A7 RAMD_3 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_3) B6 RAMD_2 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_2) A6 RAMD_1 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_1) B5 RAMD_0 I/O DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_0) A2 RAMA_12 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_12) A3 RAMA_11 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_11) D8 RAMA_10 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_10) B3 RAMA_9 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_9) A4 RAMA_8 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_8) B4 RAMA_7 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_7) C3 RAMA_6 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_6) C4 RAMA_5 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_5) D4 RAMA_4 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_4) D9 RAMA_3 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_3)

AlO RAMA_2 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_2)

B9 RAMA_1 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_1) C9 RAMA_0 O Address bits for DRAM. (Row/Col) (SDRAM-RAMA_0) C8 RAMBA_1 O DRAM bank select (SDRAM-RAM_BA1) D7 RAMBA_0 O DRAM bank select (SDRAM-RAM_BA0) B8 RAMRAS_N O DRAM row address strobe (active low) (SDRAM-RAMRAS_N) A8 RAMCAS_N O DRAM column address strobe (active low) (SDRAM-RAMCAS_N)

J1 RAMDM_3 O DRAM byte mask lines. (SDRAM-RAMDM_3)

J2 RAMDM_2 O DRAM byte mask lines. (SDRAM-RAMDM_2) F2 RAMDM_1 O DRAM byte mask lines. (SDRAM-RAMDM_1) C5 RAMDM_0 O DRAM byte mask lines. (SDRAM-RAMDM_0) B7 RAMWE_N O DRAM write enable (active low) (SDRAM-RAMWE_N) A9 RAMCS_N O DRAM chip select (active low) (SDRAM-RAMCS_N) A1 RAMCKE O DRAM clock enable. (SDRAM-RAMCKE) B2 RAMCLK O DRAM clock output. (SDRAM-RAMCLK) C2 RAMCLK_N O DRAM clock output (inverted) (SDRAM-RAMCLK_N) K2 RAMDQS_3 I/O Strobe signal. (SDRAM-RAMDQS_3) H1 RAMDQS_2 I/O Strobe signal. (SDRAM-RAMDQS_2) E1 RAMDQS_1 I/O Strobe signal. (SDRAM-RAMDQS_1) A5 RAMDQS_0 I/O Strobe signal. (SDRAM-RAMDQS_0) B1 RAMCLKIN I Clock (RAMCLK) feed back. (SDRAM-RAMCLKIN) G7 SSTLVREF I SSTL2 Reference Voltage. (SDRAM-SSTLVREF)

K20 SCL1 I 12C bus 1clock. K21 SDA1 I/O 12C bus 1 data. B18 SCL2 I 12C bus 2 clock. (no used) C18 SDA2 I/O 12C bus 2 data. (no used) H17 TRST I Test reset. G17 TMS I Test mode select.

G8 TDO O Test data output.

G16 TCLK I Test clock.

G9 TDl I Test data input.

M20 CADC5 I CADC analog source input. (KEY-1) (to key-unit) M21 CADC4 I CADC analog source input. (TH3001)

L21 CADC3 I CADC analog source input. (OPCIN)

K22 CADC2 I CADC analog source input. (KEY-2) (to key-unit)

L22 CADC1 I CADC analog source input. (SLOW_SW1)

L23 CADC0 I CADC analog source input. (SLOW_SW2) N23 DPWM1 O Display-PWM outputs. (PWMOUT-BRT-INV) N22 DPWM2 O -

W23 DPWM3 O - W22 VITUFE O V sync output of lTUE-FE.

U3 NVM_22 O NVM_[22:16] upper address bits (to-flash memory)

Pull-up and pull-down resistors must be used for boot-process configuration M2 NVM_21 O NVM_[22:16] upper address bits (to-flash memory) M4 NVM_20 O NVM_[22:16] upper address bits (to-flash memory)

L1 NVM_19 O NVM_[22:16] upper address bits (to-flash memory)

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M1 NVM_18 O NVM_[22:16] upper address bits (to-flash memory) N4 NVM_17 O NVM_[22:16] upper address bits (to-flash memory) U1 NVM_16 O NVM_[22:16] upper address bits (to-flash memory) U4 NVM_15 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) T1 NVM_14 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) T2 NVM_13 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) T3 NVM_12 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) T4 NVM_11 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) R1 NVM_10 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) R2 NVM_9 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) R3 NVM_8 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) R4 NVM_7 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) P1 NVM_6 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) P2 NVM_5 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) P3 NVM_4 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) P4 NVM_3 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) N1 NVM_2 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) N2 NVM_1 I/O NVMD_[15:0] multiplexed address/data (to-flash memory) N3 NVM_0 I/O NVMD_[15:0] multiplexed address/data (to-flash memory)

L2 NVMOE_N O Output enable (active low) M3 NVMWE_N O Write enable (active low) U2 ENVMALE O Address latch enable. R7 REXT_LVDS S External Resistor (6.2KΩ, 1%)

AC8 PORT_A_29 I Port A data RGB or LVDS (TA1-) AB8 PORT_A_28 I Port A data RGB or LVDS (TA1+) AC7 PORT_A_27 I Port A data RGB or LVDS (TB1-) AB7 PORT_A_26 I Port A data RGB or LVDS (TB1+) AC6 PORT_A_25 I Port A data RGB or LVDS (TC1-) AB6 PORT_A_24 I Port A data RGB or LVDS (TC1+) AC5 PORT_A_23 I Port A data RGB or LVDS (CK1-) AB5 PORT_A_22 I Port A data RGB or LVDS (CK1+) AA5 PORT_A_21 I Port A data RGB or LVDS NC

Y5 PORT_A_20 I Port A data RGB or LVDS NC

AC4 PORT_A_19 I Port A data RGB or LVDS (TD1-) AB4 PORT_A_18 I Port A data RGB or LVDS (TD1+) AC3 PORT_A_17 I Port A data RGB or LVDS (TE1-) AB3 PORT_A_16 I Por A data RGB or LVDS (TE1+) AC1 PORT_A_15 I Port A data RGB or LVDS (TA2-) AC2 PORT_A_14 I Port A data RGB or LVDS (TA2+) AB1 PORT_A_13 I Port A data RGB or LVDS (TB2-) AB2 PORT_A_12 I Port A data RGB or LVDS (TB2+) AA3 PORT_A_11 I Port A data RGB or LVDS NC AA4 PORT_A_10 I Port A data RGB or LVDS NC AA1 PORT_A_9 I Port A data RGB or LVDS (TC2-) AA2 PORT_A_8 I Port A data RGB or LVDS (TC2+)

Y1 PORT_A_7 I Port A data RGB or LVDS (CK2-) Y2 PORT_A_6 I Port A data RGB or LVDS (CK2+) Wl PORT_A_5 I Port A data RGB or LVDS (TD2-)

W2 PORT_A_4 I Port A data RGB or LVDS (TD2+)

V1 PORT_A_3 I Port A data RGB or LVDS (TE2-) V2 PORT_A_2 I Port A data RGB or LVDS (TE2+) V3 PORT_A_1 I Port A data RGB or LVDS NC V4 PORT_A_0 I Port A data RGB or LVDS NC

W4 PORT_ A_PCS1 I/O Port A panel control. NC W3 PORT_A_PCS2 I Port A panel control. HSYNC_OSC

Y4 PORT_A_PCS3 I Port A panel control. VSYNC_OSC Y3 PORT_A_PCS4 I/O Port A panel control. NC

AA6 PORT_A_PCS5 I/O Port A panel control. NC

Y7 PORT_A_PCS6 I/O Port A panel control. NC

AA7 PORT_A_REV I/O Port A panel control. NC

Y6 PORT_A_CLK I/O Port A clock.

AB13 PORT_B_16 I/O Port B data. NC

Y13 PORT_B_15 I/O Port B data. NC AA12 PORT_B_14 I/O Port B data. NC AC12 PORT_B_13 I/O Port B data. NC

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Y12 PORT_B_12 I/O Port B data. NC AB12 PORT_B_11 I/O Port B data. NC AA11 PORT_B_10 I/O Port B data. NC AC11 PORT_B_9 I/O Port B data. NC

Y11 PORT_B_8 I/O Port B data. NC

Y10 PORT_B_7 I/O Port B data. NC AB10 PORT_B_6 I/O Port B data. NC

AA9 PORT_B_5 I/O Port B data. NC

AC9 PORT_B_4 I/O Port B data. NC

Y9 PORT_B_3 I/O Port B data. NC AB9 PORT_B_2 I/O Port B data. NC AA8 PORT_B_1 I/O Port B data. NC

Y8 PORT_B_0 I/O Port B data. NC

AC10 PORT_B_H I/O Port B H-Sync. AB11 PORL_B_V I/O Port B V-Sync. AA10 PORT_B_CLK I/O Port B clock. AC15 PORT_C_9 I/O Port C data . NC AA15 PORT_C_8 I/O Port C data. NC AB15 PORT_C_7 I/O Port C data. NC

Y15 PORT_C_6 I/O Port C data. NC

AC14 PORT_C_5 I/O Port C data. NC AA14 PORT_C_4 I/O Port C data. NC AB14 PORT_C_3 I/O Port C data. NC

Y14 PORT_C_2 I/O Port C data. NC

AC13 PORT_C_1 I/O Port C data. NC AA13 PORT_C_0 I/O Port C data. NC

Y16 PORT_C_H I Port C H-Sync.

AB16 PORT_C_V I Port C V-Sync. AA16 PORT_C_CLK I Port C clock.

D11 PORT_D_23 I Port D data. DINB[7] HDMI-B7

A12 PORT_D_22 I Port D data. DINB[7] HDMI-B6

C11 PORT_D_21 I Port D data. DINB[7] HDMI-B5 B11 PORT_D_20 I Port D data. DINB[7] HDMI-B4

D10 PORT_D_19 I Port D data. DINB[7] HDMI-B3

A11 PORT_D_18 I Port D data. DINB[7] HDMI-B2 C10 PORT_D_17 I Port D data. DINB[7] HDMI-B1 B10 PORT_D_16 I Port D data. DINB[7] HDMI-B0 D13 PORT_D_15 I Port D data. DINB[7] HDMI-G7 A14 PORT_D_14 I Port D data. DINB[7] HDMI-G6 C13 PORT_D_13 I Port D data. DINB[7] HDMI-G5 B13 PORT_D_12 I Port D data. DINB[7] HDMI-G4 D12 PORT_D_11 I Port D data. DINB[7] HDMI-G3 A13 PORT_D_10 I Port D data. DINB[7] HDMI-G2 C12 PORT_D_9 I Port D data. DINB[7] HDMI-G1 B12 PORT_D_8 I Port D data. DINB[7] HDMI-G0 D15 PORT_D_7 I Port D data. DINB[7] HDMI-R7 A16 PORT_D_6 I Port D data. DINB[7] HDMI-R6 C15 PORT_D_5 I Port D data. DINB[7] HDMI-R5 B15 PORT_D_4 I Port D data. DINB[7] HDMI-R4 D14 PORT_D_3 I Port D data. DINB[7] HDMI-R3 A15 PORT_D_2 I Port D data. DINB[7] HDMI-R2 C14 PORT_D_1 I Port D data. DINB[7] HDMI-R1 B14 PORT_D_0 I Port D data. DINB[7] HDMI-R0 C16 PORT_D_DE I Port D DINEN data enable D16 PORT_D_H I Port D H-sync. A17 PORT_D_V I Port D V-sync. B16 PORT_D_CLK I Port D clock.

T22 PORT_E_9 I/O Port E data. NC

T20 PORT_E_8 I/O Port E data. NC U23 PORT_E_7 I/O Port E data. NC U21 PORT_E_6 I/O Port E data. NC U22 PORT_E_5 I/O Port E data. NC U20 PORT_E_4 I/O Port E data. NC V23 PORT_E_3 I/O Port E data. NC V21 PORT_E_2 I/O Port E data. NC

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V22 PORT_E_1 I/O Port E data. NC V20 PORT_E_0 I/O Port E data. NC

T21 PORT_E_CLK I/O Port E data. NC N20 PORT_F_9 O Port F data. FRCI_7 P23 PORT_F_8 O Port F data. FRCI_6 P21 PORT_F_7 O Port F data. FRCI_5 P22 PORT_F_6 O Port F data. FRCI_4 P20 PORT_F_5 O Port F data. FRCI_3 R23 PORT_F_4 O Port F data. FRCI_2 R21 PORT_F_3 O Port F data. FRCI_1 R22 PORT_F_2 O Port F data. FRCI_0 R20 PORT_F_1 O Port F data. NC

T23 PORT_F_0 O Port F data. NC N21 PORT_F_CLK O Port F clock. G22 PORT_G_9 I Port G data. FRCO_7B H23 PORT_G_8 I Port G data. FRCO_6B H21 PORT_G_7 I Port G data. FRCO_5B H22 PORT_G_6 I Port G data. FRCO_4B H20 PORT_G_5 I Port G data. FRCO_3B

J23 PORT_G_4 I Port G data. FRCO_2B

J21 PORT_G_3 I Port G data. FRCO_1B

J22 PORT_G_2 I Port G data. FRCO_0B

J20 PORT_G_1 I Port G data. NC K23 PORT_G_0 I Port G data. NC G23 PORT_G_CLK I Port G clock. D19 P29 I CPU I/O PORT HDMI_INT (from IC1905) C19 P28 I CPU I/O PORT HOTP_CONT1 (to EXT5) B19 P27 I CPU I/O PORT HOTP_CONT0 (to EXT5) A19 P26 O CPU I/O PORT POWER_ERR (to power-unit) C20 P25 I CPU I/O PORT BL_ERR (from INV) B20 P24 I/O CPU I/O PORT DTM_IRQ NC A20 P23 I CPU I/O PORT CEC_IN (to IC2701) B21 P22 O CPU I/O PORT AVLINK,2_OUT (from Q2702) A21 P21 I CPU I/O PORT AVLINK2_IN (to Q2711) A22 P20 O CPU I/O PORT PCON2 (to power-unit) A23 P19 O CPU I/O PORT PCON1 (to power-unit) B22 P18 O CPU I/O PORT AVLINK1_OUT (to Q***) B23 P17 I CPU I/O PORT AVLINK1_IN (from Q***) C21 P16 O CPU I/O PORT FPGA_SDE (to IC1710) C22 P15 O CPU I/O PORT FPGA_SDA (to IC1710) C23 P14 O CPU I/O PORT FPGA_SCK (to IC1710) D20 P13 O CPU I/O PORT FPGA_SDA0 (to IC1710) D21 P12 O CPU I/O PORT FAN_ERR (to power-unit) D22 P11 O CPU I/O PORT MUTE_SP (to Q1101/2) D23 P10 O CPU I/O PORT SV1JSW (IN3SW to IC1201) E20 P9 O CPU I/O PORT STBY_POW (to key-unit) E21 P8 O CPU I/O PORT CEC1_OUT (from IC2701) E22 P7 O CPU I/O PORT LED_POW_G (to R/C-unit) E23 P6 O CPU I/O PORT LED_POW_R (to R/C-unit)

F20 P5 I CPU I/O PORT NVM_CE_N (to IC3503)

F21 P4 O CPU I/O PORT HDMI_RESET (to IC1905)

F22 P3 O CPU I/O PORT LCD_POW (to power-unit)

F23 P2 I CPU I/O PORT RXD (to RS232C-driver) G20 P1 O CPU I/O PORT TXD (to RS232C-driver) G21 P0 O CPU I/O PORT IRIN (to R/C-unit)

U12, U16 VDDA18_ADC S Analog Supply power for ADC (1.8V) U14, T17 VDDA33_ADC S Analog Supply power for ADC (3.3V)

K17 VDDA33_CADC S Analog Supply power for CADC (3.3V) N17 VDD_PLL S Analog Supply power for PLL (1.8V)

U7 VDDPLLVDS S Analog Supply power for LVDSPLL (1.8V)

M7, J7, U8, G12, G13, L17,

M17

VDDD S Core supply power (3.3V)

N7,U10, R17, G14 VDDP S Pad supply power (3.3V)

G10, G11, K7, L7 VDDPSD S DRAM interface supply power (2.5V)

P7, U9 VDDLVDS S LVDS supply power. (3.3V)

U11, U15 VSSA18_ADC S Analog ground for ADC.

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U13, U17 VSSA33_ADC S Analog ground for ADC.

J17 VSSA33_CADC S Analog ground for CADC. P17 VSS_PLL S Analog ground for PLL.

N14, P10, P14, N14, M14,

L14, K14, K13, T7

VSS S Core & pad supply ground.

K10, L10, K12, K11, M10 VSSPSD S DRAM interface supply ground.

W20 NC - Not connected.

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4. IC3501/3502: RH-IXB765WJZZ

256Mb DDR SDRAM

Pin No. Pin Name I/O Pin Function

45,46 CK, CK

I Clock: CK and CK are differential clock inputs.

All address and control input signals are sampled on the positive edge of CK and negative edge of CK. Output (read) data is referenced to both edges of CK

Internal clock signals are derived from CK/CK

44 CKE I Clock Enable: CKE HIGH activates, and CKE LOW deactivates internal clock signals,

and device input buffers and output drivers. Taking CKE Low provides PRECHARGE POWER DOWN and SELF REFRESH operction (all bank idle) CKE is synchronous for POWER-DOWN entry and exit, and for SELF REFRESH entry. CKE is asynchronous for SELF REFRESH exit, and for output disable. CKE must be maintained high throughput READ and WRITE accesses. Input buffers, excluding CK, CK

and CKE are disabled during POWER-DOWN. Input buffers, excluding CKE are disabled during SELF REFRESH. CKE is an SSTL_2 input, but will detect an LVCMOS Low level after Vdd is applied upon 1st power up, After VREF has become stable during the power on and initialization sequence, it must be maintained for proper operation of the CKE receiver. For proper SELF-REFRESH entry and exit, VREF must be maintained to this input.

24 CS

I Chip Select: CS enables (registered LOW) and disables (registered HIGH) the command

decoder. All commands are masked when CS

is registered HIGH.

provides for external bank selection on systems with multiple banks.

is considered part of the command code.

21-23 RAS

, CAS, WE I Command Inputs: RAS, CAS, and WE (along with CS) define the command being

entered.

20,47 LDM,(UDM) I Input Data Mask: DM is an input mask signal for write data.

Input data is masked when DM is sampled HIGH along with that input data during a WRITE access. DM is sampled on both edges of DQS. Although DM pins are input only, the DM loading matches the DQ and DQS loading. For the x16, LDM corresponds to the data on DQ0>D7; UDM corresponds to the data on DQ8>DQ15. DM may be driven high, low, or floating during READs.

26,27 BA0, BA1 I Bank Address Inputs: BA0 and BA1 define to which bank an ACTIVE, READ,WRITE

or PRECHARGE command is being applied.

28-32,

35-42

A [0: 12] I Address Inputs: Provide the row address for ACTIVE commands, and the column

address and AUTO PRECHARGE bit for READ/WRITE commands, to select one location out of the memory array in the respective bank. A10 is sampled during a PRECHARGE command to determine whether the PRECHARGE applies to one bank (A10 LOW) or all banks (A10 HIGH). If only one bank is to be procreated, the bank is selected by BA0, BA1. The address inputs also provide the op-code during a MODE REGISTER SET command. BA0 and BA1 define which mode register is loaded during the MODE REGISTER SET command (MRS or EMRS).

2,4,5,7,

8,10, 11,13, 54,56, 57,59, 60,62,

63,65

DQ I/O Data Input/Output: Data bus.

16,51 LDQS,(U)DQS I/O Data Strobe: Output with read data, input with write data.

Edge-aligned with read data, centered in write data. Used to capture write data. For the x16, LDQS corresponds to the data on DQ0>D7; UDQS corresponds to

the data on DQ8>DQ15 14,17, 19,25, 43,50,

53,

NC - No Connect: No internal electrical connection is present.

3,9,15,

55,61

VDDQ - DQ Power Supply: +2.5V ± 0.2V. (+2.6V ± 0.1V for DDR400)

6,12,

52,58,

VSSQ - DQ Ground.

1,18,33, VDD - Power Supply: +2.5V ± 0.2V. (+2.6V ± 0.1V for DDR400)

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5. IC3503: RH-IXB754WJZZ

128Mb Flash Memory

34,48,66VSS - Ground.

49 VREF I SSTL_2 reference voltage.

Pin No. Pin Name I/O Pin Function

2-12,

15, 18-26, 54, 31

A0-A22 I 23 Address lnputs.

35,37,3 9,41,44

,46,48,

DQ0-DQ7 I/O 8 Data Inputs / Outputs.

3542,44-

DQ8-DQ14 I/O 7 Data Inputs / Outputs.

51 DQ15A-1 I Data Input/Output or Address Input. 32 CE

I Chip Enable.

34 OS

O Output Enable. 13 WE I Write Enable. 16 Vpp/WP

I Hardware Vpp/ Write Protect

14 RP

I Reset/Block Temporary Unprotect.

17 R/B

O Ready / Busy Output. 53 BYTE

I Byte/Word Organization Select.

43 VCC - Supply Voltage

33.52 VSS - Ground.

27,28,5

5,56

NC - Not Connected Internally.

29 VCCQ - Supply Voltage for Input/Output.

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6. IC3504: RH-IXB753WJZZ

16BIT D-TYPE LATCH.

Pin No. Pin Name I/O Pin Function

47,46,

44,

43,41,

40,

38,37

1D1-1D8 I Input Signal 1D1-1D8.

36,35,

33,

32,30,

29,

27,26

2D1-2D8 I Input Signal 2D1-2D8.

11OE

I Non_Output Enable Signal 1.

24 2OE

I Non_Output Enable Signal 2. 48 1LE I Latch Enable Signal 1. 25 2LE I Latch Enable Signal 2.

2,3,5,6

,9,11,1

1Q1-1Q8 O Latch Output Signal 1Q1-1Q8.

13,14,

16,

17,19,

20,

22,23

2Q1-2Q8 O Latch Output Signal 2Q1-2Q8.

7,18,3

VCC - Supply Voltage.

4,10,1

21,28,

34,

39,45

GND - Ground.

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7. IC3701: RH-IXB752WJZZ

Multistandard Sound Processor.

No. Pin Name

I/O Pin Function

NET_NAME 1 NC - Not Connected. N.C. 2 I2C_CL I/O I2C Clock. SCL5 3 I2C_DA I/O I2C Data. SDA5 4 I2S_CL I/O Sync. I2S Clock. N.C. 5 I2S_WS I/O Sync. I2S Word Strobe. N.C. 6 I2S_DA_OUT O Sync. I2S Data Output. N.C. 7 I2S_DA_IN1 I Sync. I2S Data Input 1. N.C. 8 I2S_DEL_IN I Sync. I2S Input From Delay Line. I2S_DEL_IN 9 I2S_DEL_OUT O Sync. I2S 0utput to Extemal Delay Line. I2S_DEL_OUT

10 I2S_DEL_CL O I2S Clock Output for External Delay. I2S_DEL_CL 11 I2S_DEL_WS O I2S Word Strobe Output for External Delay. I2S_DEL_WS 12 DVSUP - Digilal Power Supply. +5V 13 DVSUP - Digital Power Supply. +5V 14 DVSS - Digital Ground. GND 15 DVSS - Digital Ground. GND 16 DVSS - Digital Ground. GND 17 I2S_DA_IN2 I Sync. I2S Data lnput 2. N.C. 18 NC - Not Connected. N.C. 19 I2S_CL3 I/O Async. I2S Clock lnput/Sync. 12S Clock Output. N.C. 20 I2S_WS3 I/O Async. I2S Word Strobe lnput/Sync. 12S Word Strobe Output. N.C. 21 RESETQ I Power - On Reset (active low) RESET_A 22 I2S_DA_IN3 I Sync./Async. I2S Data Input3. N.C. 23 I2S_DA_IN4 I Sync.12S Data lnput 4. N.C. 24 DACA_R O Aux Output, Right. OPEN 25 DACA_L O Aux Output, Left. OPEN 26 VREF2 - Reference Ground 2. GND 27 DACM_R O Main Output, Right SPKOUTR 28 DACM_L O Main Output, Left. SPKOUTL 29 DACM_C O Main Output, Center. N.C. 30 DACM_SUB O Main Output, Subwoofer. N.C. 31 DACM_SR O Surround Output, Right. N.C. 32 DACM_SL O Surround Output, Left. N.C. 33 SC2_OUT_R O SCART 2 Output, Right. EXT2_OUT_R 34 SC2_OUT_L O SCART 2 Output, Left. EXT2_OUT_L 35 VREF 1 - Reference Ground 1. GND 36 SC1_OUT_R O SCART 1 Output, Right. EXT1_OUT_R 37 SC1_OUT_L O SCART 1 Output, Left. EXT1_OUT_L 38 CAPL_A - Volume Capacitor Aux. CAPL_A 39 AHVSUP I Analog Power Supply +8V. +8V 40 CAPL_M - Volume Capacitor Main. CAPL_M 41 SC3_OUT_R O SCART 3 Output, Right. N.C. 42 SC3_OUT_L O SCART 3 Output, Left. N.C. 43 AHVSS - Analog Ground. GND 44 AHVSS - Analog Ground. GND 45 AGNDC - Analog Reference Voltage. AGNDC 46 NC - Not Connected. N.C. 47 SC4_IN_L I SCART 4 Input, Left. EXT4_IN_L 48 SC4_IN_R I SCART 4 Input, Right. EXT4_IN_R 49 ASG - Analog Shield Ground. GND 50 SC3_IN_L I SCART 3 Input, Left. EXT3_IN_L 51 SC3_IN_R I SCART 3 Input, Right. EXT3_IN_R 52 ASG - Analog Shield Ground. GND 53 SC2_IN_L I SCART 2 Input, Left. EXT2_IN_L 54 SC2_IN_R I SCART 2 Input, Right. EXT2_IN_R 55 ASG - Analog Shield Ground. GND 56 SC1_IN_L I SCART 1 Input, Left. EXT1_IN_L 57 SC1_IN_R I SCART 1 Input, Right. EXT1_IN_R 58 VREFTOP - Reference Voltage IF A/D Converter. VREF TOP 59 SC5_IN_L/

MONO_IN

I SCART 5 Input, Left/SCART Mono lnput for PMQFP64-2. HDMI_A_IN_L

60 SC5_IN_R I SCART 5 Input, Right. HDMI_A_IN_R

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61 AVSS - Analog Ground for IF Part. GND 62 AVSS - Analog Ground for IF Part. GND 63 NC - Not Connected. N.C. 64 NC - Not Connected. N.C. 65 AVSUP - Analog Power Supply +5V. +5V 66 AVSUP - Analog Power Supply +5V. +5V 67 ANA_IN1 + I IF Input 1. SIF-IN 68 ANA_IN - I IF Common (can be Left vacant only if lF input 1 is not used) ANA-IN-

69 ANA_IN2 + I IF Input2 (can be left vacant only if lF input 1 is not used) ANA-IN2+

70 TESTEN - Test Pin (imust be connected to ground) GND 71 XTAL_IN I Crystal Oscillator Input. XTAL-IN 72 XTAL_OUT O Crystal Oscillator Output. XTAL-OUT 73 TP I Test Input. N.C. 74 AUD_CL_OUT O Audio Clock Output (18.432MHz) N.C. 75 NC - Not Connected. N.C. 76 SPDIF_OUT O S/PDIF Output. N.C. 77 DCTRI/O_1 I/O Digital Control Port 1. N.C. 78 DCTRI/O_0 I/O Digital Control Port 0. N.C. 79 ADR_SEL I I2C Address Select. GND 80 STANDBYQ - Standby (active low) +5V

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8. IC3301: FRC RH-IXB064WJ (FRC9429A)

FRAME RATE CONVERTER

Pin No. Pin Name I/O Pin Function

1 NC - No Connection 2 NC - Test, do not use 3 656I1/YIN1 I Digital (luminance) input 4 656I2/YIN2 I Digital (luminance) input 5 VIN I Vertical sync input 6 656I3/YIN3 I Digital (luminance) input 7 656I4/YIN4 I Digital (luminance) input 8 VDDP0 S Supply digital pad (3.3 V) 9 VSSP0 S Supply digital pad (0 V)

10 HIN I Horizontal sync input 11 656I5/YIN5 I Digital (luminance) input 12 656I6/YIN6 I Digital (luminance) input 13 656I7/YIN7 I Digital (luminance) input [MSB] 14 CLKIN I Clock input (max. 81.0 MHz) 15 VDDD0 S Supply digital pad (1.8 V) 16 VSSD0 S Supply digital pad (0 V) 17 AVI I Active video input 18 VDDAPLL S Supply analog PLL (1.8 V) 19 VSSAPLL S Supply analog PLL (0 V) 20 VSSD1 S Supply digital core (0 V) 21 VDDD10 S Supply digital core (1.8 V) 22 VDDD11 S Supply digital core (1.8 V) 23 XIN I Crystal connection 1 24 XOUT O Crystal connection 2 25 VSSP1 S Supply digital pad (0 V) 26 VDDP1 S Supply digital pad (3.3 V)

27 RGBOUT9 O

Tristate (SELOMODE=0) Digital (red: SELRB=0; blue: SELRB=1;) Output [MSB](SELOMODE=1)

28 RGBOUT8 O

Tristate (SELOMODE=0) Digital (red: SELRB=0; blue: SELRB=1;) Output (SELOMODE=1)

29 RGBOUT7 O

Tristate (SELOMODE=0) Digital (red: SELRB=0; blue: SELRB=1;) Output (SELOMODE=1)

30 RGBOUT6 O

Tristate (SELOMODE=0) Digital (red: SELRB=0; blue: SELRB=1;) Output (SELOMODE=1)

31 RGBOUT5 O

Tristate (SELOMODE=0) Digital (red: SELRB=0; blue: SELRB=1;) output (SELOMODE=1)

32 RGBOUT4 O

Tristate (SELOMODE=0) Digital (red: SELRB=0; blue: SELRB=1;) Output (SELOMODE=1)

33 AVO/ITR O

Active video output (CPUIRQ=0) Interrupt signal output from µC (CPUIRQ=1) Static 0 (CPUIRQ=2)

Static 1 (CPUIRQ=3) 34 VOUT O Vertical sync output 35 HOUT O Horizontal sync output.

(Synchronized to 40.5-81 MHz CLKOUTSEL72=1)

(Synchronized to 20.25-40.5 MHz

CLKOUTSEL72=0 and CLKOUTSEL=1)

(Synchronized to 15.1875-30.75 MHz

CLKOUTSEL72=0 and CLKOUTSEL=0) 36 CLKOUT O Output clock disabled (CLKOUTON=0)

Output clock (max. 81 MHz) (CLKOUT=1)

(40.5-81 MHz CLKOUT72=1

20.25-40.5 MHz CLKOUT72=0 and CLKOUTSEL=1

1515.1875-30.37 MHz CLKOUT72=0 and

CLKOUTSEL=0) 37 VSSP2 S Supply digital pad (0 V) 38 VDDP2 S Supply digital pad (3.3 V) 39 RESET I Reset input

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40 RGBOUT3 O

Tristate (SELOMODE=0)

Digital (red: SELRB=0; blue: SELRB=1;)

Output (SELOMODE=1)

41 RGBOUT2 O

Tristate (SELOMODE=0)

Digital (red: SELRB=0; blue: SELRB=1;)

Output (SELOMODE=1)

42 RGBOUT1 O

Tristate (SELOMODE=0)

Digital (red: SELRB=0; blue: SELRB=1;)

Output (SELOMODE=1)

43 RGBOUT0 O

Tristate (SELOMODE=0)

Digital (red: SELRB=0; blue: SELRB=1;)

Output [LSB] (SELOMODE=1)

44 YOUT9 O

Tristate (ENITUE=0)

Digital (luminance/green) output [MSB] (ENITUE=1)

45 YOUT8 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1)

46 YOUT7 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1) 47 VDDD2 S Supply digital core (1.8 V) 48 VSSD2 S Supply digital core (0 V) 49 VDDP3 S Supply digital pad (3.3 V) 50 VSSP3 S Supply digital pad (0 V) 51 NC - No Connection

52 YOUT6 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1)

53 YOUT5 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1) 54 VSSP4 S Supply digital pad (0 V)

55 YOUT4 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1) 56 VDDP4 S Supply digital pad (3.3 V)

57 YOUT3 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1)

58 YOUT2 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1)

59 YOUT1 O

Tristate (ENITUE=0)

Digital (luminance/green) output (ENITUE=1)

60 YOUT0 O

Tristate (ENITUE=0)

Digital (luminance/green) output [LSB] (ENITUE=1)

61 CLKF20 O

Output clock 20.25 MHz disabled (CLKF20ON=0)

Output clock 20.25 MHz enabled (CLKF20ON=1)

62 UVOUT9 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output [MSB] (ENITUE=1and SELRB=0)

Digital (chrominance/red) output [MSB] (ENITUE=1and SELRB=1) 63 VSSD30 S Supply digital core (0 V) 64 VSSD31 S Supply digital core (0 V) 65 VDDD30 S Supply digital core (1.8 V) 66 VDDD31 S Supply digital core (1.8 V)

67 UVOUT8 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1)

68 UVOUT7 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1) 69 VSSP50 S Supply digital pad (0 V) 70 VSSP51 S Supply digital pad (0 V) 71 VSSP52 S Supply digital pad (0 V) 72 VDDP5 S Supply digital pad (3.3 V)

73 UVOUT6 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1) 74 NC - No Connection 75 NC - No Connection

76 UVOUT5 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1) 77 NC - No Connection

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78 UVOUT4/

INTR

O Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1)

Interrupt signal output from µC (CPUIRQ=5)

Static 0 (CPUIRQ=6)

Static 1 (CPUIRQ=7) 79 VDDP6 S Supply digital pad (3.3 V) 80 VSSP6 S Supply digital pad (0 V)

81 UVOUT3 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1)

82 UVOUT2 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1)

83 UVOUT1 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1)

84 UVOUT0 O

Tristate (ENITUE=0)

Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)

Digital (chrominance/red) output (ENITUE=1 and SELRB=1) 85 VDDD4 S Supply digital core (1.8 V) 86 VSSD4 S Supply digital core (0 V) 87 VDDA0 S Supply analog DAC SVM (3.3 V)

88 ASVMOUT O

Middle level (STANDBY=1)

Analog SVM output (ACTFBL=0 and STANDBY=1)

Analog SVM output (control by SVMOFF possible)

(ACTFBL=1 and STANDBY=0) 89 VSSA0 S Supply analog DAC SVM (0 V) 90 VDDA1 S Supply analog DAC B/U (3.3 V)

91 AUOUT O

Middle level (STANDBY=0)

Chrominance output (STANBY=1) 92 VSSA1 S Supply analog DAC B/U (0 V) 93 VDDA2 S Supply analog DAC G/Y (3.3 V)

94 AYOUT O

Middle level (STANDBY=0)

Luminance output (STANDBY=1) 95 VSSA2 S Supply analog DAC G/Y (0 V) 96 VDDA3 S Supply analog DAC R/V (3.3 V)

97 AVOUT O

Middle level (STANDBY=0)

Chrominance output (STANDBY=1) 98 VSSA3 S Supply analog DAC R/V (0 V) 99 VSSA4 S Supply analog band gap (0 V)

100 VDDA4 S Supply analog band gap (3.3 V) 101 VSSD5 S Supply digital core (0 V) 102 VDDD5 S Supply digital core (1.8 V) 103 NC - No Connection 104 NC - No Connection 105 SCL I/O I2C bus clock 106 SDA I/O I2C bus data 107 NC - No Connection 108 NC - No Connection 109 VSSP7 S Supply digital pad (0 V)

110 VDDP7 S Supply digital pad (3.3 V) 111 TMS I Test mode select (3.3 V) 112 NC - No Connection

113

TDO/ SVMOFF

O/I

Test data out (ACTSVMOFF=1)

SVM input signal (ACTSVMOFF=0)

114 TDI I Test data in (0V) 115 TCLK I Test clock (3.3 V)

116 I NTR O

Interrupt signal

Static 0 (CPUIRQ2=00)

Static 1 (CPUIRQ2=01)

Interrupt signal output from µC (CPUIRQ2= 1x)

117 656I02 I Digital (luminance) input [LSB] 118 656I12 I Digital (luminance) input

119 656I22 I Digital (luminance) input 120 656I32 I Digital (luminance) input 121 656I42 I Digital (luminance) input 122 656I52 I Digital (luminance) input

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123 656I62 I Digital (luminance) input 124 656I72 I Digital (luminance) input 125 CLKIN2 I Clock input [max. 81.0 MHz] 126 UVIN0 I Digital (chrominance) input [LSB] 127 UVIN1 I Digital (chrominance) input 128 UVIN2 I Digital (chrominance) input 129 UVIN3 I Digital (chrominance) input 130 VSSP8 S Supply digital core (0 V) 131 VDDP8 S Supply digital core (3.3 V) 132 VDD8M S Supply memory (1.8 V) 133 VSSD60 S Supply digital core (0 V) 134 VSSD61 S Supply digital core (0 V) 135 VDDD60 S Supply digital core (1.8V) 136 VDDD61 S Supply digital core (1.8 V) 137 UVIN4 I Digital (chrominance) input 138 UVIN5 I Digital (chrominance) input 139 UVIN6 I Digital (chrominance) input 140 UVIN7 I Digital (chrominance) input [MSB] 141 NC - No Connection 142 656I0/YIN0 I Digital (luminance) input [LSB] 143 VSSP9 S Supply digital pad (0 V) 144 VDDP9 S Supply digital pad (3.3 V)

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9. IC1710: RH-IXB946WJZZ

FPGA

Pin No. Pin Name I/O Pin Function Sheet name

1 EXP[8] O REG2 light control system identify REG2 2 EXP[9] O REG external sync identify REG 3 EXP[10] O QS parameter TEMP3 4 EXP[11] O QS parameter TEMP2 5 EXP[12] O QS parameter TEMP1 6 EXP[13] O QS parameter QSSET 7 EXP[14] O LED SLEEP (ON at "L") LEDSLP 8 EXP[15] O LED OPC (ON at "L") LEDOPC

9 VCCIO1 3.3V - Power supply 3.3V 3.3V 10 GND - Ground GND 11 GND - Ground GND 12 PCLK I Panel clock 74.25MHz PCLK 13 VCCINT 3.3V - Power supply 3.3V 3.3V 14 I/O - GND* NC 15 I/O - GND* NC 16 I/O - GND* NC 17 OSCOUT O Light control clock output (No lamp light-up at initial “L”) OSCOUT 18 I/O - GND* NC 19 OFLOUT O Light control PWM output (No lamp light-up at initial “L”) OFL1OUT 20 OFL2OUT O Light control PWM output OFL2OUT 21 I/O - GND* NC 22 (TMS) I Inline Program JTAG TMS/ OPEN TMS 23 (TDI) I Inline Program JTAG DataIn/ OPEN TDI 24 (TCK) I Inline Program JTAG Clock/ OPEN TCK 25 (TDO) O Inline Program JTAG DataOut/ OPEN TDO 26 I/O O Write mode Vpp-cont NC 27 I/O - GND* NC 28 I/O - GND* NC 29 I/O - GND* NC 30 I/O - GND* NC 31 VCCIO1 3.3V - Power supply 3.3V 3.3V 32 GND - Ground GND 33 I/O - GND* NC 34 EXP[16] O MSP FRC Reset Note 2 RESET_A 35 EXP[17] O DTU-CVBS/ (S-VY⋅CVBS) switching G_ONSYNC 36 EXP[18] O DTV/PC/HDMI switching DTVPC 37 EXP[19] O DTV/PC/HDMI switching DTVHDMI 38 EXP[20] O E2PROM WP for HDMI HDMI_WP 39 EXP[21] O Panel flip horizontal LCDLR 40 EXP[22] O Panel flip vertical LCDUD 41 EXP[23] O Panel 50/60Hz FRAME 42 I/O - GND* NC 43 I/O - GND* NC 44 I/O - GND* NC 45 VCCIO1 3.3V - Power supply 3.3V 3.3V 46 GND - Ground GND 47 EXP[24] O Common Bias Adjustment write Protect. TCON_WP 48 EXP[25] O Not used NC 49 EXP[26] O Chage shear impulse on/off. CSI 50 EXP[27] O S+8V Control Signal S+8V-CTL 51 EXP[28] O Memory Bank Select. BANK 52 EXP[29] O Not used NC 53 EXP[30] O Not used NC 54 EXP[31] O Not used NC 55 I/O - GND* NC 56 - GND* NC 57 I/O - GND* NC 58 I/O - GND* NC 59 VCCIO2 3.3V - Power supply 3.3V 3.3V 60 GND - Ground GND 61 I/O - GND* NC 62 GCLR I VGC_Reset_Line RESET_N

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63 VCCINT 3.3V - Power supply 3.3V 3.3V 64 SCK I from VGC SCK 65 GND - Ground GND 66 SEN I from VGC FPGA_SDE 67 SDAI I from VGC FPGA_SDA 68 I/O - GND* NC 69 SDAO O Write mode RESET output FPGA_SDAO 70 I/O - GND* NC 71 I/O - GND* NC 72 I/O - GND* NC 73 I/O - GND* NC 74 I/O - GND* NC 75 OFL2EN I OFL2_EN external setting terminal GND 76 I/O - GND* NC 77 I/O O VGC write Open drain (Write mode at "H") BOOT 78 I/O - GND* NC 79 GND - Ground GND 80 VCCIO2 3.3V - Power supply 3.3V 3.3V 81 I/O I VSYNC_OSC VSYNC 82 I/O I HSYNC_OSC HSYNC 83 I/O - GND* NC 84 I/O - GND* NC 85 EXP[0] O DTI2CSEL DTI2CSEL 86 EXP[1] O DTM_RESET DTM_RESET 87 EXP[2] O DTU_ON (Analog tuner at "L" D-tuner at "H") DTU_ON 88 EXP[3] O 232C on/off SW (RS232C action at "H": VGC write enabled) IREM_SW 89 EXP[4] O STB (LAMP ON) STB 90 EXP[5] O S2_MUTE S2MUTE 91 EXP[6] O ANT+5V ON ANT+5V ON 92 EXP[7] O S_MUTE S-MUTE 93 GND - Ground GND 94 VCCIO2 3.3V - Power supply 3.3V 3.3V 95 I/O - GND* NC 96 I/O - GND* NC 97 I/O - GND* NC 98 I/O - GND* TP1703 99 I/O - GND* NC

100 OFL-SET-IN I OFLWD[8] external setting terminal GND

GND*: Non-configured pins are fixed at GND. Terminals' electrical characteristics are referred to in the EPM240T100C5N data sheet of Altera.

Note 1: Reset output monitor terminal with EXP31 in use. Note 2: Composed of GCLR and OR.

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10. IC1712: VHIMP1410ES-1

Step Down Converter.

11. IC1706: VHIMP1583++-1

Step Down Converter

Pin No. Pin Name I/O Pin Function

1 BS I High-Side Gate Drive Boost input.

BS supplies the drive for the high-side n-channel MOSFET switch. Connect a 10nF or greater capacitor from SW to BS to power the high-side switch.

2 IN I Power input.

IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.75V to 15V power source. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. See input Capacitor.

3 SW O Power Switching Output.

SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load.

Note that a capacitor is required from SW to BS to power the high-side switch. 4 GND - Ground. 5 FB I Feedback input.

FB senses the output voltage to regulate that voltage.

Drive FB with a resistive voltage divider from the output voltage.

The feedback threshold is 1.22V.

See Setting the Output Voltage. 6 COMP - Compensation Node.

COMP is used to compensate the regulation control loop.

Connect a series RC network from COMP to GND to compensate the regulation control loop.

See Compensation. 7 EN I Enable input.

EN is a digital input that turns the regulator on or off.

Drive EN high to turn on the regulator, drive it low to turn it off.

For automatic startup, leave EN unconnected. 8 N/C - No Connect.

Pin No. Pin Name I/O Pin Function

1 BS I High-Side Gate Drive Boost lnput.

BS supplies the drive for the high-side n-channel MOSFET Switch.

Connect a 4.7nF or greater capacitor from SW to BS to power the high side switch. 2 IN I Power input.

IN supplies the power to the IC, as well as the step-down converter switches.

Drive IN with a 4.75V to 23V power source.

Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC.

See Input Capacitor. 3 SW O Power Switching Output.

SW is the switching node that supplies power to the output.

Connect the output LC filter from SW to the output load.

Note that a capacitor is required from SW to BS to power the high-side switch. 4 GND - Ground. (Note: Connect the exposed pad on backside to Pin4). 5 FB I Feedback input.

FB senses the output voltage to regulate that voltage.

Drive FB with a resistive voltage divider from the output voltage.

The feedback threshold is 1.222V.

See Setting the Output Voltage. 6 COMP I Compensation Node.

COMP is used to compensate the regulation control loop.

Connect a series RC network from COMP to GND to compensate the regulation control loop.

In same cases, an additional capacitor from COMP to GND is required.

See Compensation. 7 EN I Enable input

EN is a digital input that turns the regulator on or off.

Drive EN high to turn on the regulator, drive it low to tum it off.

For automatic startup, leave EN unconnected. 8 SS I Soft Start Control input.

SS controls the soft start period.

Connect a capacitor from SS to GND to set the soft-start period.

A 0.1µF capacitor sets the soft-start period to l0ms

To disable the soft-start featur CIeave SS unconnected.

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12. IC301/302: VHITDA8931T-1

SOUND AMP

13. IC4001: RH-IXB680WJZZ

DIGITAL-PROCESSOR

Pin No. Pin Name I/O Pin Function

1 VSSD - negative digital supply voltage; heat spreader 2 VSSA - Negative analogue supply voltage. 3 INN I inverting input. 4 INP I non inverting input. 5 VDDA - positive analog supply voltage. 6 POWERUP I power-up input. 7 ENABLE I enable input. 8 DIAG O diagnostic output. 9 CGND - control ground; reference ground for pins POWERUP, ENABLE and DIAG.

10 VSSD - negative digital supply voltage; heat spreader. 11 VSSD - negative digital supply voltage; heat spreader. 12 OVP I overvoltage protection reference input. 13 HVP O half supply voltage output for charging SE capacitor. 14 STABI I decoupling of internal stabilizer. 15 VSSP - negative power supply voltage. 16 OUT O PWM output. 17 BOOT I bootstrap capacitor connection. 18 VDDP - positive power supply voltage. 19 HVPI I half supply voltage output for reference voltage of input circuitry. 20 VSSD - negative digital supply voltage; heat spreader.

Pin No.

Pin Name

I/O Pin Function NET

NAME A8,B8,B19,B20,C8, D8,F1-F4,U23,U24,

V1-V4,AA23-AA26, AC7,AC15,AD7, AD15,AE7,AE15,AF7,AF15

VDD - 1.8 V power supply P1.8V

B22,C3,C4,C10,D3,D4,D10, E4,G25,M1M4,W23,W24,AC3,AC4,AC1 0,AC13,AC19,AC23,AC24,A D3,AD4,AD10,AD13,AD19,A D23, AD24

VDD3 - 3.3 V power supply P3.3V

AD6 RTCVDD - Low power controller 1.8 V power supply P1.8V B13,B21,D25,K10-K17,L10L17,M10-M17,N10-

N17,P10-P17,R10-R17,T10T17,U10-U17

GND - Ground for power supplies GND

C4 Others Typical load, but the maximum is 75 pF. S8 SDRAM/EMI Typical load, but the maximum is 75 pF. S8b SDRAM/EMI Typical load, but the maximum is 75 pF. E8 EMI (programmable) Typical load, but the maximum is 75 pF. P4 PIO Typical load, but the maximum is 75 pF. AE11 VDDVDACRGB - 3.3 V power supply for RGB video DAC VDDDAC AE9 VDDVDACYCC - 3.3 V power supply for YCC video DAC VDDDAC AD11 GNDVDACRGB - Ground for RGB video DAC GNDDAC AD9 GNDVDACYCC - Ground for YCC video DAC GNDDAC AD8 SHIELDVDAC - Shield ground for 2 x video DACs GND A AE10 IREFDACRGB - RGB video DAC current reference YOUT AE8 IREFDACYCC - YCC video DAC current reference AC9 VREFDACRGB - RGB video DAC voltage reference AC8 VREFDACYCC - YCC video DAC voltage reference A10 VDDVPLL - 3.3 V power for video PLL VDDPLL C13 VDDAUDIOFSYN - 1.8 V dedicated power for low jitter audio clock frequency synthe-

sizer VDDF3 B12 GNDAUDIOFSYN - Dedicated ground for low jitter audio clock frequency synthesizer GNDF3 C12 VDDGENFSYN - 1.8 V dedicated power for nonaudio clock frequency synthesizer VDDF3 B11 GNDGENFSYN - Dedicated ground for nonaudio clock frequency synthesizer GNDF3

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AA4 VDDAADAC - 3.3 V power for audio DAC VDDADC

AA2 VSSAADAC - Ground for audio DAC command switches GNDA-

DAC

Y4 VDDASADAC - 3.3 V power for audio DAC substrate VDDA-

DAC AB2 VCCAADAC - 3.3 V power for audio DAC command switches VDDA AB3 GNDAADAC - Ground for audio DAC GNDA-

DAC AC2 VCCASADAC - 3.3 V power for audio DAC command switches

substrate VDDA AD2 IREF I Audio DAC output reference current AE2 VBGFIL I Audio DAC filtered output reference voltage VBGFIL AF4 LPCLKIN I Low power clock input (1.8 V tolerant) CLOCK

IN AF5 LPCLKOSC I/O Low power clock oscillator (1.8 V tolerant) CLOCK A16 NO32XTAL1 I Select for 32 kHz clock source

0: XTAL, 1: Internal divider TCK

A13 CLK27MA I Selectable input clock to PLL or for x1 mode (5 V tolerant) CLK27MH

Z A11 CLKSPEEDSEL I PLL speed select (5 V tolerant) A12 AUXCLKOUT O Auxiliary clock for general use (5 V tolerant) AF6 notRESET I System reset (1.8 V tolerant) SYSRE-

SET AD14 notWDOGRSTOUT O Internal watchdog timer reset (5 V tolerant) AE14 TDI I Boundary scan test data input (5 V tolerant) TDI AC14 TMS I Boundary scan test mode select (5 V tolerant) TMS AF16 TCK I Boundary scan test clock (5 V tolerant) TCK AF14 notTRST I Boundary scan test logic reset (5 V tolerant) NOT-

TRST AE13 TDO O Boundary scan test data output (5 V tolerant) TDO P1 DCUTRIGGERIN I External trigger input to DCU (5 V tolerant) TRIGIN P3 DCUTRIGGEROUT O Signal to trigger external debug circuitry (5 V tolerant) TRIGOUT C23 TSIN2LBYTECLK I/O Transport stream bit clock (5 V tolerant) TS2CLK C22 TSIN2LBYTECLKVA

LID

I/O Transport stream bit clock valid edge (5 V tolerant) TS2VAL

B23 TSIN2LERROR I/O Transport stream packet error (5 V tolerant) D19 TSIN2LPACKETCLK I/O Transport stream packet strobe (5 V tolerant) TS2STRT B18,C18,D18,C19,C20,D20,

C21,D21

TSIN2LDATA[7:0] I/O Transport stream data (5 V tolerant) TS2D[7:0]

P23 TSIN1BYTECLK I Transport stream bit/byte clock (5 V tolerant) FECLK M24 TSIN1BYTECLKVALI

I Transport stream bit/byte clock valid edge (5 V tolerant) FEVALID

M26 TSIN1ERROR I Transport stream packet error (5 V tolerant) FEER-

ROR N26 TSIN1PACKETCLK I Transport stream packet strobe (5 V tolerant) FES-

TROUT K26,J25,H24,J24,L26,L25,L 24,M23

TSIN1DATA[7:0] I Transport stream data in (5 V tolerant) FED[7:0]

L3 notEMIRAS or

notCI_IORD1

O Row address strobe for SDRAM EMIRAS

K1 not_EMICAS or

not_CI_IOW1

O Column address strobe for SDRAM EMICAS

J1 notEMICSA O Peripheral chip select A EMICSO K3 notEMICSB O Peripheral chip select B K2 notEMICSC O Peripheral chip select C N4 notEMICSD O Peripheral chip select D EMICS3 J2 notEMICSE O Peripheral chip select E L2 notEMICSF O Peripheral chip select F EMICS5 L1, N3 notEMIBE[1:0] O External device data bus byte enable. 1 bit per byte of the data bus. EMIBE1,

EMIRAS N1 notEMIOE or

not_CI_OE

O External device output enable. EMIOE

N2 notEMILBA or

notCI_Wea

O Flash device load burst address. EMILBA

P4 EMIWAITnot-

TREADY

I External memory device target ready indicator (5 V tolerant) CPUWAIT

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P2 EMIRDnotWR O External read/write access indicator. Common to all devices. EMIRW H3,H2,G2,H4,G4,E2,E1,E3,

H1,D1,D2,C2,G3,C1,B1,A1

EMIDATA[15:0] I/O External common data bus. EMID[15-

0] D5,C5,D6,B3,A2,B2,A3,B4,

A4,C6,B5,A5,D7,C7,B6,A6, B7,A7,D9,C9,B9,A9,B10,C1 1

EMIADDR[25:2] O External common address bus EMIA[23-

(D5,C5=N

C) J3 notEMIREQGNT O Bus request/grant indicator NC K4 notEMIACKREQ I Bus grant/request indicator (5 V tolerant) L4 EMIBOOTMODE0 I External power-up port size indicator (5 V tolerant) G1 EMISDRAMCLK O SDRAM clock EMICLK J4 EMIFLASHCLK O Peripheral clock NC W1,U4,U2,U1,R2,R1,T2,T1 PIO0[7:0] I/O Parallel input/output pin or alternative function (5 V tolerant)

(U1:MUTE,R2:VIDEOOFF,R1:MDMRESET,T2:FERESET,T1:CIRESET)

AB4,Y2,AA1,Y1,W3,U3,W2,W4PIO1[7:0] I/O (W2:TVRX,W4:TVTX)

AF3,AD5,AE3,AE5,AF2,Y3, AA3,AF1

PIO2[7:0] I/O (AF3:ASPECT,AD5:IRQ,AA3:GPIO1,AF1:GPIO0)

AE18,AE4,AC16,AC12,AE6, AC11,AC5,AE12

PIO3[7:0] I/O (AE6:TVSCL,AC11:TVSDA,AC5:I2CSCL,AE12:I2CSDA)

AE20,AD20,AF20,AE19,AC 17,AD18,AD17,AF19

PIO4[7:0] I/O (AE20:27MHzPWM,)

AC22,AF22,AD21,AC21,AE 21,AC18,AC20,AF21,

PIO5[7:0] I/O (AD21:RXD,AC21:TXD,AF21:IR)

AF17 SCLK O Serial clock (5 V tolerant) NC AE17 PCMDATA1 O PCM data out (5 V tolerant) NC AE16 PCMCLK I/O External PCM clock input or internal PCM clock output (5 V tolerant) NC AF18 LRCLK O Left/right clock (5 V tolerant) TL4027 AD16 SPDIF O Digital audio output (5 V tolerant) SPDIF AD26,AB25,AB24,AC25,AE 26,AB23,AE25,AF26,AD25, AF25,AE24,AF24,AF23,AE2

SMIADDR[13:0] O SDRAM address bus SMIA[13-

U26,U25,R23,V26,V25,T23, V24,V23,W26,W25,Y25,Y26 ,Y23,AB26,Y24,AC26

SMIDATA[15:0] I/O SDRAM data bus SMID[15-

T24 notSMICS0 O SDRAM chip select for 1st SDRAM SMICS T25 notSMICS1 O SDRAM chip select for 2nd 16 Mbit SDRAM T26 notSMICAS O SDRAM column address strobe SMICAS R24 notSMIRAS O SDRAM row address strobe SMIRAS R25 notSMIWE O SDRAM write enable SMIWE P26 SMIMEMCLKIN I SDRAM memory clock input R26 SMIMEMCLKOUT O SDRAM memory clock output SMICLK P24 SMIDATAML O SDRAM data bus lower byte enable SMIDQML P25 SMIDATAMU O SDRAM data bus upper byte enable SMIDQMI B15,A15,D16,C16,B16,B17,

C17,D17

P1284DATA[7:0] I/O 1284 AV data (5 V tolerant) NC

C15 notP1284SELECTIN I/O 1284 AV control signals (5 V tolerant) NC D15 notP1284INIT I/O NC A14 notP1284FAULT I/O NC B14 notP1284AUTOFD I/O NC C14 P1284SELECT I/O NC D14 P1284PERROR I/O NC D13 P1284BUSY I/O NC D12 notP1284ACK I/O NC D11 notP1284STROBE I/O NC T4, R4, T3,R3 INTERRUPT[3:0] I/O External interrupts (5 V tolerant) MODEMI

RQ,

TL4003,

CIIRQ1,

CIIRQ0 AE1 OUTPLEFT O Left channel, differential positive current output LEFTP AC1 OUTMLEFT O Left channel, differential negative current output LEFTM AD1 OUTPRIGHT O Right channel, differential positive current output RIGHTP AB1 OUTMRIGHT O Right channel, differential negative current output RIGHTM AF12 ROUT O Red output R

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AF11 GOUT O Green output G AF13 BOUT O Blue output B AF8 COUT O Chroma output COUT AF9 CVOUT O Composite video output CVBS AF10 YOUT O Luma output YOUT AD22 notHSYNC I/O Horizontal sync (5 V tolerant) NC AE22 EVENnotODD I/O Vertical sync (5 V tolerant) TL4016

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14. IC4201/4202: RH-IXB742WJZZQ

64Mb- SDRAM

15. IC4203: RH-IXB921WJZZ

16Mbit Flash Memory

Pin No. Pin Name I/O Pin Function

38 CLK I Active on the positive going edge to sample all inputs.

19 CS

Disables or enables device operation by masking or enabling all inputs except CLK,CKE and DQM.

37 CKE I

Masks system clock to freeze operation from the next clock cycle. CKE should be enabled at least one cycle prior to new command. Disable input buffers for power down in standby.

22-26,

29-35

A0-A11 I

Row/column addresses are multiplexed on the same pins. Row address: RA0-RA11, Column address: CA0-CA8

20, 21 BA0-BA1 I

Selects bank to be activated during row address latch time. Selects bank for read/write during column address latch time.

18 RAS

Latches row address on the positive going edge of the CLK with RAS

low.

Eanbles row access <FmSdata>[amp ] precharge.

17 CAS

Latches column addresses on the positive going edge of the CLK with CAS

low.

Enables column access.

16 WE

Enables write operation and row precharge. Latches data in starting from CAS

, WE active.

15,39 DQM I/O

Makes data output Hi-Z, tsHZ after the clock and masks the output. Blocks data input when DQM active.

2,4,5,7,8,10,11,13,42,44,45,

47,48,50,51,53

DQ0-X15 I/O

Data input/output are mutiplexed on the same pins (X16;DQ0-15)

1,14,27,28,41,54 VDD/VSS --- Power and ground for the input buffers and the core logic.

3,6,9,12,43,46,49,52, VDDQ/VSSQ ---

Lsolated power supply and ground for the output buffers to provide improved noise immunity.

40 N.C/RFU --- This pin is recommended to be left No Connection on the device.

Pin No. Pin Name I/O Pin Function

1-10,

16-25,

48,13

A2-A22 I 22 Address Input.

29,31,33,35,38,40,42,44 DQ0-DQ7 I/O 8 Data Input/Output.

30,32,34,

36,39,41,43

DQ8-DQ14 I/O Data Input/Output.

45 DQ15A-1 I/O Data Input/Output or Address Input. 26 E

I Chip Enable.

28 G

O Output Enable

11 W

I Write Enable.

12 RP

I Reset/Block Temporary Unprotect

15 RB

O Read/Busy Output.

47 BYTE

I Byte/Word Organization Select.

37 Vcc - Supply Voltage.

27,46 Vss - Ground.

N.C. - Not Connected Internally.

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16. IC4402: VHILCX573FT-1Y

Lutch 3-State output

17. IC4401: VHITCLCX245-2Y

Interactive Balance Tranceiver

18. IC4404: VHILCX244FT-1Y

Buffer/Line Driver

Pin No. Pin Name I/O Pin Function

1OE

I Output Enable. 2 D0 I Data Input D0. 3 D1 I Data Input D1. 4 D2 I Data Input D2. 5 D3 I Data Input D3. 6 D4 I Data Input D4. 7 D5 I Data Input D5. 8 D6 I Data Input D6. 9 D7 I Data Input D7.

10 GND - Ground. 11 LE I Limited Enable. 12 Q7 O Data Output Q7. 13 Q6 O Data Output Q6. 14 Q5 O Data Output Q5. 15 Q4 O Data Output Q4. 16 Q3 O Data Output Q3. 17 Q2 O Data Output Q2. 18 Q1 O Data Output Q1. 19 Q0 O Data Output Q0. 20 VCC - Power Source.

Pin No. Pin Name I/O Pin Function

1 DIR I Directory. 2 A1 I/O A-Bus. Output/Input Terminal A1. 3 A2 I/O A-Bus. Output/Input Terminal A2. 4 A3 I/O A-Bus. Output/Input Terminal A3. 5 A4 I/O A-Bus. Output/Input Terminal A4. 6 A5 I/O A-Bus. Output/Input Terminal A5. 7 A6 I/O A-Bus. Output/Input Terminal A6. 8 A7 I/O A-Bus. Output/Input Terminal A7. 9 A8 I/O A-Bus. Output/Input Terminal A8.

10 GND - Ground A9 11 B8 I/O B-Bus Input/Output Terminal B8. 12 B7 I/O B-Bus Input/Output Terminal B7. 13 B6 I/O B-Bus Input/Output Terminal B6. 14 B5 I/O B-Bus Input/Output Terminal B5 15 B4 I/O B-Bus Input/Output Terminal B4 16 B3 I/O B-Bus Input/Output Terminal B3 17 B2 I/O B-Bus Input/Output Terminal B2 18 B1 I/O B-Bus Input/Output Terminal B1 19 OE

I Output enable.

20 VCC - Power Source.

Pin No. Pin Name I/O Pin Function

1, 19 10E

, 20E I Output Enable Input 1 and 2 2, 4, 6, 8, 11, 13, 15, 17 1A1-1A4, 2A1-2A4 I Data Inputs 9, 7, 5, 3, 12, 14, 16, 18 1Y1-1Y4, 2Y1-2Y4 O Data Outputs

10 GND - Ground. 20 VCC - Power Source.

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19. IC4604: VHITSH73CPT-1Y

*3-OP-AMP

Pin No. Pin Name I/O Pin Function

1STB1

I Standby Input Terminal1.

2STB2

I Standby Input Terminal2.

3STB3

I Standby Input Terminal3. 4 VCC - Power Source. 5 +IN1 I Non Inverting Input1. 6 -IN1 I Invreting Input1. 7 OUT1 O Output1. 8 OUT2 O Output2. 9 -IN2 I Inverting Input2.

10 +IN2 I Non Inverting Input2. 11 VCC - Power Source. 12 +IN3 I Non Inverting Input3. 13 -IN3 I Inverting Input3. 14 OUT3 O Out put3.

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20. IC202: RH-IXB682WJZZQ

CDFDM DEMODURATOR

Pin No. Pin Name I/O Pin Function

12 RESET

I Hardware reset, active low.

62 XTALI I Crystal oscillator input/external clock (1.8V). 63 XTALO O Crystal oscillator output. 61 VCCXTAL1.8 - Analog oscillator supply (1.8V) 64 GNDXTAL - Analog oscilltor ground.

2 DVCCA1.8 - Analog part digital supply (1.8V) 5 REFM I Internal negative reference. 6 REFP I Internal positive reference. 3 VCCA1.8 - Analog supply (1.8V). 9 INM I Negative analog input.

10 INP I Positive analog input.

4,11 GNDA - Analog ground.

1 DGNDA - Analog ground. 7 VR I Reference. 8 VCCA3.3 - Analog supply (3.3V)

21 SDA I/O Serial data (open drain) 20 SCL I Serial clock (open drain) 19 SDAT I/O SDA tuner (open drain) 18 SCLT I

25,26,27,29,31,32,33,34 D7/0 O Serial D7,MPEG data.

36 CLK_OUT O MPEG byte or bit clock. 23 STR_OUT O MPEG first byte sync. 38 D/P

O MPEG data valid/parity. 40 ERROR O MPEG packet error. 51 HFECO O Hierarchical FEC output bit 0. 50 CCLK/HFC1 O Hierarchical FEC output bit 1 or clock for constellation display. 49 CDATA/HFC2 O Hierarchical FEC output bit 2 or data for constellation display. 48 CIQ/HFEC3 O Hierarchical FEC output bit 3 or IQ validation for constellation display. 16 AGC1 I/O

RF AGC control

14 AGC2 I/O

IF AGC control

17,60 TEST - Reserved test mode, must be ground.

58 IP0 I General-purpose input port0 and ADC input for RF level monitoring 45 OP0 I/O General-purpose output port0 43 LOCK/OP1 I/O General-purpose output port1 or lock indicator. 42 LOCK/OP2 O general-purpose output port2 or lock indicator. 47 AUX_CLK I/O Auxiliary clock. 55 CS0 I Chip select LSB. 53 CS1 I Chip select MSB.

13,28,39,57 VDD - Digital core supply. 22,35,44,52 VDD_3.3 - Digital IO supply.

15,24,30,37,41,46,54,56,59 GND -

1. All input are 3.3V compatible

2. All bidirectional pads 3.3V capable

3. All output are 3.3V capable.

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CHAPTER 6. BLOCK DIAGRAM/WIRING DIAGRAM

[1] OVERALL WIRING DIAGRAM

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OVERALL WIRING DIAGRAM

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[2] BLOCK DIAGRAM

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BLOCK DIAGRAM

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[3] POWER BLOCK DIAGRAM

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POWER BLOCK DIAGRAM

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CHAPTER 7. PRINTED WIRING BOARD

[1] KEY UNIT PRINTED WIRING BOARD

D155

S157

P151

S153

S151

D151

R151

R152

S152

S154

D152

R153

S155

123456789

KEY Unit (Component Side) KEY Unit (Chip Parts Side)

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[2] R/C, LED UNIT PRINTED WIRING BOARD

P101

C107

RMC101

SLD101

R132

R101

D101

IC101

C104

C102

R135

C105 R136

R117

Q105

Q104

R138

R102

D103

R110 R105

R137 R108

Q103

R109

Q102

R106 R104 R107

R123

D114

Q106

R121

R126

D113

Q107

R124

R111

R112

D115

R122

R114

R127

R113

C106

J101

R115

123456789

R/C, LED Unit (Component Side) R/C, LED Unit (Chip Parts Side)

Page 94

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[3] MAIN UNIT PRINTED WIRING BOARD

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MAIN Unit (Side A)

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MAIN Unit (Side A Chip)

R3038

RJ1901

RJ1902

C1901

C1902

C1903

C1904

C1909

Q1909

R3055

R3056

R3057

C1910

R3058

C1911

R3059

Q1910

R3060

R3061R3062

R3063

R3068

C1922

C1923

C1924

C1925

D1901

D1902

C1926

D1903

C1927

C1929

R1901

R1902

D1907

R1903

D1908

R1904

D1909

R1906

R1909

IC1901

IC1902

C1932

C1934

D1910

D1911

C1935

IC1905

D1912

C1937

D1913

C1939

C1941

C1942

C2307

C1943

C2308

C1944

C2309

Q2305

C1945

C1946

Q2307

C1947

R1920

C1948

R1921 R1922 R1923

C2310

R1924 R1925

R1926

R1927

R1928

R1929

C1951

C1952

C1953

C2318

C1954

C1955

C2702

C2703

C1957

C2704

C2705

C2706

R1932

R1933

C2707

C2708

Q2704

R1934

R1935

Q2705

C2709

R1938

C1961

R1939

D2301

D2302

D2303

D2304

D2305

R2301

D2306

D2307

C2714

D2308

R1940

D2309

R2307

R1945

IC2303

D2310D2311 D2312

D2313

C2720

C1976

C1977

D2701

D2705

R2706

R2707

R2709

R2326

R2329

R2711

R2712

R2713

FL1901

R2716

FL1902

R2332

R2333

R2335

C3301

C3302

C3303

C3305

C3306

C3307

RJ3701

RJ3702

RJ3703

RJ3704

C3501

RJ3705

C3503

C3310

C3505

FB3001

C3312

C3507

C3314

C3701

C3319

C3702

C3704

C3510

C3705

C3706

C3707

R2358

C3708

R2359

C3709

D3301

C3327

R2360

C3710

C3328

C3711

C3329

R2362

C3712

R3302

C3713

R2363

R3303

R2364

R2365

R3305

R2366

R3306

R3307

R3308

C3330

FL2301

C3331

C3525

R2752

FL2302

C3332

C3526

R2753

FL2303

C3333

C3527

C3334

C3335C3336

C3337

R3503

C3338

C3720

R3310

R3504

C3339

C3721

C3722

R3312

R3506

R3313

C3723

C3724

C3530

R3315

C3725

IC3501

R3316

C3726

R3317

C3340

R3318

C3341

R3319

R3701

C3342

C3343

R3703

R3704

R3510

R3705

C3539

R3706

R3320

R3321

R3709

IC3702

R3519

C3737

R3710

R2771

C3739

R3711

C3547

R3520

C3548

R3717

C3740

R3718

R3524

R3719

R3720 R3721

R3722

R3723

C3557

C3558

X1901

R3726

R3532

R3727

R3728

R3729

R3536

R3730

R3731

R3732

C3566

R3735

R3541

R3736

R3542

R3737

FB1703

R3543

R3739

LUG1701

LUG1702

LUG1705

LUG1706

LUG1707

R3740

FB1901

FB1902

R3743

FB1903

R3744

R3550

R3745

R3746

FB1906

R3747

R1807

R3748

R3749

R3750

R1810

SC1901 SC1902

R3567

R3571

L1901

L1902

L1903

L1904

L1905

L1906

L1907

L1908

R3583

R3588

FB2301

FB2302

FB2305

FB2306

FB2307

FB2308

R3593

FB2703

FB2705

FB2706

FB2707

FB2708

FB2709

RJ3006

RJ3007

RJ3009

FB2710

C3001

SC2702 SC2703

C3007

SC2705

D3001

R3003

R3005

R3008

X3701

IC3001

FB3301 FB3302

FB3303

FB3304

FB3305FB3306

TH3001

C3044

FB3701

S3001

FB3702

FB3703

Page 97

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      

R3030

R3038

C1702

C1703

C1704

Q1703

R3045

R3046

Q1706

R3047

R3048

R3049

R3050

R3051

C1715

R3052

C1716

R3053

R3055

R3056

R3057

R3058

R3059

C1720

C1721

R3060

R3061R3062

C1727

R3063

R1700

D1705

P2302

D1706

P2303

D1707

P2304

R3069

R1709

IC1701

IC1702

C1733

IC1704

C1735

R1713

IC1710

IC1711

P2702

C1744

C1746

C1747

R1720

C2306

R1728

C1753

R1731 R1736 R1738

R1739

C1763

RJ2714

C1765

C1766

RJ2716

R1740

C2327

R1749

C1772

C1773

C1774

R2304

C1775

R2305

C1776

C1777 C1778

C2332

C1780

C1782

R2313

C2726

C2730

C2731

C2732

C2733

R2330

R2334

RJ3502

R2337

R1783 R1784

R2726

C3501

RJ3705

C3503

Q3501

C3505

Q3502

C3507

Q3503 Q3504

C3510

C3511

C3513

C3515

C3516

LUG1710

C3522

C3523

C3524

D3501

C3525

R2752

C3526

R2753

C3527

FL2304

FL2305

R3502

FL2306

R2757

FL2307

FL2308

R3505

FL2309

R3507

R3508

C3530

IC3501

C3532

IC3503

FL2310

IC3505

FL2311

FL2312

C3537

FL2313

IC3507

FL2314

FL2315

C3539

R3513

R3514

R3515

IC3702

R3516

C3540

C3737

R2771

C3739

C3545C3546C3547C3548

C3549

R3521

R3522

R3523

C3740

R3524

S3501

R3525

C3550

R3528

C3551

R3529

C3557

C3558

R3530

C3559

R3531

R3535R3536

R3537

R3538

R3539

C3561

C3562

C3564

C3565

C3566

R3540

R3543

R3739

R3546

FB1706

R3547

LUG1703

LUG1704

R3549

LUG1708

LUG1709

R3745

R3552

R3553

R3555

R3556

SC1701 SC1702

R1811

R1814

R3564

R3565

R3566

R3567

R3568

L1701

L1702

L1703

R3575

R3582

R3583

R3588

FB2303

R3593

R3594

R1849

P3001

R3597

FB2310

R3598

R3599

R1850

R1852

SC2302

FB2703

R1859

R1860

RJ3009

R1862

FB2715

FB2716

SC2703 SC2704

SC2705 SC2707

L2701

L2702

IC3002

R3018

FB3502

TH3003

P1701

P1702

FB3702

R3028

R3029

RJ1703

Page 98

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MAIN Unit (Side B)

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MAIN Unit (Side B-Chip)

R3031

R3032

R3033

R3035

R3036

R3037

C1701

R3040

R3041

C1705

Q1701

Q1702

C1706

C1707

C1708

Q1704

C1709

C1710

C1711

C1712

C1713

C1714

C1717

C1718

C1719

C1722

C1723

C1724

D1701

C1725

C1726

D1702

D1703

D1704

C1728

R1701

C1729

R3065

R1702

R3066

R1703

R3067

D1708

R1704

D1709

R1705

R1706

R1707

C1730

R1708

C1731

C1732

IC1703

R3070

C1734

IC1705

C1736

IC1706

D1713

IC1707

C1737

R1710

IC1708

C1738

D1714

D1715

IC1709R1711

C1739

D1716

R1712

RJ2303 RJ2304

R1715

RJ2305

R1716

RJ2306

R1717

RJ2307

C1740

R1718

RJ2308

R1719

C1741

RJ2309

IC1712

C1742

C1743

C1745

C1748

RJ2310

R1721

C1749

RJ2311

R1722

RJ2312

R1723

RJ2313

R1724

RJ2314

R1725

RJ2315

R1726

Q2302

RJ2316

R1727

Q2303

RJ2317

C1750

C1751

R1729

RJ2701

C1752

RJ2702

RJ2703

Q2308

C1754

RJ2704

Q2309

C1755

RJ2705

C1756

RJ2706

C1757

RJ2707

C1758

R1730

RJ2708

C1759

RJ2709

R1732

R1733

R1734

R1735

Q2312

Q2313

R1737

Q2314

C1760

RJ2710

Q2315

C1761

RJ2711

C1762

RJ2712

RJ2713

C1764

C1767

C1768

C1769

R1741

C2322

R1742

C2323

R1743

C2324

R1744

C2325

R1745

Q2709

C2326

R1746

R1747

C1770

R1748

C1771

R2302

Q2710

R2306

C2330

R2308

R1750

C1779

C2331

R2309

R1751

R1752

R1753

C2333

R1754

C2334

R1755

C2335

R1756

C2336

R1757

C2337

R1758

R1759

R2311

D2317

C1783

D2318

C1784

D2319

C2725

R2317

R1760

R2318

R1761

R2319

R1762

R2702

R1763

D2707

D2708

R1764

R1765

R1766

R1767

R1768

R2320

R1769

R2321

IC2701

C2734

R1770

R1771

C2739

R1772

R1773

R1774

R1775

X3001

R1776

R1777

R1778

R1779

R2331

RJ3501

R1780

R2339

R1781

R1782

R1785

R1786

R1787 R1788

R2341

R1789

R2342

R2343

C3502

C3504

R1790 R1791

R1792

C3506

FB3002

R1793

R1794

C3508

FB3004

R1795

FB3005

C3509

R1796

R2736

FB3006

R1797

FB3007

R1798

FB3008

R1799

FB3009

C3512

C3514

FB3010

C3517

C3518

FB3014

C3519

C3520

C3521

C3528

R3501

C3529

R2371

R2372

R2374

C3531

R2376

IC3502

C3533

IC3504

C3535

IC3506

C3536

C3538

R3512

R3518

C3735

C3736

C3543

C3738

C3544

R2775

C3741

C3742

R3526

R3527

R2396

C3552

R2397

C3553 C3554

R2399

C3555

C3556

R3534

C3560

C3563

C3567

C3568

FB1701

C3569

FB1702

FB1704

R3544

FB1705

R3545

FB1707

R3548

R1800

R1801

R1802

R1803

R1804

R1805

R1806

R3554

R3557

R3558 R3559

R3560

R3562

R3563

R3569

R3570

R1831 R1832 R1833 R1834

R3580

R1835

R3581

R1836 R1837 R1838

R1839

R3589

R1840

R1842

R3590

R1845R1846

R1847

R2400

R1848

R2401

R3595

R2402

R2403

R2406

R1851

R1853

R1854

FB2701

FB2702

R1856

R1857

R2410

R1858

RJ3001

RJ3002

R2414

RJ3004

R2415

RJ3005

R2416R2417

RJ3008

R1861

FB2713

FB2714

C3002

C3003

C3004

C3006

Q3002

C3008

C3009

Q3005

C3010

C3011

C3012

C3013

C3014

C3015

C3016

C3017

C3018

C3019

C3020

C3021

C3022

C3023

C3024

C3025

C3026

C3027

C3028

R3001

C3029

R3002

R3006

R3007

C3030

R3009

C3031

C3032

IC3003

C3033

IC3004

C3034

IC3005

C3035

C3036

C3037

C3038

R3010

R3011

C3039

C3040

FB3501

R3019

C3041

C3042

C3043

FB3503

C3045

C3046

C3047

C3048

R3020

C3049

R3023

R3024

R3025

R3026 R3027

C3050

FB3704 FB3705

RJ1701

RJ1702