Sharp LC-32LE340E, LC-40LE340RU, LC-40LE340E, LC-32LE340EV, LC-40LE343E Service Manual

...
LC-32LE340/343 LC-40LE340/343
SERVICE MANUAL
LED LCD COLOUR TELEVISION
160mm
125mm
100mm
80mm
63mm
50mm
Corporate Trademark
DVB-T / DVB-C (HDTV), PAL
B/G, I / SECAM B/G, D/K, L/L’ SYSTEM COLOUR TELEVISION
1st Edition
In the interests of user safety (required by safety regulations in some countries) the set should be re­stored to its original condition and only parts identical
to those specied should be used.
CONTENTS
TABLE OF CONTENTS ....................................................................................................................... 2
ELECTRICAL SPECIFICATIONS ....................................................................................................... 4
IMPORTANT SERVICE SAFETY PRECAUTIONS ................................................................................ 6
OPERATION MANUAL ........................................................................................................................... 9
DIMENSIONS ..................................................................................................................................... 18
INTRODUCTION .................................................................................................................................. 20
CIRCUIT DESCRIPTIONS .................................................................................................................. 22
SOFTWARE UPDATE ............................................................................................................................ 67
TROUBLESHOOTING ..................................................................................................................... 68
SERVICE MENU SETTINGS ........................................................................................................... 75
GENERAL BLOCK DIAGRAM ......................................................................................................... 81
SCHEMATIC DIAGRAMAS ........................................................................................................ 84
PRINTED WIRING BOARD .................................................................................................101
REPLACEMENT PARTS LISTING ...............................................................................................103
Issued: 22Th March 2012
MODEL
LC-32LE340E LC-40LE340E
LC-32LE340EV LC-40LE340EV
LC-32LE340RU LC-40LE340RU
LC-32LE343E LC-40LE343E
This document has been published to
be used for after sales service only. The contents are subject to change without notice.
LCD COLOUR TELEVISION OPERATION MANUAL
ENGLISH
LCD TELEVIZOR U BOJI KORISNIČKI PRIRUČNIK
HRVATSKI
BAREVNÝ LCD TELEVIZOR NÁVOD K POUŽITÍ
CZECH
LC-32LE340E
17MB70 CHASSIS
SHARP CORPORATION
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LC-32LE340/343 LC-40LE340/343
TABLE OF CONTENTS
i SPECIFICATIONS ....................................................................................................................... 4
ii IMPORTANT SERVICE SAFETY PRECAUTIONS ..................................................................... 6
iii OPERATION MANUAL .............................................................................................................. 9
iv DIMENSIONS ............................................................................................................................ 18
1. INTRODUCTION ........................................................................................................................ 20
2. TUNER ...................................................................................................................................... 22
3. AUDIO AMPLIFIER STAGES ..................................................................................................... 24
A.. MAIN AMPLIFIER .......................................................................................................... 24
B. LINE-OUT and HEAD-PHONE AMPLIFIER STAGE (CS3813N) .................................. 27
C. SUBWOOFER AMPLIFIER STAGE ( TPA3112) ........................................................ 28
4. POWER STAGE ......................................................................................................................... 30
5. MICROCONTROLLER ( Broadcom ) ........................................................................................ 37
6. VIDEO BACK-END PROCESSOR (Trident) ............................................................................. 40
7. FPGA (Spartan-3E) ................................................................................................................... 41
8. 1Gb F-die DDR2-1066 SDRAM (U41-U42-U8-U9) .................................................................... 43
9. 32M x 16 bit DDRII Synchronous DRAM ( U28-U29) ................................................................ 45
10. 4Gbit NAND Flash Memory (U35) ............................................................................................. 47
11. 128Mbit NAND Flas Memory (U17) ............................................................................................ 49
12. USB Interface ............................................................................................................................. 51
13. CI Interface ................................................................................................................................. 51
14. DVB-C/T2 Demodulator .............................................................................................................. 52
15. LOW POWER & CEC MICROCONTROLLER .......................................................................... 59
16. HDMI SWITCH ......................................................................................................................... 60
17. LNB Supply ans control IC ......................................................................................................... 66
18. SOFTWARE UPDATE ............................................................................................................... 67
19. TROUBLESHOOTING ............................................................................................................... 68
A. No Backlight Problem ...............................................................................
...................... 68
B. CI Module Problem ......................................................................................................... 70
C. Staying in Stand-by Mode ............................................................................................. 71
D. IR Problem ..................................................................................................................... 72
E. Keypad Touchpad Problems .......................................................................................... 72
F. USB Problems ................................................................................................................ 73
G. No sound Problem ......................................................................................................... 73
H. Standby On/Off Problem ............................................................................................... 73
I. No Signal Problem .......................................................................................................... 74
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20. SERVICE MENU SETTING ........................................................................................................ 75
21. GENERAL BLOCK DIAGRAM .................................................................................................... 81
22. OVERALL WIRING DIAGRAM ................................................................................................... 82
23. SCHEMATIC DIAGRAMS ........................................................................................................... 84
24. PRINTED WIRING BOARD ....................................................................................................... 101
25. REPLACEMENT PARTS LISTING ............................................................................................ 103
26. CABINET MECHANICAL PARTS LISTING ............................................................................... 135
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ELECTRICAL SPECIFICATIONS
Cautions regarding use in high and low temperature environments
When the unit is used in a low temperature space (e.g. room, offi ce), the picture may leave trails or appear slightly delayed. This is not a malfunc­tion, and the unit will recover when the temperature returns to normal.
Do not leave the unit in a hot or cold location. Also, do not leave the unit in a location exposed to direct sunlight or near a heater, as this may cause the cabinet to deform and the LCD panel to malfunction. Storage temperature: –20°C to +60°C
.
Specifications
As a part of our policy of continuous im­provement, SHARP reserves the right to make design and specifi cation changes for product improvement without prior notice. The performance specifi cation fi g­ures indicated are nominal values of pro­duction units. There may be some devia­tions from these values in individual unit
s.
Environmental Specifications
*1 On-Mode (W) (HOME MODE)
*2 Energy-Save-Mode (W) ECO
*3 Standby-Mode (W)
*4 Off Mode (W)
*5 Annual Energy Consumption (kWh)
*6 Annual Energy Consumption Energy-Save-Mode (kWh)
ECO
Item
24” LCD COLOUR TV, Model: LC-24LE210E,
LC-24LE220E
32” LCD COLOUR TV, Model: LC-32LE210E, LC-32LE220E,
LC-32LB220E, LC-32LS220E
LCD Panel
24" BLACK TFT LCD LED TV 32” BLACK TFT LCD LED TV
Resolution 6.220.800 dots (1.920 x 1.080 pixels)
Video Colour System PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60
TV
Func- tions
TV Standard Analogue CCIR (B/G, I, D/K, L/L’)
Digital DVB-T (2K/8K OFDM)(H.264), DVB-C (Only Lx220)
Receiving Channel
VHF/UHF E2–E69 ch, F2–F10 ch, I21–I69 ch, IR A–IR J ch (Digital: IR A ch–E69 ch)
CATV Hyper-band, S1–S41 ch
TV-Tuning System Auto Preset 999 ch: non-Nordic / 9999 ch: Nordic (ATV: 99 ch), Auto Label, Auto Sort
STEREO / BILINGUAL NICAM/A2
Viewing angles H: 176°, V: 176°
Audio Amplifier
Speaker (25 mm x 100 mm) x 2 (30 mm x 100 mm) x 2
Terminals
TV Antenna UHF/VHF 75 Din type (Analogue & Digital)
SERVICE Ø 3.5 mm jack
SCART SCART (AV input, RGB input, TV output, Y/C input)
PC INPUT VGA (D-Sub 15pin), Ø 3.5mm jack
COMPONENTS COMPONENT IN: Y/PB(CB)/PR(CR), RCA (AUDIO R/L)
HDMI1 HDMI, Ø 3.5mm jack
HDMI2 HDMI, Ø 3.5mm jack
HDMI3 HDMI, Ø 3.5mm jack
AV RCA connector (AV input)
MEDIA PLAYER/ TIME-SHIFT/ USB REC
USB 2.0 HOST (A type)
DIGITAL AUDIO OUTPUT RCA S/PDIF digital audio output.
C. I. (Common Interface) EN50221, R206001, CI+ speci
cation (Only Lx220)
Headphones Ø 3.5 mm jack (Audio output)
OSD language
Czech, Danish, Dutch, English, Estonian, Finnish, French, German, Greek, Hungarian, Italian, Latvian, Lithuanian, Norwegian, Polish, Portuguese, Russian, Slovak, Slovene, Spanish, Swedish, Turkish, Ukrainian, Byelorussian, Romanian.
Power Requirement AC 220–240 V, 50 Hz
Power Consumption (IEC62087 Method) 30W (0.25 W Standby) 85W (0.25 W Standby)
Weight 4,9 Kg (Without stand), 6 Kg (With stand) 8,5 Kg (Without stand), 9,8 Kg (With stand)
Operating Temperature 0 °C to +40 °C
*1 Measured according to IEC 62087 Ed. 2. *2 For further information about the Energy Save function,
please see related pages in this operation manual.
*3 Measured according to IEC 62301 Ed. 1. *4 Measured according to IEC 62301 Ed. 1. *5 Annual energy consumption is calculated on the basis
of the On-Mode (HOME MODE) power consumption, watching TV 4 hours a day, 365 days a year.
*6 Annual energy consumption is calculated on the basis of
the Energy-Save-Mode power consumption, watching TV 4 hours a day, 365 days a year.
32”
63 W
48 W
0.25 W
0.18 W
92 kWh
71 kWh
LCD COLOUR TV, Model:
LC-32LE210E, LC-32LB220E, LC-32LE220E, LC-32LS220E.
32” TFT LCD LED TV
10 W x 2
(30 mm x 100 mm) x 2
85 W (0.25 W (Standby)
8,5 Kg (Without stand), 9,8 Kg (With stand)
ELECTRICAL SPECIFICATIONS
LC-32LE340E/EV/RU LC32LE343E Specications
Specifi cations
TV BROADCASTING
PAL/SECAM B/G D/K K’ I/I’ L/L’
RECEIVING CHANNELS
VHF (BAND I/III)
UHF (BAND U)
HYPERBAND
NUMBER OF PRESET CHANNELS
10.000
CHANNEL INDICATOR
On Screen Display
RF AERIAL INPUT
75 Ohm (unbalanced)
OPERATING VOLTAGE
220-240V AC, 50 Hz.
AUDIO OUTPUT POWER (W
RMS.
) (10% THD)
2 x 8
POWER CONSUMPTION (W)
135 W (max)
< 0,5 W (Standby)
PANEL
16:9 display, 32” (80 cm) Screen Size
DIMENSIONS (mm)
DxLxH (With foot): 205,5 x 772,91 x 521,90
Weight (Kg): 10,85
DxLxH (Without foot): 39 x 772,91 x 489,68
Weight (Kg): 9,30
Digital Reception (DVB-T)
Transmission Standards:
DVB-T, MPEG2,DVB-T, MPEG4 HD
i. DEMODULATION
-Symbol rate: COFDM with 2K/8K FFT mode.
-Modulation: 16-QAM - 64-QAM FEC for all DVB modes (automatically found)
MHEG-5 ENGINE compliant with ISO/IEC 13522-5 UK engine Profi le (UK only)
Object carousel support compliant with ISO/IEC 135818-6 and UK DTT profi le(UK only)
Frequency range: 474-850 MHz for UK models
ii. VIDEO
-H.264 (MPEG-4 part 10) main and high profi le level
4.1/MPEG-2 MP@HL video decoder.
-HD display multi format capable (1080i, 720p, 576p)
-CVBS analogue output.(In HD channels, this will not be available
iii. AUDIO
-MPEG-1 layer I/II, MPEG-2 layer II, AAC, HEAAC, AC3, E-AC3
-Sampling frequencies supported are 32, 44.1 & 48 kHz
Digital Reception (DVB-C)
Transmission Standards:
DVB-C, MPEG2, DVB-C, MPEG4
i. DEMODULATION
-Symbolrate: 4.0 Msymbols/s to 7.2 Msymbols/s
- Modulation: 16-QAM , 32-QAM ,64-QAM, 128-QAM and 256-QAM
ii. VIDEO
- All MPEG2 MP@ML formats with up-conversion and fi ltering to CCIR601 format.
-CVBS analogue output
iii. AUDIO
-All MPEG1 Layer 1 and 2 modes
-Sampling frequencies supported are 32, 44.1 & 48 kHz.
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LC-40LE340E/EV/RU LC40LE343E Specications
ELECTRICAL SPECIFICATIONS
Cautions regarding use in high and low temperature environments
When the unit is used in a low temperature space (e.g. room, offi ce), the picture may leave trails or appear slightly delayed. This is not a malfunc­tion, and the unit will recover when the temperature returns to normal.
Do not leave the unit in a hot or cold location. Also, do not leave the unit in a location exposed to direct sunlight or near a heater, as this may cause the cabinet to deform and the LCD panel to malfunction. Storage temperature: –20°C to +60°C
.
Specifications
As a part of our policy of continuous im­provement, SHARP reserves the right to make design and specifi cation changes for product improvement without prior notice. The performance specifi cation fi g­ures indicated are nominal values of pro­duction units. There may be some devia­tions from these values in individual unit
s.
Environmental Specifications
*1 On-Mode (W) (HOME MODE)
*2 Energy-Save-Mode (W) ECO
*3 Standby-Mode (W)
*4 Off Mode (W)
*5 Annual Energy Consumption (kWh)
*6 Annual Energy Consumption Energy-Save-Mode (kWh)
ECO
Item
24” LCD COLOUR TV, Model: LC-24LE210E,
LC-24LE220E
32” LCD COLOUR TV, Model: LC-32LE210E, LC-32LE220E,
LC-32LB220E, LC-32LS220E
LCD Panel
24" BLACK TFT LCD LED TV 32” BLACK TFT LCD LED TV
Resolution 6.220.800 dots (1.920 x 1.080 pixels)
Video Colour System PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60
TV
Func- tions
TV Standard Analogue CCIR (B/G, I, D/K, L/L’)
Digital DVB-T (2K/8K OFDM)(H.264), DVB-C (Only Lx220)
Receiving Channel
VHF/UHF E2–E69 ch, F2–F10 ch, I21–I69 ch, IR A–IR J ch (Digital: IR A ch–E69 ch)
CATV Hyper-band, S1–S41 ch
TV-Tuning System Auto Preset 999 ch: non-Nordic / 9999 ch: Nordic (ATV: 99 ch), Auto Label, Auto Sort
STEREO / BILINGUAL NICAM/A2
Viewing angles H: 176°, V: 176°
Audio Amplifier
Speaker (25 mm x 100 mm) x 2 (30 mm x 100 mm) x 2
Terminals
TV Antenna UHF/VHF 75 Din type (Analogue & Digital)
SERVICE Ø 3.5 mm jack
SCART SCART (AV input, RGB input, TV output, Y/C input)
PC INPUT VGA (D-Sub 15pin), Ø 3.5mm jack
COMPONENTS COMPONENT IN: Y/PB(CB)/PR(CR), RCA (AUDIO R/L)
HDMI1 HDMI, Ø 3.5mm jack
HDMI2 HDMI, Ø 3.5mm jack
HDMI3 HDMI, Ø 3.5mm jack
AV RCA connector (AV input)
MEDIA PLAYER/ TIME-SHIFT/ USB REC
USB 2.0 HOST (A type)
DIGITAL AUDIO OUTPUT RCA S/PDIF digital audio output.
C. I. (Common Interface) EN50221, R206001, CI+ speci
cation (Only Lx220)
Headphones Ø 3.5 mm jack (Audio output)
OSD language
Czech, Danish, Dutch, English, Estonian, Finnish, French, German, Greek, Hungarian, Italian, Latvian, Lithuanian, Norwegian, Polish, Portuguese, Russian, Slovak, Slovene, Spanish, Swedish, Turkish, Ukrainian, Byelorussian, Romanian.
Power Requirement AC 220–240 V, 50 Hz
Power Consumption (IEC62087 Method) 30W (0.25 W Standby) 85W (0.25 W Standby)
Weight 4,9 Kg (Without stand), 6 Kg (With stand) 8,5 Kg (Without stand), 9,8 Kg (With stand)
Operating Temperature 0 °C to +40 °C
*1 Measured according to IEC 62087 Ed. 2. *2 For further information about the Energy Save function,
please see related pages in this operation manual.
*3 Measured according to IEC 62301 Ed. 1. *4 Measured according to IEC 62301 Ed. 1. *5 Annual energy consumption is calculated on the basis
of the On-Mode (HOME MODE) power consumption, watching TV 4 hours a day, 365 days a year.
*6 Annual energy consumption is calculated on the basis of
the Energy-Save-Mode power consumption, watching TV 4 hours a day, 365 days a year.
32”
63 W
48 W
0.25 W
0.18 W
92 kWh
71 kWh
LCD COLOUR TV, Model:
LC-32LE210E, LC-32LB220E, LC-32LE220E, LC-32LS220E.
32” TFT LCD LED TV
10 W x 2
(30 mm x 100 mm) x 2
85 W (0.25 W (Standby)
8,5 Kg (Without stand), 9,8 Kg (With stand)
Specifi cations
TV BROADCASTING
PAL/SECAM B/G D/K K’ I/I’ L/L’
RECEIVING CHANNELS
VHF (BAND I/III)
UHF (BAND U)
HYPERBAND
NUMBER OF PRESET CHANNELS
10.000
CHANNEL INDICATOR
On Screen Display
RF AERIAL INPUT
75 Ohm (unbalanced)
OPERATING VOLTAGE
220-240V AC, 50 Hz.
AUDIO OUTPUT POWER (W
RMS.
) (10% THD)
2 x 8
POWER CONSUMPTION (W)
150 W (max)
< 0,5 W (Standby)
PANEL
16:9 display, 40” (102 cm) Screen Size
DIMENSIONS (mm)
DxLxH (With foot): 232 x 959,2 x 626,8
Weight (Kg): 16,75
DxLxH (Without foot): 40 x 959,2 x 592,9
Weight (Kg): 13,90
Digital Reception (DVB-T)
Transmission Standards:
DVB-T, MPEG2,DVB-T, MPEG4 HD
i. DEMODULATION
-Symbol rate: COFDM with 2K/8K FFT mode.
-Modulation: 16-QAM - 64-QAM FEC for all DVB modes (automatically found)
MHEG-5 ENGINE compliant with ISO/IEC 13522-5 UK engine Profi le (UK only)
Object carousel support compliant with ISO/IEC 135818-6 and UK DTT profi le(UK only)
Frequency range: 474-850 MHz for UK models
ii. VIDEO
-H.264 (MPEG-4 part 10) main and high profi le level
4.1/MPEG-2 MP@HL video decoder.
-HD display multi format capable (1080i, 720p, 576p)
-CVBS analogue output.(In HD channels, this will not be available
iii. AUDIO
-MPEG-1 layer I/II, MPEG-2 layer II, AAC, HEAAC, AC3, E-AC3
-Sampling frequencies supported are 32, 44.1 & 48 kHz
Digital Reception (DVB-C)
Transmission Standards:
DVB-C, MPEG2, DVB-C, MPEG4
i. DEMODULATION
-Symbolrate: 4.0 Msymbols/s to 7.2 Msymbols/s
- Modulation: 16-QAM , 32-QAM ,64-QAM, 128-QAM and 256-QAM
ii. VIDEO
- All MPEG2 MP@ML formats with up-conversion and fi ltering to CCIR601 format.
-CVBS analogue output
iii. AUDIO
-All MPEG1 Layer 1 and 2 modes
-Sampling frequencies supported are 32, 44.1 & 48 kHz.
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TO EXPOSED METAL PARTS
CONNECT TO KNOWN EARTH GROUND
DVM
AC SCALE
1.5k ohm 10W
0.15 µF
TEST PROBE
SAFETY NOTICE
Many electrical and mechanical parts in LCD television have special safety-related characteristics.
These characteristics are often not evident from visual inspection, nor can protection afforded by them be necessarily
increased by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identied in this manual; electrical components having such features are identied by “ “.
For continued protection, replacement parts must be identical to those used in the original circuit.
The use of a substitute replacement parts which do not have the same safety characteristics as the factory recommended
replacement parts shown in this service manual, may create shock, re or other hazards.
IMPORTANT SERVICE SAFETY PRECAUTION
Service work should be performed only by qualied service technicians who are thoroughly familiar with all safety checks and the servicing guidelines which follow:
WARNING
1. For continued safety, no modication of any circuit should be attempted.
2. Disconnect AC power before servicing.
BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard)
Before returning the receiver to the user, perform the following safety checks:
1. Inspect all lead dress to make certain that leads are not pinched, and check that hardware is not lodged between the chassis and other metal parts in the receiver.
2. Inspect all protective devices such as non-metallic control knobs, insulation materials, cabinet backs, adjustment and compartment covers or shields, isolation resistor-capacitor networks, mechanical insulators, etc.
3. To be sure that no shock hazard exists, check for leakage current in the following manner.
• Plug the AC cord directly into a 220~240 volt AC outlet. (Do not use an isolation transformer for this test).
•Using two clip leads, connect a 1.5k ohm, 10 watt resistor paralleled by a 0.15µF capacitor in series with all exposed metal cabinet parts and a known earth ground, such as electrical conduit or electrical ground connected to an earth ground.
•A true RMS reading multimeter should be used for this test, especially where the equipment uses a switch mode power supply which may result in very non-sinusoidal leakage current.
•Connect the resistor connection to all exposed metal parts having a return to the chassis (antenna, metal cabinet, screw heads, knobs and control shafts, escutcheon, etc.) and measure the AC voltage drop across the resistor.
All checks must be repeated with the AC cord plug connection reversed. (If necessary, a nonpolarized adaptor plug must be used only for the purpose of completing these checks.) Any reading of 1.05V peak (this corresponds to 0.7 mA. peak AC.) or more is excessive and indicates a potential shock hazard which must be corrected before returning the monitor to the owner.
!
CAUTION: FOR CONTINUED PROTECTION AGAINST A RISK OF FIRE REPLACE ONLY WITH SAME TYPE
F100, F101 (T 3.15A L250V)
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PRECAUTIONS FOR USING LEAD-FREE SOLDER
1 Using lead-free wire solder
When xing the PWB soldered with the lead-free solder, apply lead-free wire solder. Repairing with conventional lead wire solder may cause damage or accident due to cracks. As the melting point of lead-free solder (Sn-Ag-Cu) is higher than the lead wire solder by 40°C, we recommend you to
use a dedicated soldering bit, if you are not familiar with how to obtain lead-free wire solder or soldering bit, contact our
service station or service branch in your area.
2 Soldering
As the melting point of lead-free solder (Sn-Ag-Cu) is about 220°C which is higher than the conventional lead solder by 40°C, and as it has poor solder wettability, you may be apt to keep the soldering bit in contact with the PWB for extended period of time. However, Since the land may be peeled off or the maximum heat-resistance temperature of parts may be exceeded, remove the bit from the PWB as soon as you conrm the steady soldering condition. Lead-free solder contains more tin, and the end of the soldering bit may be easily corroded. Make sure to turn on and off the power of the bit as required. If a different type of solder stays on the tip of the soldering bit, it is alloyed with lead-free solder. Clean the bit after every use of it. When the tip of the soldering bit is blackened during use, le it with steel wool or ne sandpaper.
Be careful when replacing parts with polarity indication on the PWB silk.
Lead-free wire solder for servicing.
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END OF LIFE DISPOSAL
A. Information on Disposal for Users (private households)
1. In the European Union
Attention: If you want to dispose of this equipment, please do not use the ordinary dust bin!
Used electrical and electronic equipment must be treated separately and in accordance with legislation that requires proper treatment, recovery and recycling of used electrical and electronic equipment. Following the implementation by member states, private households within the EU states may return their used electrical and electronic equipment to designated collection facilities free of charge*. In some countries* your local retailer may also take back your old product free of charge if you purchase a similar new one. *) Please contact your local authority for further details.
If your used electrical or electronic equipment has batteries or accumulators, please dispose of these separately beforehand according to local requirements.
By disposing of this product correctly you will help ensure that the waste undergoes the necessary treatment, recovery and recycling and thus prevent potential negative effects on the environment and human health which could otherwise arise due to inappropriate waste handling.
2. In other Countries outside the EU
If you wish to discard this product, please contact your local authorities and ask for the correct method of disposal.
For Switzerland: Used electrical or electronic equipment can be returned free of charge to the dealer, even if you don’t purchase a new product. Further collection facilities are listed on the homepage of www.swico.ch or www.sens.ch.
B. Information on Disposal for Business Users
1. In the European Union
If the product is used for business purposes and you want to discard it:
Please contact your SHARP dealer who will inform you about the take-back of the product. You might be charged for the costs arising from take-back and recycling. Small products (and small amounts) might be taken back by your local collection facilities.
For Spain: Please contact the established collection system or your local authority for take-back of your used products.
2. In other Countries outside the EU
If you wish to discard of this product, please contact your local authorities and ask for the correct method of disposal.
Attention: Your product is marked with this symbol. It means that used electrical and electronic products should not be mixed with general household waste. There is a separate collection system for these products.
End of life disposal
The battery supplied with this product contains traces of Lead.
For EU: The crossed-out wheeled bin implies that used batteries should not be put to the general household waste! There is a separate collection system for used batteries, to allow proper treatment and recycling in accordance with legislation. Please contact your local authority for details on the collection and recycling schemes.
For Switzerland: The used battery is to be returned to the selling point.
For other non-EU countries: Please contact your local authority for correct method of disposal of the used battery.
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OPERATION MANUAL
Remote Control Buttons
Acti1. vate Portal mode (*) Play (in Media Browser mode) 2. Programme recording3. Fast rewind (in Media Browser mode)4. No function5. Mono/Stereo - Dual I-II / Current Language / 6.
Play preview (in Media Browser mode) Image size 7. Teletext / Mix8. Electronic Programme Guide9. Numeric buttons10. AV / Source11. Menu on/off 12. Programme Down - Page up / Programme Up - 13.
Page down Back to previous menu 14. Green button15. Red button16. Media Browser17. My Button 1: Power save mode on/off18. My Button 2(**)19. Info / Reveal (in TXT mode)20. Blue button21. Yellow button22. Exit (in DTV mode) / Return / Index page (in 23.
TXT mode) OK / Select / Hold (in TXT mode) / Channel List24. Volume up / down25. Navigation buttons26. Mute27. Previous programme / Now (in EPG mode)28. Sleep timer29. Favourite mode selection30. Picture mode selecion / Changes picture mode 31.
(in Media Browser video mode) Subtitle on-off / TXT subtitle (analogue TV 32.
mode) / Subtitle (in Media Browser mode). No function33. Fast forward (in Media Browser mode)34. Stop (in Media Browser mode)35. Pause / Timeshift recording36. Standby37. Operation LED light38.
(*) Please refer to Portal TV section to learn how to use remote control while in portal TV function.
P -
P +
SOURCE
GHI
PQRS
SCREEN
MENU
EPG
BACK
1
4
7
-
V +
V
SWAP
ABC DEF
JKL MNO
TUV WXYZ
LANG
SUBTITLE
INFO
PRESETS
FAV SLEEP
TEXT
EXIT
2
3
5
6
8
9
0
Y B TN 1M UT O Y B TN 2M UT OMULTIMEDIA
INTERNET
(**)USING MY BUTTON 2
When on a desired source, channel or link, press MY BUTTON 2 for fi ve seconds, until the “MY BUTTON IS SET” message is displayed on the screen. This confirms that MY BUTTON 2 is now associated with the selected function.
LC32/40LE343 Models (For Italy only.)
18.MHP services
19. ChanneL List
24. OK/ Select / Hold (in TXT mode)
9
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Operation Manual (Continued)
LCD TV and Operating Buttons
FRONT and REAR VIEW Control buttons VIEW Control Buttons
1. Standby/On button
2. TV/AV button
3. Programme Up/Down buttons
4. Volume Up/Down buttons
Note: Press “
and
buttons at the same
time to view main menu.
Viewing the Back side Connections
12
1 3
SCART 21. inputs or outputs for external devices.
SCART 12. inputs or outputs for external devices. Connect the SCART cable between SCART socket on
the TV and SCART socket on your external device (such as a decoder, a VCR or a DVD player).
Note: If an external device is connected via the SCART socket, the TV will automatically switch to AV mode.
Component Video Inputs (YPbPr)3. are used for connecting component video. You can connect the component video and audio sockets with a device that has component output. Connect the component video cables between the COMPONENT VIDEO INPUTS on on the TV and the component video outputs of your device. While connecting, be sure that the letters on your TV, “Y”, “Pb”, “Pr” correspond with your device’s connectors.
PC/YPbPr Audio Inputs4. are used for connecting audio signals of a PC or a device that connects to the TV via YPbPr. Connect the PC audio cable between the AUDIO INPUTS on the TV and audio output of your PC to enable PC audio. Connect the audio cable between AUDIO INPUTS on the TV and audio outputs of your device to enable component audio.
Subwoofer Out5. is for connecting an external, active subwoofer to the set to give a much deeper bass effect. Use an appropriate RCA cable to connect the set to a subwoofer unit.
S/PDIF Digital Out6. outputs digital audio signals of the currently watched source. Use a digital optic cable to transfer audio signals to a device that has S/PDIF input.
10
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Operation Manual (Continued)
RF Input7. connects to an aerial or cable antenna system. Note that if you use a decoder or a media recorder, you should connect the aerial cable through the device to the television with an appropriate antenna cable, as shown in the illustration in the following pages.
HDMI 3: HDMI Input8.
HDMI 2: HDMI Input9.
HDMI 1: HDMI Input10. HDMI Inputs are for connecting a device that has an HDMI socket. Your LCD TV is capable of
displaying High Defi nition pictures from devices such as a High Defi nition Satellite Receiver or DVD Player. These devices must be connected via the HDMI sockets or Component Socket. These sockets can accept either 720p or 1080p (optional) signals. No sound connection is needed for an HDMI to HDMI connection.
PC Input11. is for connecting a personal computer to the TV set. Connect the PC cable between the PC INPUT on the TV and the PC output on your PC
Ethernet input (for service and Internet connectivity)12.
Viewing the Connections - Side Connectors
CI Slot is used for inserting a CI card. A CI card allows you to view all the channels that you subscribe 1. to. For more information, see “Conditional Access” section.
Side USBs2.
Note that programme recording feature is available via these USB inputs. You can connect external hard disk drives to this input.
Side HDMI Input is for connecting a device that has an HDMI socket.3.
Headphone jack is used for connecting an external headphone to the system. Connect 4. to the HEADPHONE jack to listen to the TV from headphones (optional).
Side audio-video connection5. input is used for connecting video and audio signals of external devices. To make a video connection, you must use the supplied AV connection cable for enabling connection. First, plug singular jack of the cable to the TV’s Side AV socket. Afterwards, insert your video cable’s (not supplied) connector into the YELLOW input (located on the plural side) of the supplied AV connection cable. Colours of the connected jacks should match.
To enable audio connection, you must use RED and WHITE inputs of the side AV connection cable. Afterwards, insert your device’s audio cable’s connectors into the RED and WHITE jack of the supplied side AV connection cable. Colours of the connected jacks should match.
Note: You should use audio inputs of side AV connection cable (RED & WHITE) to enable sound connection when connecting a device to your TV by using PC or COMPONENT VIDEO input.
6. , switch is used for turning the TV on or off.
6
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Operation Manual (Continued)
Antenna Connection
Aerial/Cable Connection
Connect the aerial or cable TV plug to the AERIAL INPUT socket located at the rear of the TV.
1 3
Aerial or Cable
Power Connection
IMPORTANT: The TV set is designed to operate on 220-240V AC, 50 Hz socket.
After unpacking, allow the TV set to reach the ambient room temperature before you connect the set to the mains. Plug the power cable to the mains socket outlet.
Using USB Inputs
USB Connection
You can connect a USB hard disk drive or USB memory stick to your TV by using the USB inputs of the TV. This feature allows you to play fi les stored in a USB drive or record programmes.
2.5” and 3.5” inch (hdd with external power supply) external hard disk drives are supported.
To record a programme, you should fi rst connect a USB disk to your TV while the TV is switched off. You should then switch on the TV to enable recording feature. Otherwise, recording feature will not be available.
IMPORTANT !
You may back up your fi les before making any connections to the TV set in order to avoid any possible data loss. Note that manufacturer will not be responsible for any fi le damage or dataloss.
It is possible that certain types of USB devices (e.g. MP3 Players) or USB hard disk drives/memory sticks may not be compatible with this TV.
IMPORTANT: The TV supports only FAT32 and NTFS disk formatting. However, NTFS format is not supported for recording features. For recording, if you connect a USB disk with NTFS format, the TV will ask you to format the content. See the section, “Format Disk” in the following pages for more information on disk formatting.
Note that ALL the data stored on the USB disk will be lost and then the disk format will be converted to FAT32 in such a case.
USB Disk Connection
• Plug your USB device to the USB input of the TV.
Note: Plug or unplug your USB disk while the TV is switched off.
Note: If you are going to connect a USB hard disk drive to the TV set, USB connection cable used between the disk drive and the TV should have a USB logo and should be as short as possible.
Note: While formatting a USB hard disk that has 1TB (Tera Byte) or more fi le capacity, you can experience problems with the formatting process. In such a case, you should format the disk with your personal computer and the formatted disk type should be FAT32.
SIDE VIEW USB MEMORY
CAUTION !
Quickly plugging and unplugging USB devices, is a very hazardous operation. Especially, do not repeatedly quickly plug and unplug the drive. This may cause physical damage to the USB player and especially the USB device itself.
Do not pull out USB module while playing or recording a fi le.
Programme Recording
To record a programme, you should fi rst connect a USB disk to your TV while the TV is switched off. You should then switch on the TV to enable recording feature.
IMPORTANT: When using a new USB hard disk drive, it is recommended that you fi rst format the disk using your TV’s “Format Disk” option.
For using recording function, you should connect a USB disk or an external hard disk drive to the TV and connected USB disk should have at least 1 GB capacity and should have 2.0 speed compatibility. If the connected USB device does not support 2.0 speed, an error message will be displayed.
Note: Recorded programmes are saved into the connected USB disk. If desired, you can store/copy recordings on a computer; however, these fi les will not be available to be played on a computer. You can play the recordings only via your TV.
For more information on recording programmes, see sections “Instant Recording”, “Timeshifting”, “Electronic Programme Guide”, “Recordings Library” or “Recording Timers” in the following parts.
Recorded programmes are split into 4GB partitions.
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Operation Manual (Continued)
Side HDMI Connection
You can use side HDMI input to connect a device that has an HDMI connector to your TV. Use an appropriate HDMI cable to make such a connection. Note that you should switch to the HDMI source to view the content from the connected device. Power off both the TV and the device before making any connections. Side HDMI Input supports connections between HDMI devices such as DVD players. You can use side HDMI input of the TV to connect to an external HDMI device. Use an HDMI cable to connect.
HDMI DEVICE SIDE VIEW
Connecting the LCD TV to a PC
For displaying your computer’s screen image on your LCD TV, you can connect your computer to the TV set. Power off both computer and display before making any connections. Use 15-pin D-sub display cable to connect a PC to the LCD TV. When the connection is made, switch to PC source. See “Input selection” section. Set the resolution that suits your viewing requirements. Resolution information can be found in the appendix parts.
PC audio cable
(not supplied)
PC VGA cable (not supplied)
Audio inputs of the TV
PC input of the TV
Audio output of the PC
Monitor output of the PC
Recorded programmes are stored in the following directory of the connected USB disk: \DVR\RECS. All recordings are indicated with a number. A text (txt) fi le is created for each recording. This text file includes information such as broadcaster, programme, and recording time.
Timeshifting may be stopped according to USB device write speed. If the USB device speed is not enough for video stream bitrate, timeshifting may be stopped and recording may fail. If HD service bitrate is greater than 13 Mbp/sec. some freeze can be seen during timeshifting on both USB disk and on external HDD.
Recordings of HD programmes can occupy bigger size on the USB disk depending on the broadcast’s resolution. For this reason it is recommended to use USB hard disk drives for recording HD programmes.
Do not plug out the USB/HDD during the recording. This may harm the connected USB/HDD.
Multipartiton support is available. Maximum two different partitions are supported. If the disk have more than two partitions, crash may occur. First partition of the usb disk is used for PVR ready features. It also must be formatted as primary partition to be used for PVR ready features.
Some stream packets may not be recorded because of signal problems, so sometimes video may freezes during playback.
Record, Play, Pause, Display (for PlayListDialog) keys could not be used when teletext is ON. If a recording starts from timer when teletext is ON, teletext is automatically turned off. Also teletext usage is disabled when there is ongoing recording or playback.
• Radio record is not supported.
• The Tv can record programmes up to ten hours.
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Operation Manual (Continued)
Connecting to a DVD Player
If you want to connect a DVD player to your LCD TV, you can use connectors of the TV set. DVD players may have different connectors. Please refer to your DVD player’s instruction book for additional information. Power off both the TV and the device before making any connections.
Note: Cables shown in the illustration are not supplied.
If your DVD player has an HDMI socket, you can connect via HDMI. When you connect to DVD player as illustrated below, switch to HDMI source. See, “Input Selection” section.
Most DVD players are connected through COMPONENT SOCKETS. Use a component video cable to connect video input. For enabling audio, use a component audio cable as illustrated below. When the connection is made, switch to YPbPr source. See, “Input selection” section.
You may also connect through the SCART 1 or SCART 2. Use a SCART cable as shown below.
Note: These three methods of connection perform the same function but in different levels of quality. It is not necessary to connect by all three methods.
HDMI
HDMI
inputs
Scart sockets
Component
video
inputs
Component
audio
inputs
DVD Player
Using Side AV Connectors
You can connect a range of optional equipment to your LCD TV using side connectors of the TV.
For connecting a camcorder or camera , you should use SIDE AV socket (side). To do this, you must use the supplied video/audio connection cable. First, plug single jack of the cable to the TV’s AV IN socket (side). Afterwards, insert your camera cable’s (not
supplied) connectors into the plural part of the video/ audio connection cable. Colours of the connected
jacks should match. See illustration below.
Afterwards, you should switch to Side AV source. See the section Input selection in the following sections for more information.
Camera
AVConnection
Cable(supplied)
AVCable
(notsupplied)
Headphone
To listen the TV sound from headphones, you should connect headphones to your TV by using the
HEADPHONE jack as illustrated above.
Using Other Connectors
You can connect a range of optional equipment to your LCD TV. Possible connections are shown below. Note that cables shown in the illustration are not supplied.
For connecting a to a device that has SPDIF support, use an appropriate SPDIF cable to enable sound connection.
External Speakers
A device that
supports
SPDIF signal.
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Operation Manual (Continued)
Connecting to a Wired Network
For connecting to a wired LAN network, you should perform the following steps:
Connect broadband ISP connection ethernet cable to the ETHERNET INPUT of your modem.
Ensure that Nero Media Home software is installed to your PC.(for DLNA function). See Appendix H for more information on the installation process.
Afterwards, you should connect your PC to the one of your modem’s LAN connectors (e.g. LAN 1) by using a proper LAN cable.
Use another LAN output of your modem (e.g. LAN 2) to enable the connection to your TV. You can add your TV to your LAN by connecting the LAN port at the rear of your TV to your modem’s LAN connector as illustrated below.
To access and play shared fi les, you must Select Media Browser. Press Menu button and select Media Browser by using Left or Right button. Press OK to continue. Select the desired fi le type and press OK. You must always use the Media Browser screen to access and play shared network fi les.
PC/HDD/Media Player or any other devices that are DLNA 1.5 compatible should be used with wired connection for higher playback quality.
To confi gure wired settings please refer Network Settings section in Settings menu.
PC with Nero Media Home software installed
Lan(Ethernet cable)
Broadband ISP Connection
Rear of TV
You might be able to connect your TV to your LAN network depending on your network’s confi guration. In such a case, use an ethernet cable to connect your TV directly to the network wall outlet.
The modem port on the wall
Rear of TV
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Operation Manual (Continued)
Connecting to a Wireless Network (Optional)
IMPORTANT: “Veezy 100” USB dongle(sold separately) is required to use wireless network feature.
To use your TV with your wireless network, you need a “Veezy 100” Wireless USB dongle. To make your modem’ s SSID visible, you should change your SSID settings via modem’s software. The TV cannot connect to the networks with hidden SSID.
For connecting to a wireless LAN network, you should perform the following steps:
Connect broadband ISP connection ethernet cable to the ETHERNET INPUT of your modem.
Ensure that Nero Media Home software is installed to your PC. (for DLNA function).
Afterwards, you should connect wireless adaptor to one of the USB inputs of the TV.
To confi gure wireless settings please refer Network Settings section in Settings menu.
Broadband ISP Connection
Wireless Lan Adaptor
PC with Nero Media Home software installed
USB Inputs (Side of the TV)
A Wireless-N router (IEEE 802.11a/b/g/n) with simultaneous 2.4 and 5 GHz bands designed to increase bandwidth. Optimized for smoother and faster HD video streaming, file transfers, and wireless gaming.
Use LAN connection for quicker file sharing between other devices like computers.
The frequency and channel differ depending on the area.
The transmission speed differs depending on the distance and number of obstructions between the transmission products, the configuration of these products, the radio wave conditions, the line traffic, and the products that you use. The transmission may also be cut off or get disconnected depending on the radio wave conditions DECT phones, or any other WiFi 11b appliances. The standard values of the transmission speed are the theoretical maximum values for the wireless standards. They are not the actual speeds of data transmission.
The location where the transmission is most effective differs depending on the usage environment.
Wireless LAN adaptor should be connected directly to the TV’s USB port. USB hubs are not supported.
To configure wireless settings please refer wifi section in Settings menu.
Wireless LAN adaptor supports 802.11 a,b,g & n type modems. It is highly recommended that you should use IEEE 802.11n communication protocol in order to avoid any possible problems while watching videos.
Use the other usb input, if you experience problems with audio/video performance.
You must change your modem’s SSID when there are any other modems around with the same SSID. You can encounter connection problems otherwise. Use wired connection instead if you experience problems with wireless connection.
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Operation Manual (Continued)
Remote Control Handset
Inserting Batteries
Remove the battery cover located on the back of the handset by gently pulling backwards from the indicated part.
Insert two AAA/R3 or equivalent type batteries inside. Insert two AAA/R3 or equivalent type batteries inside. Observe the correct polarity (+/-) when inserting batteries and replace the battery cover.
Note: Remove the battery from remote control handset when it is not to be used for a long period. Otherwise it can be damaged due to any leakage of batteries. Remote range is approximately 7m/23ft.
Switching On/Off
To Switch the TV On
Connect the power cord to the 220-240V AC, 50 Hz socket.
Switch the “
” button on the rear left hand side to position “|” so the TV will switch to standby mode. Then the standby LED lights up.
To switch on the TV from standby mode either:
Press the “
” button, P+ / P- or a numeric button
on the remote control.
Press the -P/CH or P/CH+ touch button on the TV. The TV will then switch on.
Note:
If you switch on your TV via standby button on the remote control, the programme/source that you were watching last will be reselected. The TV will switch on with the last selected channel number, regardless of the channel number that you select from the remote control to switch
on the TV.
By either method the TV will switch on.
To Switch the TV Off
Switch the “ ” button to position 2 as illustrated,
so the TV will switch OFF.
To power down the TV completely, unplug the power cord from the mains socket.
Note: When the TV is switched to standby mode, standby LED can blink to indicate that features such as Standby Search, Over Air Download or Timer is active. The LED can also blink when you switch on the TV from standby mode.
Standby Notifi cations
If the TV switches off while in No Signal mode, the following on-screen message will be displayed on the next switch-on:
When the Auto Tv Off timeout is reached, the following message will be displayed on the screen. Select YES to shut down the TV. Select NO to cancel. The TV will switch off as well, if you do not make a selection on this screen.
If the TV switches off owing to the auto power down feature, the following on-screen message will be displayed on the next switch-on:
Digital Teletext (** for UK only)
• Press the “ ” button.
The digital teletext information appears.
Operate it with the coloured buttons, cursor buttons and OK button.
The operation method may differ depending on the contents of the digital teletext.
Follow the instructions displayed on digital teletext screen.
When Press “ OK” button or similar message appears on the screen, press the OK button.
When the “
” button is pressed, the TV returns to
television broadcasting.
17
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DIMENSIONS
LC-32LE340E/EV/RU LC32LE343E Models
Specifi cations
TV BROADCASTING
PAL/SECAM B/G D/K K’ I/I’ L/L
RECEIVING CHANNELS
VHF (BAND I/III)
UHF (BAND U)
HYPERBAND
NUMBER OF PRESET CHANNELS
10.000
CHANNEL INDICATOR
On Screen Display
RF AERIAL INPUT
75 Ohm (unbalanced)
OPERATING VOLTAGE
220-240V AC, 50 Hz.
AUDIO OUTPUT POWER (W
RMS.
) (10% THD)
2 x 8
POWER CONSUMPTION (W)
135 W (max)
< 0,5 W (Standby)
PANEL
16:9 display, 32” (80 cm) Screen Size
DIMENSIONS (mm)
DxLxH (With foot): 205,5 x 772,91 x 521,90
Weight (Kg): 10,85
DxLxH (Without foot): 39 x 772,91 x 489,68
Weight (Kg): 9,30
-CVBS analogue output.(In HD channels, this will not be available
iii. AUDIO
-MPEG-1 layer I/II, MPEG-2 layer II, AAC, HEAAC, AC3, E-AC3
-Sampling frequencies supported are 32, 44.1 & 48 kHz
Digital Reception (DVB-C)
Transmission Standards:
DVB-C, MPEG2, DVB-C, MPEG4
i. DEMODULATION
-Symbolrate: 4.0 Msymbols/s to 7.2 Msymbols/s
- Modulation: 16-QAM , 32-QAM ,64-QAM, 128-QAM and 256-QAM
ii. VIDEO
- All MPEG2 MP@ML formats with up-conversion and ltering to CCIR601 format.
-CVBS analogue output
iii. AUDIO
-All MPEG1 Layer 1 and 2 modes
-Sampling frequencies supported are 32, 44.1 & 48 kHz.
Dimensional Drawings
18
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-40LE340E/EV/RU LC40LE343E Models
Specifi cations
TV BROADCASTING
PAL/SECAM B/G D/K K’ I/I’ L/L
RECEIVING CHANNELS
VHF (BAND I/III)
UHF (BAND U)
HYPERBAND
NUMBER OF PRESET CHANNELS
10.000
CHANNEL INDICATOR
On Screen Display
RF AERIAL INPUT
75 Ohm (unbalanced)
OPERATING VOLTAGE
220-240V AC, 50 Hz.
AUDIO OUTPUT POWER (W
RMS.
) (10% THD)
2 x 8
POWER CONSUMPTION (W)
150 W (max)
< 0,5 W (Standby)
PANEL
16:9 display, 40” (102 cm) Screen Size
DIMENSIONS (mm)
DxLxH (With foot): 232 x 959,2 x 626,8
Weight (Kg): 16,75
DxLxH (Without foot): 40 x 959,2 x 592,9
Weight (Kg): 13,90
-CVBS analogue output.(In HD channels, this will not be available
iii. AUDIO
-MPEG-1 layer I/II, MPEG-2 layer II, AAC, HEAAC, AC3, E-AC3
-Sampling frequencies supported are 32, 44.1 & 48 kHz
Digital Reception (DVB-C)
Transmission Standards:
DVB-C, MPEG2, DVB-C, MPEG4
i. DEMODULATION
-Symbolrate: 4.0 Msymbols/s to 7.2 Msymbols/s
- Modulation: 16-QAM , 32-QAM ,64-QAM, 128-QAM and 256-QAM
ii. VIDEO
- All MPEG2 MP@ML formats with up-conversion and ltering to CCIR601 format.
-CVBS analogue output
iii. AUDIO
-All MPEG1 Layer 1 and 2 modes
-Sampling frequencies supported are 32, 44.1 & 48 kHz.
Dimensional Drawings
19
LC-32LE340/343 LC-40LE340/343
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INTRODUCTION
1. INTRODUCTION
17MB70-2 mainboard is based on Broadcom concept IC. This IC combines DVB-T COFDM terrestrial and PAL/SECAM demodulators, HDMI receivers, a transport processor, a digital audio processor, graphics processing, Ethernet MAC and PHY, digital processing of analog video and audio, analog video digitizer and DAC functions, stereo high-fidelity audio DACs, a 400-MHz dual-threaded MIP processor, and a peripheral control unit providing a variety of television control functions. This IC also features an advanced video decoder capable of supporting high-definition AVC, VC-1, and DVB-T MPEG-2 streams.
Main IC Features:
• Advanced multiformat decoder supporting the following:
- H.264/AVC Main and High Profile to Level 4.1 (HD), Level 3.1 (SD)
- HD/SD AVS Jizhun Profile Levels 2.0, 4.0, and 6.0
- VC-1 Advanced Profile @ Level 3, simple and main profiles
- HD/SD MPEG-2 Main Profile at Main and High levels
- MPEG still image decode
- HD DivX® 3.11/4.11/5.x/6x/Home Theater
• 3D/2D OpenGL® ES 1.0- compliant graphics core
• Integrated Video Processing:
- 3D Color management
- Digital, Analog, and Mosquito Noise Reduction
- 1080i motion adaptive deinterlacing with 3:2/2:2 pull-down
- True 10-bit video carried through system
• Dual HDMI 1.3a receivers
• Extensive audio support:
- AAC+ Level 2, AAC-HE
- Dolby® Digital, Dolby Digital Plus, Trusurround XT®
- MPEG I layers 1, 2, and 3 (MP3)
- Windows Media® and Windows Media Pro audio
- Audio DACs, input switch, and equalizer
• Ethernet MAC and PHY
• Integrated DVB-T COFDM terrestrial demodulator:
- Standards compliance: ETSI EN 300 744, Nordig Unified v1.0.3, DTG D-Book 5
compliant
- Excellent Doppler performance
- Active impulse noise suppression
• Integrated PAL/SECAM Demodulator
• PAL decoder with a 3D/2D comb
• Direct PC input support up to 1600 x 1200 UXGA
• Integrated dual-link LVDS transmitters
• Dual USB 2.0
• A 400-MHz 32-bit MIPS dual CPU with two 32-KB instruction caches and a combined 64-KB data cache with 128-KB L2 cache
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Sound system output is supplying 2x8W (10%THD) for stereo 8speakers
Supported peripherals are:
x 1 RF input VHF I, VHF III, UHF @ 75Ohm(Common) x 1 Side AV (CVBS, R/L_Audio) x 2 SCART socket(Common) x 1 YPbPr (Common) x 1 Side S-Video(Common) x 1 PC input(Common) x 4 HDMI 1.3 input(Common) x 1 Common interface(Common) x 1 Optic S/PDIF output(Common) x 1 Stereo audio input for PC(Common) x 1 Subwoofer output(Common) x 1 Headphone(Common) x 2 USB(Common) x 1 Bluray/DVD(Optional) x 1 Ethernet-RJ45 (Common) x 1 External Touchpad(Common)
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2. TUNER
CIRCUIT DESCRIPTIONS
Sound system output is supplying 2x8W (10%THD) for stereo 8speakers
Supported peripherals are:
x 1 RF input VHF I, VHF III, UHF @ 75Ohm(Common) x 1 Side AV (CVBS, R/L_Audio) x 2 SCART socket(Common) x 1 YPbPr (Common) x 1 Side S-Video(Common) x 1 PC input(Common) x 4 HDMI 1.3 input(Common) x 1 Common interface(Common) x 1 Optic S/PDIF output(Common) x 1 Stereo audio input for PC(Common) x 1 Subwoofer output(Common) x 1 Headphone(Common) x 2 USB(Common) x 1 Bluray/DVD(Optional) x 1 Ethernet-RJ45 (Common) x 1 External Touchpad(Common)
2. TUNER
FT 2112/3/8/9 are newly developed Half-NIM modules designed for both digital (DVB-T / T2 and DTMB for terrestrial China) and analog TV reception in compliance with the European ATV standards for analogue, as well as with the terrestrial standard ETS 300 744 for DVB-T and the new terrestrial standard ETS 302 755 for DVB-T2. It consists of a 3­band RF tuner, which receives RF signal and down-converts it to an IF frequency of 36MHz for digital and 38.9MHz for analog IF. The analogue IF output can directly drive a SAW filter. A digital IF Stage, which consists of one SAW filter & gain-controllable IF that offers a sufficient output level to be connected directly to an A/D converter.
In active antenna option, the following circuit are used. ANT_CTRL pin is controlled by microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high, ANT_PWR will be high. OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low, ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is done by circuits and microcontroller.
Active Antenna Circuit
22
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Active Antenna Circuit
1.1. Features of FT2112
• Digital DVB-T T2, DTMB & analogue (48.25MHz to 863.25MHz) reception
• Single 5V supply voltage only
• Built-in 5-33V DC-DC converter
• Single power supply to the RF tuner & IF VGA amplifier section
• Bus Control switch-able RF AGC function:
a) Wide Band AGC for optimum strong signal performance
b) Conventional AGC for optimum analog reception
• RF AGC information via I2C Bus
• Tuner power standby mode via I2C Bus
• Small size (56 mm x 29 mm x 10 mm)
• I2C (SDA & SCL) bus control interface
• ROHS compliant
1.2.Tuner Pinning
2.1 Features of FT 2112
2.2 Tuner Pinning
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1.2.Tuner Pinning
3. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (TPA3110)
a. General Description
17MB70 uses TPA 3110 15-W filter-free stereo Class-D audio power amplifier for main audio output. The TPA3110D2 is a 15-W (per channel) efficient, Class-D audio power amplifier for driving bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard™ speaker protection circuitry includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip supply to limit the amount of current through the speaker. The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs.
The TPA3110D2 can drive stereo speakers as low as 4 7KHKLJKHIILFLHQFy of the TPA3110D2, 90%, eliminates the need for an external heat sink when playing music. The outputs are also fully protected against shorts to GND, VCC, and output-to-output. The short­circuit protection and thermal protection includes an auto-recovery feature.
b. Features
• 15-W/ch into an 8-/RDGVDW7+'1)URPD-V Supply
• 10-W/ch into 8-/RDGVDW7+'1)URPD 13-V Supply
• 30-W into a 4-0RQR/RDGDW7+'1)URPD-V Supply
• 90% Efficient Class-D Operation Eliminates Need for Heat Sinks
• Wide Supply Voltage Range Allows Operation from 8 V to 26 V
• Filter-Free Operation
• SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter plus DC Protection
• Flow Through Pin Out Facilitates Easy Board Layout
• Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto Recovery Option
• Excellent THD+N / Pop-Free Performance
• Four Selectable, Fixed Gain Settings
• Differential Inputs
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The TPA3110D2 can drive stereo speakers as low as 4 7KHKLJKHIILFLHQFy of the TPA3110D2, 90%, eliminates the need for an external heat sink when playing music. The outputs are also fully protected against shorts to GND, VCC, and output-to-output. The short- circuit protection and thermal protection includes an auto-recovery feature.
b. Features
15-W/ch into an 8-/RDGVDW7+'1)URPD-V Supply
10-W/ch into 8-/RDGVDW7+'1)URPD 13-V Supply
30-W into a 4-0RQR/RDGDW7+'1)URPD-V Supply
90% Efficient Class-D Operation Eliminates Need for Heat Sinks
Wide Supply Voltage Range Allows Operation from 8 V to 26 V
Filter-Free Operation
SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter plus DC Protection
Flow Through Pin Out Facilitates Easy Board Layout
Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto Recovery Option
Excellent THD+N / Pop-Free Performance
Four Selectable, Fixed Gain Settings
Differential Inputs
c. Absolute Ratings
d. Recommended Operating Conditions
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d. Recommended Operating Conditions
e. Pin Functions
.
PIN
I/O/P DESCRIPTION
Pin
NAME
Number
Shutdown logic input for audio amp (LOW = outputs Hi-Z, HIGH = outputs
SD
1 I
enabled). TTL logic levels with compliance to AVCC.
Open drain output used to display short circuit or dc detect fault status. Voltage compliant to AVCC. Short circuit faults can be set to auto-recovery by connecting
FAULT
2 O
FAULT pin to SD pin. Otherwise, both short circuit faults and dc detect faults must be reset by
cycling
PVCC.
LINP 3 I
Positive audio input for left channel. Biased at 3V.
LINN 4 I Negative audio input for left channel. Biased at 3V.
GAIN0 5 I
Gain select least significant bit. TTL logic levels with compliance to AVCC.
GAIN1 6 I
Gain select most significant bit. TTL logic levels with compliance to AVCC.
AVCC 7 P
Analog supply
AGND 8 Analog signal ground. Connect to the thermal pad.
High-side
FET gate drive supply. Nominal voltage is 7V. Also should be used as
GVDD
9 O
supply for PLIMIT function
Power limit level adjust. Connect a resistor divider from GVDD to GND to set
PLIMIT 10 I
power limit. Connect directly to GVDD for no power limit.
RINN 11 I
Negative audio input for right channel. Biased at 3V.
RINP 12 I
Positive audio input for right channel. Biased at 3V.
NC 13
Not connected
PBTL 14 I
Parallel BTL mode switch
Power supply for right channel H-bridge. Right channel and left channel power
PVCCR 15 P
supply inputs are connect internally.
Power supply for right channel H-bridge. Right channel and left channel power
PVCCR 16 P
supply inputs are connect internally.
BSPR 17 I
Bootstrap I/O for right channel, positive high-side FET.
OUTPR 18 O
Class-D H-bridge positive output for right channel.
PGND 19 Power ground for the H-bridges.
OUTNR 20 O
Class-D H-bridge negative output for right channel.
BSNR 21 I
Bootstrap I/O for right channel, negative high-side FET.
BSNL 22 I
Bootstrap I/O for left channel, negative high-side FET.
OUTNL 23 O
Class-D H-bridge negative output for left channel.
PGND 24
Power ground for the H-bridges.
OUTPL 25 O
Class-D H-bridge positive output for left channel.
BSPL 26 I
Bootstrap I/O for left channel, positive high-side FET.
Power supply for left channel H-bridge. Right channel and left channel power
PVCCL 27 P
supply inputs are connect internally.
Power supply for left channel H-bridge. Right channel and
left channel power
PVCCL 28 P
supply inputs are connect internally.
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B. LINE-OUT and HEAD-PHONE AMPLIFIER STAGE (CXA3813N)
a. Functional Block Diagram
b. Absolute Ratings
c. Recommended Operating Conditions
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d. Pin Functions
C. SUBWOOFER AMPLIFIER STAGE (TPA3112)
a. General Description
The TPA3112D1 is a 25-W efficient, Class-D audio power amplifier for driving a bridge tied speaker. Advanced EMI Suppression Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard speaker protection system includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip supply to limit the amount of current through the speaker. The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs. The TPA3112D1 can drive a mono speaker as low as 47KHKLJKHIILFLHQF\RIWKH73$'! eliminates the need for an external heat sink when playing music. The outputs are fully protected against shorts to GND, VCC, and output-to-output. The short-circuit protection and thermal protection includes an auto­recovery feature.
b. Features
• 25-W into an 8-/RDGDW7+'1)URPD96XSSO\
• 20-W into an 4-/RDGat 10% THD+N From a12-V Supply
• 94% Efficient Class-D Operation into 8-/RDG(OLPLQDWHV1HHGIRU+HDW6LQNV
• Wide Supply Voltage Range Allows Operationfrom 8 to 26 V
• Filter-Free Operation
• SpeakerGuard™ Speaker Protection IncludesAdjustable Power Limiter plus DC Protection
• Flow Through Pin Out Facilitates Easy BoardLayout
• Robust Pin-to-Pin Short Circuit Protection andThermal Protection with Auto-Recovery Option
• Excellent THD+N/ Pop Free Performance
• Four Selectable, Fixed Gain Settings
• Differential Inputs
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c. Absolute Ratings
d. Recommended Operating Conditions
e. Pin Functions
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4. POWER STAGE
17MB70 general power managment block diagram is shown below. 17PW26 power board is used in 32” 17MB70 TV sets.
3,3V stby, 5V stby, 3,3V, 5V, 12V, 24V and 33V can be generated by PW26.
Below blocks are generated by step­downs and regulators on MB70 board.
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Power Blocks on MB70:
Below blocks are generated by step-downs and regulators on MB70 board.
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FAIRCHILD FAN2110 (U19-U20)
a) General Description
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.
Pin Configuration
Figure 3. MLP 5x6mm Pin Configuration (Bottom View)
Pin Definitions
Pin # Name Description
P1, 6-12 SW
Switching Node. Junction of high-side and low-side MOSFETs.
P2, 2-5 VIN
Power Input Voltage. Connect to the main input power source.
P3, 21-23 PGND
Power Ground. Power return and Q2 source.
1 BOOT
High-Side Drive BOOT Voltage. Connect through capacitor (C
BOOT
) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to V
CC
when SW is LOW.
13 PGOOD
Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled.
14 EN
ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink.
15 VCC
Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin. This pin should be decoupled to AGND through a >1µF X5R/X7R capacitor.
16 AGND
Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection.
17 ILIM
Current Limit. A resistor (R
ILIM
) from this pin to AGND can be used to program the current-
limit trip threshold lower than the default setting.
18 R(T)
Oscillator Frequency. A resistor (R
T
) from this pin to AGND sets the PWM switching
frequency.
19 FB
Output Voltage Feedback. Connect through a resistor divider to the output voltage.
20 COMP
Compensation. Error amplifier output. Connect the external compensation network between this pin and FB.
24 NC
No Connect. This pin is not used.
25 RAMP
Ramp Amplitude. A resistor (R
RAMP
) connected from this pin to VIN sets the ramp
amplitude and provides voltage feedforward functionality.
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MP1583 (U38)
DESCRIPTION
The MP1583 is a step-down regulator with abuilt-in internal Power MOSFET. It achieves 3A of continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization.
.
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Parameter Conditions Min. Max. Unit
VIN to PGND 28 V
VCC to AGND AGND = PGND 6 V
BOOT to PGND 35 V
BOOT to SW -0.3 6.0 V
Continuous -0.5 24.0
SW to PGND
Transient (t < 20ns, f <
600KHz) -5.0 30.0
V
All other pins -0.3 V
CC
+0.3 V
Human Body Model, JEDEC JESD22-A114 2.0
ESD
Charged Device Model, JEDEC JESD22-C101 2.5
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Conditions Min. Typ. Max. Unit
VCC Bias Voltage VCC to AGND 4.5 5.0 5.5 V
VIN Supply Voltage VIN to PGND 3 24 V
FAN2106MPX -10 +85
TA Ambient Temperature
FAN2106EMPX -40 +85
°C
TJ Junction Temperature +125 °C
fSW Switching Frequency 200 600 KHz
Thermal Information
Symbol Parameter Min. Typ. Max. Unit
T
STG
Storage Temperature -65 +150 °C
TL Lead Soldering Temperature, 10 Seconds +300 °C
P1 (Q2) 4
P2 (Q1) 7
T
JC
Thermal Resistance: Junction-to-Case
P3 4
°C/W
T
J-PCB
Thermal Resistance: Junction-to-Mounting Surface 35
(1)
°C/W
PD Power Dissipation, TA = 25°C 2.8
(1)
W
Note:
1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 26. Actual results are dependent on mounting method and surface related to the design.
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Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. An adjustable soft-start reduces the stress on the input source at startup. In shutdown mode the regulator draws 20µA of supply current. The MP1583 requires a minimum number of external components, providing a compact solution.
FEATURES
• 3A Output Current
• Programmable Soft-Start
• 100m,QWHUQDO3RZHU026)(76ZLWFK
• Stable with Low ESR Output Ceramic Capacitors
• Up to 95% Efficiency
• 20µA Shutdown Mode
• Fixed 385KHz Frequency
• Thermal Shutdown
• Cycle-by-Cycle Over Current Protection
• Wide 4.75V to 23V Operating Input Range
• Output Adjustable from 1.22V to 21V
• Under-Voltage Lockout
MP2012 (U39)
The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM
step-down converter. It is ideal for powering portable equipment that runs from a single cell
Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate at 100% duty
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cycle for low dropout applications. With peak current mode control and internal compensation, the MP2012 is stable with ceramic capacitors and small inductors. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. MP2012 is available in the small 6-pin 3mmx3mm QFN package.
x 2.7-6V Input Operation Range x Output Adjustable from 0.8V to VIN x ȝ$0D[6KXWGRZQ&XUUHQW x Up to 95% Efficiency x 100% Duty Cycle for Low Dropout Applications x 1.2MHz Fixed Switching Frequency x Stable with Low ESR Output Ceramic Capacitors x Thermal Shutdown x Cycle-by-Cycle Over Current Protection x Short Circuit Protection x Available in 6-pin 3x3mm QFN
LM1117 (U21-U22-U23-U24)
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5. MICROCONTROLLER(Broadcom)
BCM3556
a) General Description
The BCM3556 is the next generation of System-on-a-Chip (SoC) Digital Television (DTV) products from Broadcom® with 1080p60 input and output capability targetedfor the EU Market. It combines a high level of integration with best-of-class picture quality, enabling TV manufacturers to reduce overall system cost (BOM) and improve picture quality, all with a single SoC.
The BCM3556 combines DVB-T COFDM terrestrial and PAL/SECAM demodulators, two DVI/HDMI receivers, a transport processor, a digital audio processor, 3D/2D graphics processing, Ethernet MAC and PHY, digital processing of analog video and audio, analog video digitizer and DAC functions, stereo high-fidelity audio DACs, a 400-MHz dual­threaded MIPS processor, and a peripheral control unit providing a variety of television control functions. The BCM3556 also features an advanced video decoder capable of supporting high-definition AVC, VC-1, and DVB-T MPEG-2 streams.
The integration of the DVB-T COFDM terrestrial demodulator reduces the overall cost of the external tuner module, resulting in cost savings for the customer. The BCM3556also integrates four 10-bit ADCs with integrated front-end analog muxing that accept four CVBS inputs, three S-video inputs, three component inputs, one PC input, one full SCART input with fast blanking, and one Sound IF (SIF) input at the same time without the requirement for any off-chip muxing ICs. The BCM3556 offers two HDMI 1.3a receivers, a motion adaptive deinterlacer, HD Analog Noise Reduction, and an analog video decoder with 3D comb for PAL and Y/C separation for SECAM.
The multiformat video decoder in the BCM3556 is capable of supporting high-definition AVC, VC-1, and DVB-T MPEG-2 streams. AVC support is up to High Profile Level 4.1. New tools in the AVC Fidelity Range extensions are supported, including 8x8 transform and spatial prediction modes and adaptive quantization matrix. The video decoder also supports high-definition VC-1 (Advanced Profile Level 3, Main, and Simple profiles) and DVB­Tcompliant MPEG-2, Main Profile at Main and High Levels. The BCM3556 has an advanced programmable audio processor capable of decoding a broad range of formats including Dolby Digital, Dolby Digital Plus, AAC 5.1, AAC+ Level 2, AAC+ Level 4, WMA, and MPEG-1 Layer 1, 2, and 3 with simultaneous pass-through support. The BCM3556 also supports 3D SRS Audio and includes an analog audio decoder for BTSC and A2 formats. The BCM3556 also integrates an analog audio switch that accepts six stereo inputs. In addition, the SoC supports SPDIF and I2S inputs. One SPDIF, two I2S, and three analog audio outputs are available.
The SoC family also has an integrated advanced Picture Enhancement Processor (PEP) to improve sharpening and perform picture post-processing functions (e.g., autoflesh, green boost, black and blue stretch). The PEP engine is fully programmable and can be optimized by the TV manufacturer to meet their respective quality requirements. Also integrated is a video encoder for NTSC and an advanced 2D/3D graphics for OSD acceleration.
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The BCM3556 supports direct PC inputs up to UXGA 1600x1200 formats with autophase and automode detection and supports dual LVDS outputs to support 1080p60 panels.
The BCM3556 integrates a 400-MHz 32-bit MIPS dual CPU with two 32-KB instructioncaches and a combined 64-KB data cache with a 128-KB L2 cache, and a 32-bit 800/1066-MHz DDR2. The BCM3556 also supports an 8-bit external NAND Flash interface and SPI Flash interface for booting. Integrated peripherals include two USB2.0 ports, three UARTs, controllers for SPI, BSC, keypad, LED and IR Tx/Rx, and an Ethernet port with MAC and integrated PHY.
The BCM3556 is available in several package options: WXGA and FHD, PIP and non-PIP, or MPEG-only and combined AVC/MPEG-2.
b) Features
• Advanced multiformat decoder supporting the following:
- H.264/AVC Main and High Profile to Level 4.1 (HD), Level 3.1 (SD)
- HD/SD AVS Jizhun Profile Levels 2.0, 4.0, and 6.0
- VC-1 Advanced Profile @ Level 3, simple and main profiles
- HD/SD MPEG-2 Main Profile at Main and High levels
- MPEG still image decode
- HD DivX® 3.11/4.11/5.x/6x/Home Theater
• 3D/2D OpenGL® ES 1.0- compliant graphics core
• Integrated Video Processing:
- 3D Color management
- Digital, Analog, and Mosquito Noise Reduction
- 1080i motion adaptive deinterlacing with 3:2/2:2 pull-down
- True 10-bit video carried through system
• Dual HDMI 1.3a receivers
• Extensive audio support:
- AAC+ Level 2, AAC-HE
- Dolby® Digital, Dolby Digital Plus, Trusurround XT®
- MPEG I layers 1, 2, and 3 (MP3)
- Windows Media® and Windows Media Pro audio
- Audio DACs, input switch, and equalizer
• Ethernet MAC and PHY
• Integrated DVB-T COFDM terrestrial demodulator:
- Standards compliance: ETSI EN 300 744, Nordig Unified v1.0.3, DTG D-Book 5 compliant
- Excellent Doppler performance
- Active impulse noise suppression
• Integrated PAL/SECAM Demodulator
• PAL decoder with a 3D/2D comb
• Direct PC input support up to 1600 x 1200 UXGA
• Integrated dual-link LVDS transmitters
• Dual USB 2.0
• A 400-MHz 32-bit MIPS dual CPU with two 32-KB instruction caches and a combined 64
KB data cache with 128-KB L2 cache
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c) BCM3556 - Block Diagram
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6. VIDEO BACK-END PROCESSOR (Trident)
PNX5120EH
a) General Description
The PNX5120EH is an advanced video picture improvement IC and the world's first solution, NXP’s Motion Accurate Picture Processing (MAPP), to combine movie judder cancellation, motion sharpness and vivid color management in a single device. Aimed primarily at digital and hybrid flat panel televisions in the mid-end and high-end European,Asian and U.S. consumer markets, it complies with relevant industry standards.LCD TVs represent a huge and growing market, and the PNX5120EH offers manufacturers a unique combination of richer color, dynamic motion, sensational sharpness, deep contrast, and full HD resolution. Moreover, you can easily tailor that balance via the Automatic Picture Control tool (delivered by NXP as part of a separate System Design-in Toolkit) to meet your own image quality requirements.
b) Features
x Single 27 MHz crystal clock input for all internal generated clocks x Three TriMedia TM3271 400 MHz, 32-bit VLIW media-processing cores with:
o five instructions per clock cycle o 32 kB instruction cache o 64 kB data cache
x Integrated DDR2 SDRAM controller, 32-bit wide, up to 366 MHz clock (DDR2-800),
supporting 32 MB, 64 MB, 128 MB, and 256 MB single-rank memory configurations
x Separately licensed, the PNX5120EH comes with an easy-to-use System Design-in
Toolkit (SDT), which includes the NXP Picture Quality Tuning Tool, firmware image containing the NXP proprietary Picture Improvement features, and GPL-licensed U­Boot Bootloader software.
x DDR2-400 to DDR2-800 data rates supported x PCI/XIO (V2.2) operating at 33 MHz x Two UARTs x Two I2C DMA interfaces (100 kHz/400 kHz); the second I2C can be used as a
debugging interface
x 16 GPIO pins x Five PWM outputs x Support for 8-bit NOR flash up to 64 MB x Support for 8-bit/16-bit NAND flash up to 128 MB
c) PNX5120EH - Block Diagram
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7. FPGA (Spartan-3E)
XC3S1200E
a) General Description
The Spartan™-3E family of Field-Programmable Gate Arrays (FPGAs) is specifically designed to meet the needs of high volume, cost-sensitive consumer electronic applications. The five-member family offers densities ranging from 100,000 to 1.6 million system gates,
The Spartan-3E family builds on the success of the earlier Spartan-3 family by increasing the amount of logic per I/O, significantly reducing the cost per logic cell. New features improve system performance and reduce the cost of configuration. These Spartan-3E enhancements, combined with advanced 90 nm process technology, deliver more
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The Spartan-3E family builds on the success of the earlier Spartan-3 family by increasing the amount of logic per I/O, significantly reducing the cost per logic cell. New features improve system performance and reduce the cost of configuration. These Spartan-3E enhancements, combined with advanced 90 nm process technology, deliver more
functionality and bandwidth per dollar than was previously possible, setting new standards in the programmable logic industry. Because of their exceptionally low cost, Spartan-3E FPGAs are ideally suited to a wide range of consumer electronics applications, including broadband access, home networking, display/projection, and digital television equipment. The Spartan­3E family is a superior alternative to mask programmed ASICs. FPGAs avoid the high initial cost, the lengthy development cycles, and the inherent inflexibility of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary, an impossibility with ASICs.
b) Features
• Very low cost, high-performance logic solution for high-volume, consumer-oriented
applications
• Proven advanced 90-nanometer process technology
• Multi-voltage, multi-standard SelectIO™ interface pins
- Up to 376 I/O pins or 156 differential signal pairs
- LVCMOS, LVTTL, HSTL, and SSTL single-ended signal standards
- 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling
- 622+ Mb/s data transfer rate per I/O
- True LVDS, RSDS, mini-LVDS, differential HSTL/SSTL differential I/O
- Enhanced Double Data Rate (DDR) support
- DDR SDRAM support up to 333 Mb/s
• Abundant, flexible logic resources
- Densities up to 33,192 logic cells, including optional shift register or distributed RAM support
- Efficient wide multiplexers, wide logic
- Fast look-ahead carry logic
- Enhanced 18 x 18 multipliers with optional pipeline
- IEEE 1149.1/1532 JTAG programming/debug port
• Hierarchical SelectRAM™ memory architecture
- Up to 648 Kbits of fast block RAM
- Up to 231 Kbits of efficient distributed RAM
• Up to eight Digital Clock Managers (DCMs)
- Clock skew elimination (delay locked loop)
- Frequency synthesis, multiplication, division
- High-resolution phase shifting
- Wide frequency range (5 MHz to over 300 MHz)
• Eight global clocks plus eight additional clocks per each half of device, plus abundant low-
skew routing
• Configuration interface to industry-standard PROMs
- Low-cost, space-saving SPI serial Flash PROM
- x8 or x8/x16 parallel NOR Flash PROM
- Low-cost Xilinx Platform Flash with JTAG
• Complete Xilinx ISE™ and WebPACK™ development system support
• MicroBlaze™ and PicoBlaze™ embedded processor cores
• Fully compliant 32-/64-bit 33 MHz PCI support
• Low-cost QFP and BGA packaging options
- Common footprints support easy density migration
- Pb-free packaging options
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Low-cost QFP and BGA packaging options
- Common footprints support easy density migration
- Pb-free packaging options
8. 1Gb F-die DDR2-1066 SDRAM (U41-U42-U8-U9)
Samsung K4T1G084QF
a) Key Features
• JEDEC standard VDD = 1.8V ± 0.1V Power Supply
•VDDQ = 1.8V ± 0.1V
• 533MHz fCK for 1066Mb/sec/pin
• 8 Banks
• Posted CAS
• Programmable CAS Latency: 4, 5, 6, 7
• Programmable Additive Latency: 3, 4, 5. 6
• Write Latency(WL) = Read Latency(RL) -1
• Burst Length: 4 , 8(Interleave/nibble sequential)
• Programmable Sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
• Off-Chip Driver(OCD) Impedance Adjustment
• On Die Termination
• Special Function Support
- PASR(Partial Array Self Refresh)
- 50ohm ODT
- High Temperature Self-Refresh rate enable
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C
• All of products are Lead-free, Halogen-free, and RoHS compliant
The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x 8 banks, 8Mbit x 16 I/Os x 8 banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1066Mb/sec/pin (DDR2-1066) for general applications.
The chip is designed to comply with the following key DDR2 SDRAM features such as posted CAS with additive latency, write latency = read latency - 1, Off-Chip Driver(OCD) impedance adjustment and On Die Termination. All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the crosspoint of differential clocks (CK rising and CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fashion. The address
bus is used to convey row, column, and bank address information in a RAS/CAS multiplexing style. For example, 1Gb(x8) device receive 14/10/3 addressing.
The 1Gb DDR2 device operates with a single 1.8V ± 0.1V power supply and 1.8V ± 0.1V VDDQ.
The 1Gb DDR2 device is available in 60ball FBGA(x8) and 84ball FBGA(x16).
43
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
bus is used to convey row, column, and bank address information in a RAS/CAS multiplexing style. For example, 1Gb(x8) device receive 14/10/3 addressing.
The 1Gb DDR2 device operates with a single 1.8V ± 0.1V power supply and 1.8V ± 0.1V VDDQ.
The 1Gb DDR2 device is available in 60ball FBGA(x8) and 84ball FBGA(x16).
b) Pinning
c) Electrical Characteristics
44
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
9. 32M x 16 bit DDRII Synchronous DRAM (U28-U29)
EtronTech EM68B16CWPA
a) Key Features
• JEDEC Standard Compliant
• JEDEC standard 1.8V I/O (SSTL_18-compatible)
• Power supplies: VDD & VDDQ = +1.8V ± 0.1V
• Operating temperatue: 0 – 85 °C
• Supports JEDEC clock jitter specification
• Fully synchronous operation
• Fast clock rate: 333/400MHz
• Differential Clock, CK & CK#
• Bidirectional single/differential data strobe
-DQS & DQS#
• 4 internal banks for concurrent operation
• 4-bit prefetch architecture
• Internal pipeline architecture
• Precharge & active power down
• Programmable Mode & Extended Mode registers
• Posted CAS# additive latency (AL): 0, 1, 2, 3, 4, 5
• WRITE latency = READ latency - 1 tCK
• Burst lengths: 4 or 8
• Burst type: Sequential / Interleave
• DLL enable/disable
• Off-Chip Driver (OCD)
-Impedance Adjustment
-Adjustable data-output drive strength
• On-die termination (ODT)
• RoHS compliant
• Auto Refresh and Self Refresh
• 8192 refresh cycles / 64ms
• Package: 84-ball 10x12.5x1.2mm (max) FBGA
- Pb and Halogen Free
The EM68B16C is a high-speed CMOS Double-Data-Rate-Two (DDR2), synchronous dynamic random-access memory (SDRAM) containing 512 Mbits in a 16-bit wide data I/Os. It is internally configured as a quad bank DRAM, 4 banks x 8Mb addresses x 16 I/Os The device is designed to comply with DDR2 DRAM key features such as posted CAS# with additive latency, Write latency = Read latency -1, Off-Chip Driver (OCD) impedance adjustment, and On Die Termination(ODT). All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling) All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS#) in a source synchronous fashion. The address
9. 32M x 16bit DDRII Synchronous DRAM (U28-U29)
45
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
The EM68B16C is a high-speed CMOS Double-Data-Rate-Two (DDR2), synchronous dynamic random-access memory (SDRAM) containing 512 Mbits in a 16-bit wide data I/Os. It is internally configured as a quad bank DRAM, 4 banks x 8Mb addresses x 16 I/Os The device is designed to comply with DDR2 DRAM key features such as posted CAS# with additive latency, Write latency = Read latency -1, Off-Chip Driver (OCD) impedance adjustment, and On Die Termination(ODT). All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling) All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS#) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in RAS #, CAS#
multiplexing style. Accesses begin with the registration of a Bank Activate command, and then it is followed by a Read or Write command. Read and write accesses to the DDR2 SDRAM are 4 or 8-bit burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Operating the four memory banks in an interleaved fashion allows random access operation to occur at a higher rate than is possible with standard DRAMs. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. A sequential and gapless data rate is possible depending on burst length, CAS# latency, and speed grade of the
device.
The EM68B16C is a high-speed CMOS Double-Data-Rate-Two (DDR2), synchronous dynamic random-access memory (SDRAM) containing 512 Mbits in a 16-bit wide data I/Os. It is internally configured as a quad bank DRAM, 4 banks x 8Mb addresses x 16 I/Os The device is designed to comply with DDR2 DRAM key features such as posted CAS# with additive latency, Write latency = Read latency -1, Off-Chip Driver (OCD) impedance adjustment, and On Die Termination(ODT). All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling) All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS#) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in RAS #, CAS# multiplexing style. Accesses begin with the registration of a Bank Activate command, and then it is followed by a Read or Write command. Read and write accesses to the DDR2 SDRAM are 4 or 8-bit burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Operating the four memory banks in an interleaved fashion allows random access operation to occur at a higher rate than is possible with standard DRAMs. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. A sequential and gapless data rate is possible depending on burst length, CAS# latency, and speed grade of the device.
b) Pinning
46
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
10. 4Gbit NAND Flash Memory (U35)
ST NAND04G-B2D
a) Key Features
Ŷ+LJKGHQVLW\1$1')ODVK0HPRU\
– Up to 8 Gbit memory array – Cost-effective solution for mass storage applications
Ŷ1$1'LQWHUIDFH
– x8 or 16x bus width – Multiplexed address/data
Ŷ6XSSO\YROWDJH9RU9GHYLFH Ŷ3DJHVL]H
– x8 device: (2048 + 64 spare) bytes – x16 device: (1024 + 32 spare) words
Ŷ%ORFNVL]H
– x8 device: (128K + 4 K spare) bytes – x16 device: (64K + 2 K spare) words
Ŷ0XOWLSODQHDUFKLWHFWXUH
– Array split into two independent planes – Program/erase operations can be performed on both planes at the same time
Ŷ3DJHUHDGSURJUDP
– Random access: 25 µs (max) – Sequential access: 25 ns (min) – Page program time: 200 µs (typ) – Multiplane page program time (2 pages): 200 µs (typ)
Ŷ&RS\EDFNSURJUDPZLWKDXWRPDWLFHUURU
detection code (EDC)
Ŷ&DFKHUHDGPRGH Ŷ)DVWEORFNHUDVH
– Block erase time: 1.5 ms (typ) – Multiblock erase time (2 blocks):
1.5 ms (typ)
Ŷ6WDWXV5HJLVWHU Ŷ(OHFWURQLFVLJQDWXUH Ŷ&KLS(QDEOHµGRQ¶WFDUH¶ Ŷ6HULDOQXPEHURSWLRQ Ŷ+LJKGHQVLW\1$1')ODVK0HPRU\
– Up to 8 Gbit memory array – Cost-effective solution for mass storage applications Ŷ1$1'LQWHUface – x8 or 16x bus width – Multiplexed address/data
Ŷ6XSSO\YROWDJH9RU9GHYLFH Ŷ3DJHVL]H
– x8 device: (2048 + 64 spare) bytes – x16 device: (1024 + 32 spare) words
Ŷ%ORFNVL]H
– x8 device: (128K + 4 K spare) bytes – x16 device: (64K + 2 K spare) words
Ŷ0XOWLSODQHDUFKLWHFWXUH
– Array split into two independent planes – Program/erase operations can be performed on both planes at the same time
Ŷ3DJHUHDGSURJUDP
– Random access: 25 µs (max) – Sequential access: 25 ns (min) – Page program time: 200 µs (typ) – Multiplane page program time (2 pages): 200 µs (typ)
Ŷ&RS\EDFNSURJUDPZLWKDXWRPDWLFHUURU
detection code (EDC)
Ŷ&DFKHUHDGPRGH Ŷ)DVWEORFNHUDVH
– Block erase time: 1.5 ms (typ) – Multiblock erase time (2 blocks):
1.5 ms (typ)
Ŷ6WDWXV5HJLVWHU Ŷ(OHFWURQLFVLJQDWXUH Ŷ&KLS(QDEOHµGRQ¶WFDUH¶ Ŷ6HULDOQXPEHURSWLRn
47
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
b) Pinning
48
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
11. 128Mbit NAND Flash Memory (U17)
ST NAND128-A
a) Key Features
Ŷ+,*+'(16,7<1$1')/$6+
MEMORIES – Up to 1 Gbit memory array – Up to 32 Mbit spare area – Cost effective solutions for mass storage applications
Ŷ1$1',17(5)$&(
– x8 or x16 bus width – Multiplexed Address/ Data – Pinout compatibility for all densities
Ŷ6833/<92/7$*(
– 1.8V device: VDD = 1.7 to 1.95V – 3.0V device: VDD = 2.7 to 3.6V
Ŷ3$*(6,=(
– x8 device: (512 + 16 spare) Bytes – x16 device: (256 + 8 spare) Words
Ŷ%/2&.6,=(
– x8 device: (16K + 512 spare) Bytes – x16 device: (8K + 256 spare) Words
Ŷ3$*(5($'352*5$0
– Random access: 12µs (max) – Sequential access: 50ns (min) – Page program time: 200µs (typ)
Ŷ&23<%$&.352*5$002'(
– Fast page copy without external buffering
Ŷ)$67%/2&.(5$6(
– Block erase time: 2ms (Typ)
Ŷ67$7865(*,67(5 Ŷ(/(&7521,&6,*1$785( Ŷ&+,3(1$%/(µ'21¶7&$5(¶
OPTION – Simple interface with microcontroller
Ŷ6(5,$/180%(5237,21 Ŷ+$5':$5('$7$3527(&7,21
– Program/Erase locked during Power Transitions
Ŷ'$7$,17(*5,7<
– 100,000 Program/Erase cycles – 10 years Data Retention
Ŷ5R+6&203/,$1&(
– Lead-Free Components are Compliant with the RoHS Directive
Ŷ'(9(/230(17722/6
– Error Correction Code software and hardware models – Bad Blocks Management and Wear Leveling algorithms – File System OS Native reference software – Hardware simulation models
b) Pinning
49
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
I/O3 I/O2
I/O6
R
RB
NC
I/O4
I/O7
AI07585B
NAND Flash
(x8)
12
1
13
24 25
36
37
48
E
I/O1
NC
NC
NC
NC
NC
NC
NC
WP
W
NC
NC
NC
V
SS
V
DD
AL
NC NC
CL
NC
I/O5
NC
NC
NC
I/O0
NC NC
NC
NC
NC V
DD
NC NC NC
V
SS
NC
NC
NC
NC
I/O3
I/O9
I/O2
I/O6
R
RB
NC
I/O14
I/O12
I/O10
I/O4
I/O7
AI07559B
NAND Flash
(x16)
12
1
13
24 25
36
37
48
I/O8
E
I/O1
I/O11
NC
NC
NC
NC
NC
NC
NC
WP
W
NC
NC
NC
V
SS
V
DD
AL
NC NC
CL
NC
I/O13
I/O15
I/O5
V
SS
NC
V
SS
I/O0
NC NC
NC
NC
NC
V
DD
50
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
12. USB Interface
USB ports are directly connected concept IC, BCM 3556.
USB ciecuit has 2 main parts:
x Protection IC (U4) x Over Curent Protection IC (U108-U109)
I/O3 I/O2
I/O6
R
RB
NC
I/O4
I/O7
AI07585B
NAND Flash
(x8)
12
1
13
24 25
36
37
48
E
I/O1
NC
NC
NC
NC
NC
NC
NC
WP
W
NC
NC
NC
V
SS
V
DD
AL
NC NC
CL
NC
I/O5
NC
NC
NC
I/O0
NC NC
NC
NC
NC V
DD
NC NC NC
V
SS
NC
NC
NC
NC
I/O3
I/O9
I/O2
I/O6
R
RB
NC
I/O14
I/O12
I/O10
I/O4
I/O7
AI07559B
NAND Flash
(x16)
12
1
13
24 25
36
37
48
I/O8
E
I/O1
I/O11
NC
NC
NC
NC
NC
NC
NC
WP
W
NC
NC
NC
V
SS
V
DD
AL
NC NC
CL
NC
I/O13
I/O15
I/O5
V
SS
NC
V
SS
I/O0
NC NC
NC
NC
NC
V
DD
13. CI Interface
17MB70 Digital CI ve Smart Card Interface Block diagram:
51
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
13. CI Interface
17MB70 Digital CI ve Smart Card Interface Block diagram:
14. DVB-C/T2 Demodulator
Sony CXD2820R
a) Key Features
DESCRIPTION
The Sony CXD2820R is a combined DVB-T2, DVB-T and DVB-C demodulator that conforms to the ETSI EN 302-755 (second generation Terrestrial) ETSI EN 300-744 (Terrestrial) and ETSI EN 300-429 (Cable) standards.
The CXD2820R is a DVB-T2 demodulator offering class-leading performance, optimised BOM requiring no external memory and low processor overhead. It includes a highly integrated dual-core DVB-T and DVB-C demodulator which complies with all relevant European performance standards.
FEATURES DVB-T2
• Supports all DVB-T2 modes, including
• Single and multiple-PLPs
• SISO and MISO transmission
• Simple API
• Fully-automatic acquisition
• Fully-automatic L1-signalling decoding
• Automatic guard-interval detection
• Automatically-calculated constant-rate TS output (using L1
signalling and ISSY)
• Acquisition range ±857kHz
• Stream processor for automatic common- and data-PLP combination
• Null-packet insertion
• Access to channel echo profile and constellation via I2C
FEATURES DVB-C
• Wide symbol range, 0.7 to 7.2Msym/s
• Integrated matched filter 0.15 roll-off factor
• Auto Acquisition controller with fast re-acquisition mode, 15ms typ.
• Programmable acquisition range ±500kHz
• 2.8us echo cancellation at 7.2Msym/s
• Low impl. loss 0.4dB @ 64QAM and <1.0dB @ 256QAM typ.
• Enhanced channel scanning performance through improved rejection of non-digital signals
• Access to channel SNR, constellation data and dynamic equaliser tap values via I2C
52
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
Stream processor for automatic common- and data-PLP combination
Null-packet insertion
Access to channel echo profile and constellation via I2C
FEATURES DVB-C
Wide symbol range, 0.7 to 7.2Msym/s
Integrated matched filter 0.15 roll-off factor
Auto Acquisition controller with fast re-acquisition mode, 15ms typ.
Programmable acquisition range ±500kHz
2.8us echo cancellation at 7.2Msym/s
Low impl. loss 0.4dB @ 64QAM and <1.0dB @ 256QAM typ.
Enhanced channel scanning performance through improved rejection of non-digital signals
Access to channel SNR, constellation data and dynamic equaliser tap values via I2C
APPLICATIONS
• Set Top Boxes
• IDTV with Digital only or Hybrid Tuner Support
• PC TV
• PVRs and recordable DVD players
• Test equipment
GENERAL FEATURES
• Single, 41MHz crystal (can be shared with CXD2813R analogue demod IC)
• High performance differential signal ADC
• RF power level monitor ADC
• Low IF and high IF (36MHz) mode input
• Fast 400kHz I2C compatible bus interface
• Quiet I2C interface for dedicated tuner control
• Automatic IF AGC and optional programmable RF AGC/GPIO functions
• Configurable parallel and serial MPEG-2 TS outputs with smoothing buffer
• 3.3V, 2.5V, 1.2V supplies
• Temperature range -20°C to +85°C
• 64 pin exposed-pad LQFP 10mm x 10mm package
• Supplied with full reference design, including software driver, PCB schematic/layouts, GUI and documentation
b) Block Diagram
㪚 㪯 㪛 㪉 㪏 㪉 㪇 㪩
OSC
PLL
TSCLK
10-bit
ADC
12-bit
ADC
AGC
TS IF
I2C IF
SCL
SDA
41MH z
AIN P/ AINM
RFAIN
IFA G C/ RFAGC
TUNERCLK
TUNERDAT
DV B-T2
Co re
DVB-C
Co re
TSVALID
TSSYNC
TSERR
TSDATA
㪫 㫌 㫅 㪼 㫉
㪤 㪧 㪜 㪞
㪛 㪼 㪺 㫆 㪻 㪼 㫉
LDPC/
BCH
Decoder
Vi terb i/
RS D ecoder
Str eam
Processor
TS
Smoothing
D VB-T
Co re
53
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
c) Pinning
OSC
PLL
TSCLK
10-bit
ADC
12-bit
ADC
AGC
TS IF
I2C IF
SCL
SDA
41MH z
AIN P/
AINM
RFAIN
IFA G C/
RFAGC
TUNERCLK
TUNERDAT
DV B-T2
Co re
DVB-C
Co re
TSVALID TSSYNC
TSERR
TSDATA
LDPC/
BCH
Decoder
Vi terb i/
RS D ecoder
Str eam
Processor
TS
Smoothing
DV B-T
Co re
54
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
GPIO0 1 I/O General purpose I/O
5V tolerant
Controllable pull-up
TSERR _GPIO2 2 O
TS error flag
General purpose I/O
5V tolerant
Controllable pull-up
TSSYNC 3 O TS sync flag
Controllable pull-up
Selectable output current
TSVALID 4 O TS valid flag
Controllable pull-up
Selectable output current
TSCLK 5 O TS clock output
Controllable pull-up
Selectable output current
VSS 6 㧙Digital Ground n/a
CVDD 7
1.2V digital power supply
n/a
MVDD 8
1.2V digital power supply
n/a Supplies memory power
MVSS 9 㧙Digital Ground n/a
VSS 10 㧙Digital Ground n/a
DVDD 11
3.3V digital power supply
n/a
TSDATA0 12 O TS data output
Controllable pull-up
Selectable output current
TSDATA1 13 O TS data output
Controllable pull-up
Selectable output current
CVDD 14
1.2V digital power supply
n/a
VSS 15 㧙Digital Ground n/a
TSDATA2 16 O TS data output
Controllable pull-up
Selectable output current
TSDATA3 17 O TS data output
Controllable pull-up
Selectable output current
MVSS 18 㧙Digital Ground n/a
MVDD 19
1.2V digital power supply
n/a Supplies memory power
CVDD 20
1.2V digital power supply
n/a
VSS 21 㧙Digital Ground n/a
Name No. I/O Function Equivalent Circuit Note
55
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
Name No. I/O Function Equivalent Circuit Note
supply
MVSS 42 㧙Digital Ground n/a
PVSS 43 㧙Analog Ground n/a
PVDD 44
1.2V analog power supply
n/a Supplies PLL power
XVDD 45
2.5V analog power supply
n/a
Supplies crystal oscillator
power
XTALO 46 O Crystal oscillator output
Leave open when external
clock input to XTALI
XTALI 47 I Crystal oscillator input
External clock input pin
XVSS 48 㧙Analog Ground n/a
AINM 49 I IF input (-)
AINP 50 I IF input (+)
AVSS 51 㧙Analog Ground n/a
AVDD 52
2.5V analog power supply
n/a Supplies IF ADC power
RFAIN 53 I RF level monitor
RVDD 54
3.3V digital power supply (*1)
n/a
Supplies RF level monitor
ADC power
VSS 55 㧙Digital Ground n/a
CVDD 56
1.2V digital power
supply
n/a
TUNERDAT 57 I/O Tuner I2C data
5V tolerant
TUNERCLK 58 O Tuner I2C clock
5V tolerant
DVDD 59
3.3V digital power
supply
n/a
VSS 60 㧙Digital Ground n/a
CVDD 61
1.2V digital power
supply
n/a
PLLBPN 62 I PLL bypass
5V tolerant 1: Use PLL
0: Bypass PLL
RFAGC_GPIO1 63 I/O
RFAGC output
General purpose I/O
PWM output
5V tolerant
Controllable pull-up
CAUTION: intermediate
voltage input is prohibited.
IFAGC 64 O IFAGC output
PWM output
CAUTION: 5V input is
prohibited.
56
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
Name No. I/O Function Equivalent Circuit Note
TSDATA4 22 O TS data output
Controllable pull-up
Selectable output current
TSDATA5 23 O TS data output
Controllable pull-up
Selectable output current
TSDATA6 24 O TS data output
Controllable pull-up
Selectable output current
TSDATA7 25 O TS data output
Controllable pull-up
Selectable output current
VSS 26 㧙Digital Ground n/a
DVDD 27
3.3V digital power supply
n/a
SCL 28 I I2C clock
5V tolerant
SDA 29 I/O I2C data
5V tolerant
CVDD 30
1.2V digital power
supply
n/a
VSS 31 㧙Digital Ground n/a
TESTMODE 32 I Test mode setting
5V tolerant
1: Test mode
0: Normal mode
A0 33 I
I
2
C slave address
selection
5V tolerant
OSCENBN 34 I Oscillator enable
5V tolerant
1: Stop
0: Run
VSS 35 㧙Digital Ground n/a
CVDD 36
1.2V digital power
supply
n/a
RESETN 37 I Hardware reset
5V tolerant
OSCMODE 38 I
3rd overtone crystal
selection
5V tolerant
1: fundamental
0: 3rd overtone
MVSS 39 㧙Digital Ground n/a
MVDD 40
1.2V digital power
supply
n/a Supplies memory power
MVDD 41 㧙1.2V digital power n/a Supplies memory power
57
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
MSB1222( DVB-C/T Demodulator)
The MSB1222 contains a superior COFDM demodulator that is Nordig Unified
1.0.3/2.0, D-Book5.0, E-Book, DVB-T compliant. It can be used in all 2K, 4K and 8K modes with 5, 6, 7 and 8 MHz channels and is capable of receiving all modes of transmission.
The MSB122 also includes a QAM demodulator which supports 16, 32, 64, 128 and
256 QAM while being compliant to DVB-C, ITU_T J.83 Annex A/C and China GY/T 170-
2001. The device includes low-power, high performance A/D converters capable of
accepting direct IF at 36/44 MHz. Furthermore, it supports low IF and ZIF signaling.
Features
x DVB-T Demodulator
o Compliant with DVB-T o All digital demodulation and timing recovery loops o CCI and ACI rejection capability o Impulse-Noise suppression o Direct 36MHz, 44MHz IF sampling scheme from tuner
x DVB-C Demodulator
o Compliant with DVB-C(EN300429) and ITU-T J.83 Annex A/C o Supports symbol rates up to 7M Baud o Single IF filter bandwidth for all symbol rates
x Configurable parallel/serial MPEG2 transport stream interface x Supports I2C interface
Figure 22: MSB1222 Block Diagram
RF_AGC IF_AGC
I2CM_SCL I2CM_SDA
I2CM_SCL I2CM_SDA
RF_AGC IF_AGC
DIF_1 DIF_2
TS_MCLK TS_MSYNC TS_MVALD
TUN_RESET
5V_SYS
3V3_SYS
PWR_6V6
TS_MD[7..0]
I2C_SCL_S I2C_SDA_S
RF_AGC
IF_AGC
I2CM_SCL
I2CM_SDA
DIF_1 DIF_2
PWR_6V6
02_MSB1222
5V_SYS 3V3_SYS
TS_MCLK TS_MSYNC TS_MVALD
TUN_RESET
I2C_SCL_S I2C_SDA_S
I2CM_SCL I2CM_SDA
RF_AGC IF_AGC
DIF_1 DIF_2
TS_MD[7..0]
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15. LOW POWER&CEC MICROCONTROLLER
NEC uPD78F0503
Pinning
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CEC Circuit Design for CEC option:
3V3_STBY
27k
R1008
3V3_STBY
4k7
R996
3V3_STBY
CEC_OUT
UC_CEC
CEC
3V3_STBY
C922
100n
16V
50V
47p
C924
1N4148
D53
47k
R1001
R1000
12k
10k
R1003
50V
4n7
C925
10k
R1002
R999
12k
3V3_STBY
R1005
220R
Q129 BC848B
R1006
220R
C921
16V
100n
R1007
470R
R997
4k7
U115
LM358D
8 7
5
6
4
3
2
1
OUT1 IN1- IN1+ GND
IN2- IN2+
OUT2
VCC
CEC Circuit Design for CEC option:
16. HDMI SWITCH
Silicon Image SiI9287B
a) Key Features
x Four-input, single-output HDMI port processor x Improved ESD protection on all signals connected to HDMI connector x Integrated TMDS receiver and transmitter cores capable of receiving and transmitting at
2.25 Gbps: x InstaPort™ viewing technology x MHL support x Supports video resolutions up to 1080p, 60 Hz, 12­bit or 720p/1080i, 120 Hz, 12-bit x Built-in adaptive equalizer provides long cable support even at Deep Color resolutions, enabling the SiI9287B device to work with noisy signals and many sources, making the sink devices highly interoperable x Receiver fully complies with DVI 1.0, HDCP 1.3 and HDMI 1.3a specifications.
3V3_STBY
27k
R1008
3V3_STBY
4k7
R996
3V3_STBY
CEC_OUT
UC_CEC
CEC
3V3_STBY
C922
100n
16V
50V
47p
C924
1N4148
D53
47k
R1001
R1000
12k
10k
R1003
50V
4n7
C925
10k
R1002
R999
12k
3V3_STBY
R1005
220R
Q129 BC848B
R1006
220R
C921
16V
100n
R1007
470R
R997
4k7
U115
LM358D
8 7
5
6
4
3
2
1
OUT1 IN1- IN1+ GND
IN2- IN2+
OUT2
VCC
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b) Block Diagram
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Figure 8. Pin Diagram
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Pin Name
Dir Description
R0X0P 68
R0X0N 67
TMDS Input TMDS input Port 0 data pair for HDMI and MHL.
R0X1P 70
R0X1N 69
R0X2P 72
R0X2N 71
TMDS Input TMDS input Port 0 data pairs for HDMI.
R0XCP 66
R0XCN 65
TMDS Input TMDS input Port 0 clock pair for HDMI and MHL.
R1X0P 4
R1X0N 3
TMDS Input TMDS input Port 1 data pair for HDMI and MHL.
R1X1P 6
R1X1N 5
R1X2P 8
R1X2N 7
TMDS Input TMDS input Port 1 data pairs for HDMI.
R1XCP 2
R1XCN 1
TMDS Input TMDS input Port 1 clock pair for HDMI and MHL.
R2X0P 14
R2X0N 13
TMDS Input TMDS input Port 2 data pair for HDMI and MHL.
R2X1P 16
R2X1N 15
R2X2P 18
R2X2N 17
TMDS Input TMDS input Port 2 data pairs for HDMI.
R2XCP 12
R2XCN 11
TMDS Input TMDS input Port 2 clock pair for HDMI and MHL.
R3X0P 22
R3X0N 21
TMDS Input TMDS input Port 3 data pair for HDMI and MHL.
R3X1P 24
R3X1N 23
R3X2P 26
R3X2N 25
TMDS Input TMDS input Port 3 data pairs for HDMI.
R3XCP 20
R3XCN 19
TMDS Input TMDS input Port 3 clock pair for HDMI and MHL.
HDMI Transmitter Port Pins
Signal Name Pin
Type
Dir
Description
TX0P 60
TX0N 61
TX1P 58
TX1N 59
TX2P 56
TX2N 57
TMDS Output HDMI Output Port Data.
TMDS Low Voltage Differential Signal output data pairs.
TXCP 62
TXCN 63
TMDS Output HDMI Output Port Clock.
TMDS Low Voltage Differential Signal output clock pair.
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Pin Name
Dir Description
R0X0P 68
R0X0N 67
TMDS Input TMDS input Port 0 data pair for HDMI and MHL.
R0X1P 70
R0X1N 69
R0X2P 72
R0X2N 71
TMDS Input TMDS input Port 0 data pairs for HDMI.
R0XCP 66
R0XCN 65
TMDS Input TMDS input Port 0 clock pair for HDMI and MHL.
R1X0P 4
R1X0N 3
TMDS Input TMDS input Port 1 data pair for HDMI and MHL.
R1X1P 6
R1X1N 5
R1X2P 8
R1X2N 7
TMDS Input TMDS input Port 1 data pairs for HDMI.
R1XCP 2
R1XCN 1
TMDS Input TMDS input Port 1 clock pair for HDMI and MHL.
R2X0P 14
R2X0N 13
TMDS Input TMDS input Port 2 data pair for HDMI and MHL.
R2X1P 16
R2X1N 15
R2X2P 18
R2X2N 17
TMDS Input TMDS input Port 2 data pairs for HDMI.
R2XCP 12
R2XCN 11
TMDS Input TMDS input Port 2 clock pair for HDMI and MHL.
R3X0P 22
R3X0N 21
TMDS Input TMDS input Port 3 data pair for HDMI and MHL.
R3X1P 24
R3X1N 23
R3X2P 26
R3X2N 25
TMDS Input TMDS input Port 3 data pairs for HDMI.
R3XCP 20
R3XCN 19
TMDS Input TMDS input Port 3 clock pair for HDMI and MHL.
HDMI Transmitter Port Pins
Signal Name Pin
Type
Dir Description
TX0P 60
TX0N 61
TX1P 58
TX1N 59
TX2P 56
TX2N 57
TMDS Output HDMI Output Port Data.
TMDS Low Voltage Differential Signal output data pairs.
TXCP 62
TXCN 63
TMDS Output HDMI Output Port Clock.
TMDS Low Voltage Differential Signal output clock pair.
Pin Name
Type
Dir
DSCL0 DSCL1 DSCL2 DSCL3
30 34 40 44
LVTTL Schmitt
Open drain
5-V tolerant
Input DDC I
2
C Clock for respective port.
These signals are true open drain, and do not pull-down to ground when power is not applied to the device. These pins require an external pull-up resistor.
R0PWR5V R1PWR5V R2PWR5V R3PWR5V
32 36 42 46
Power Input 5V Port detection input for respective port.
Connect to 5V signal from HDMI input connector. These signals require a 10 series resistor and at least a 1 F capacitor to ground. A 100 k pull­down resistor is also required for these signals.
CBUS_HPD0 CBUS_HPD1 CBUS_HPD2 CBUS_HPD3
31 35 41 45
LVTTL
5-V tolerant
Output Hot Plug Detect Output for respective port.
Connect to HOTPLUG of HDMI input connector. In MHL mode, this serves as the respective port control bus.
R4PWR5V 49 Power Input 5V Standby power or 5V power from 5th Receiver port.
If this signal is connected to the VGA cable then it requires a 10 ohm series resistor and at least a 1 F capacitor to ground. If connected to a local power supply the resistor is not needed but a capacitor of at least 1 F is recommended.
DSDA0 DSDA1 DSDA2 DSDA3
29 33 39 43
LVTTL Schmitt
Open drain
5-V tolerant
Input
Output
DDC I
2
C Data for respective port.
These signals are true open drain, and do not pull-down to ground when power is not applied to the device. These pins require an external pull-up resistor.
Pin Name
Type
Dir
CSDA 53
LVTTL Schmitt
Open drain
5-V tolerant
Input
Output
Local Configuration/Status I
2
C Data.
Chip configuration/status is accessed using this I
2
C port. This pin is a true
open drain, so it does not pull to ground if power is not applied.
DSCL4 48
LVTTL Schmitt
5-V tolerant
Input DDC I2C Clock for VGA port.
These signals are true open drain, and do not pull-down to ground when power is not applied to the device. This pin requires an external pull-up resistor.
DSDA4 47
LVTTL Schmitt
5-V tolerant
Input
output
DDC I
2
C Data for VGA port.
These signals are true open drain, and do not pull-down to ground when power is not applied to the device. This pin requires an external pull-up resistor.
CSCL 54
Schmitt
Open drain
5-V tolerant
Input Local Configuration/Status I
2
C Clock.
Chip configuration/status is accessed using this I
2
C port. This pin is a true
open drain, so it does not pull to ground if power is not applied.
Pin Name
Dir
INT 52
Schmitt
Open drain
8 mA
5-V tolerant
Input
Output
Interrupt Output. This is an open-drain output and requires an external pull-up resistor.
RSVDL RSVDL
10 28
Reserved pin
These pins must be tied to ground with a 10 k or less resistor during normal operation. Connecting directly to ground is recommended.
TPWR_CI2CA 55
LVTTL
8 mA
5-V tolerant
Input
Output
I
2
C Slave Address input / Transmit Power Sense Output.
At the end of power-on-reset (POR), this pin is used as an input to latch the I
2
C sub-address. The level on this pin is latched when the POR transitions from the asserted state to the de-asserted state. After completion of POR, this pin is used as the TPWR output, indicating that the selected HDMI input port is receiving an active TMDS clock. This pin has an internal pull-up to the MICOMVCC33 power supply. If this signal is pulled-down, a 4.7K ohm resistor should be used.
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Pin Name
Type
Dir
CSDA 53
LVTTL Schmitt
Open drain
5-V tolerant
Input
Output
Local Configuration/Status I
2
C Data.
Chip configuration/status is accessed using this I
2
C port. This pin is a true
open drain, so it does not pull to ground if power is not applied.
DSCL4 48
LVTTL Schmitt
5-V tolerant
Input DDC I
2
C Clock for VGA port.
These signals are true open drain, and do not pull-down to ground when power is not applied to the device. This pin requires an external pull-up resistor.
DSDA4 47
LVTTL Schmitt
5-V tolerant
Input
output
DDC I
2
C Data for VGA port.
These signals are true open drain, and do not pull-down to ground when power is not applied to the device. This pin requires an external pull-up resistor.
CSCL 54
Schmitt
Open drain
5-V tolerant
Input Local Configuration/Status I
2
C Clock.
Chip configuration/status is accessed using this I
2
C port. This pin is a true
open drain, so it does not pull to ground if power is not applied.
Pin Name
Dir
INT 52
Schmitt
Open drain
8 mA
5-V tolerant
Input
Output
Interrupt Output. This is an open-drain output and requires an external pull-up resistor.
RSVDL RSVDL
10 28
Reserved pin
These pins must be tied to ground with a 10 k or less resistor during normal operation. Connecting directly to ground is recommended.
TPWR_CI2CA 55
LVTTL
8 mA
5-V tolerant
Input
Output
I
2
C Slave Address input / Transmit Power Sense Output.
At the end of power-on-reset (POR), this pin is used as an input to latch the I
2
C sub-address. The level on this pin is latched when the POR transitions from the asserted state to the de-asserted state. After completion of POR, this pin is used as the TPWR output, indicating that the selected HDMI input port is receiving an active TMDS clock. This pin has an internal pull-up to the MICOMVCC33 power supply. If this signal is pulled-down, a 4.7K ohm resistor should be used.
Pin Name
Pin
Type
Direct
ion
Description
CEC_A 50
CEC Compliant
5-V tolerant
Input
Output
HDMI compliant CEC I/O used for interfacing to CEC devices. This signal is electrically compliant with the CEC specification. It connects
to the CEC signal of all HDMI connectors in the system. As an input, this pin acts as a LVTTL Schmitt triggered input and is 5-V
tolerant. As an output, the pin acts as an NMOS driver with resistive pull-up. This pin has an internal pull-up resistor.
CEC_D 51
LVTTL Schmitt
Open drain
5-V tolerant
Input
Output
CEC interface to local system. This pin is an open drain and requires an external pull-up resistor. This pin
typically connects to a local CPU if the CEC functions are performed by the CPU directly, and not the CEC controller inside the device.
Pin Name
Power and Ground Pins
Signal Name
Type
VCC33 9, 27, 64 Power Analog and digital core VCC. Must be supplied at 3.3 V.
MICOM_VCC33 37 Output
During normal mode, this pin provides 3.3 V power to an external microcontroller. The maximum output current is 30 mA. This pin requires 1 F capacitor to ground.
SBVCC33 38 Power
3.3V standby power. If 3.3V standby mode is not used, this pin should be left as not connected.
ePAD ePad Ground ePad must be connected to Ground.
All analog and digital ground planes are tied together to the ePad, which must be connected to Ground.
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17. LNB supply and control IC
ST LNBH23L
a) Key Features
Ŷ&RPSOHWHLQWHUIDFHEHWZHHQ/1%DQG,ð&EXV Ŷ%XLOW-in DC-DC converter for single 12 V supply operation and high efficiency (typ. 93%
@0.5 A)
Ŷ6HOHFWDEOHRXWSXWFXUUHQWOLPLWE\H[WHUQDOUHVLVWRU Ŷ&RPSOLDQWZLWKPDLQVDWHOOLWHUHFHLYHUVRXWSXWYROWDJHVpecification Ŷ$X[LOLDU\PRGXODWLRQLQSXW(;70SLQIDFLOLWDWHV'L6(T&;HQFRGLQJ Ŷ$FFXUDWHEXLOW-in 22 kHz tone generator suits widely accepted standards Ŷ/RZ-drop post regulator and high efficiency step-up PWM with integrated power NMOS
allow low power losses
Ŷ2YHUORDGDQGRYHU-temperature internal protections with I²C diagnostic bits Ŷ/1%VKRUWFLUFXLWG\QDPLFSURWHFWLRQ Ŷ- 4 kV ESD tolerant on output power pins
Applications
Ŷ67%VDWHOOLWHUHFHLYHUV Ŷ79VDWHOOLWHUHFHLYHUV Ŷ3&FDUGVDWHOOLte receivers
Description Intended for analog and digital satellite receivers, the LNBH23L is a monolithic voltage regulator and interface IC, assembled in QFN32 5 x 5 specifically designed to provide the 13 / 18 V power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna dish or to the multi-switch box. In this application field, it offers a complete solution with extremely low component count, low power dissipation together with simple design and I²C standard interfacing.
b) Block Diagram
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b) Block Diagram
18. Software Update
18.1 Main SW update
In MB70 project you can update the main IC software by using USB ports. You can find the SW update procedure below.
1. Software files should copy directly inside of a flash memory(not in a folder).
2. Put flash memory to the tv when tv is powered off.
3. Power on the and wait. TV will power-up itself.
4. If First Time Installition screen comes, it means software update procedure is succesful.
5. You can check the SW release name from service menu.
18.2 Panel Configuration File update
In MB70 project you can update the panel Configuration file by using USB ports. You can find the update procedure below.
1. Please copy panel configuration files to USB root.
2. Turn power to OFF by remote controler and plug the USB to TV.
3. Turn power to ON by using remote controler.
4. TV standby led will blink rapidly during the sw update. Please wait approximately for 1-2 minutes.
5. TV will open automatically with the new panel configurations.
SOFTWARE UPDATE
18.3 Stby-Microcontroller file update
1. Please copy Standby micro-controller file to USB root.
2. You have to use Service Menu for standby micro-controller files update.
3. To access the service menu push “menu” button and enter the password “4725” while
menu icons are on screen.
4. Plug the USB to TV.
5. Please choose “USB Operations” tab to update standby-micro sw file by using remote
controler.
6. Please wait approximately for 30 seconds
To reach the latest sw files please use;
https://www.vestelservice.com/100359/New_Projects/Sharp/Sharp_2011/9_Customer _support/SW/
Power on the TV and wait, led will be blinking till TV will power up.
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TROUBLESHOOTING
18.3 Stby-Microcontroller file update
1. Please copy Standby micro-controller file to USB root.
2. You have to use Service Menu for standby micro-controller files update.
3. To access the service menu push “menu” button and enter the password “4725” while menu icons are on screen.
4. Plug the USB to TV.
5. Please choose “USB Operations” tab to update standby-micro sw file by using remote controler.
6. Please wait approximately for 30 seconds
To reach the latest sw files please use;
https://www.vestelservice.com/100359/New_Projects/Sharp/Sharp_2011/9_Customer _support/SW/
19. Troubleshooting
A. No Backlight Problem
19. Troubleshooting
Problem: If TV is working, led is normal and there is no picture and backlight on the panel
Possible causes: Backlight pin, dimming pin, backlight supply, stby on/ off pin.
BACKLIGHT ON/OFF pin should be high when the backlight is ON. R185 must be low qhen the backlight
Is OFF. If it is a problem, please check Q131 ant the panel cables.
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Dimming pin sholud be high or square wave in open position. If it is low, please check S32 fo BRCM
side and pnael or power cables, connectors.
STBY_ON/OFF_NOT should be high for standby condition, please check R203.
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STBY_ON/OFF_NOT should be high for standby condition, please check R203.
B. CI Module Problem
x CI supply should be 5V when CI module inserted. If it is not 5V please check
CI_PWR_CTRL, this pin should be low.
Problem: CI is not Working when CI module inserted
Possible causes: Supply, supply control pin, detect pins, mechanical position of pins
●CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL,
this pin should be low.
●
Please check mechanical position of CI module. Is it inserted properly or not?
● Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
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C. Staying in Stand-by Mode
Problem: Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
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D. IR Problem
Problem: LED OR IR not working
Check LED card supply on MB70 chasis
E. Keypad Touchpad Problems
Problem: Keypad or Touchpad is not working
Check keypad supply on MB70
E. Keypad Touchpad Problems
Problem: Keypad or Touchpad is not working
Check keypad supply on MB70.
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F. USB Problems
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
G. No Sound Problem
Problem: No audio at main TV speaker outputs.
Check supply voltages of VDD_AUDIO, 8V_VCC and 12V_VCC with a voltage-meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
H. Standby On/Off Problem
Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is good
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to check SW printouts via Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection.
I. No Signal Problem
Problem: No signal in TV mode.
Check tuner supply voltage; 5V_TUN. Check tuner options are correctly set in Service menu. Check AGC voltage at RF_AGC pin of tuner.
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to check SW printouts via Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection.
I. No Signal Problem
Problem: No signal in TV mode.
Check tuner supply voltage; 5V_TUN. Check tuner options are correctly set in Service menu. Check AGC voltage at RF_AGC pin of tuner.
20. Service Menu Settings
In order to reach service menu, First Press “MENU” buton, then write “4725” by uisng remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition, you can make changes on video, audio etc. by using video settings, audio settings titles.
SERVICE MENU SETTINGS
Service Menu Main Screen
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Video Settings
Audio Settings
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Options-1 Menu
Options-2 Menu
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Tuner Settings Menu
Source Settings Menu
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Diagnostic Menu
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NOTES:
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BLOCK DIAGRAM
21. General Block Diagram
LVDS
CI
NAND512W3A
FLASH 512MBit
Main Speaker 4R&8R 2x6W, 2x8W, 2x15W
TPA3110
Panel
Vcc SW
SC1 Pin8
STBY_ON/OFF
AMP_Mute
YPbPr
YPbPr/PC Audio L/R
Scart1 L/R In
4 Layer PCB
POWER
BLOCK
3V3_VCC
24V_VCC
VCC_33V
VCC_5V
StBy_5V
StBy_3V3
VCC_3V3
Backlight On/Off
Backlight Dimming
Dimming
Dimming Circuitry
Dimming
Mech_SW
W FRC LVDS
Connector (dual/Quad)
HP
CXA3813
Audio Buffer
HP Out
Line In R/L
Line In
CVBS
HP
DDR2
32Mx16 RAM
DDR2
32Mx16 RAM
1V8_VCC
XTAL 27MHz
WO FRC LVDS
Connector (single/dual)
I2C
64Kb NVM
NAND128W3A
FLASH 128MBit
PNX5120&5130
ME/MC &
1080p@100/
120Hz
Sc1_R_IN
Sc1_G_IN
Sc1_B_IN
Sc1_FB_IN
S
c
1
_
L
/
R
O
u
t
SC2 Pin8
Scart2 L/R In
Sc2_C_IN
Sc2_R_IN
Sc2_G_IN
Sc2_B_IN
Sc2_FB_IN
S
c
2
_
L
/
R
O
u
t
TV_Link
SCART1
SCART2
NVM/NAND_WP
PDP_IRQ
PDP_DISP_EN
PDP_PARITY
I2C[Buffered]
MAIN
Speaker
3V3_VCC
VESTEL ELECTRONICS TV R&D GROUP
17MB70 Block Diagram Ver 1.1
DATE :
29.12.2009
Bulent Okan
Drawn By :
Kerem Dirik
5V
Enable_3V3
Panel_VCC
Dimming
Pop_Noise
Circuit
XTAL
VCC_1V8
StBy_1V25
VCC_1V25
Sc1_CVBS_OUT
Sc2_CVBS_OUT
Side_CVBS
POP noise
circuit
Line Out
Sc2_CVBS/Y_IN
Sc1_CVBS_IN
LM358D
LM358D
TUNER_CVBS
NLAST66
QSS_SW
TUNER_CVBS
STBY2
LNBP
LNB
Voltage
IQ
DVB-S2 TS
12V_VCC
RESET_IC
DVB-S2_INT
H/V Selection
LNB POWER ENABLE
DISEQC
LNB_OVERLOAD
VCC_1V0
LVDS
MAIN
Speaker
TS&Control_Out
TS&Control_In
CI_5V_EN
5V_VCC
CI_INT
74LVT244
74LVT244
DDR2 128Mx8 RAM
DDR2 128Mx8 RAM
1V8_VCC
Sub Woofer
Amp
TPA3112
AMP_Mute
24V_VCC
Sub
Woofer
VGA
RGB+H/V
DDC
AZ099-4S
ESD
Protection
ST2042
USB Power
Supply Switch
5V_VCC
ST2042
USB Power
Supply Switch
5V_VCC
AZ099-4S
ESD
Protection
SPDIF
RJ45
4 HDMI
TMDS
I2C
INT
TPWR
HP
Analog+DVB
T/T2/C
TRANSPORT
STREAM
XTAL
DVB T2/C
SONY
CXD
2820R
RESET_IC
DIGITAL_IF
1V25_VCC
3V3_VCC
Tuner_I2C
IF_AGC
I2C
XTAL
DVB
C MSB 1224
RESET_IC
1V8_VCC
3V3_VCC
I2C
DIGITAL_IF
IF_AGC
Tuner_I2C
DVB S/
S2
Tuner
+
Demod
I2C
INTTPWR
Analog IF
Analog
IF
VIDEO INPUTS 3xRGB or YPbPr
3xCVBS 1xVGA 3xSVHS
6X
Audio In
Stby uC
<250mW
I2C
or
UART
STBY
ON/OFF
IR
LED
TMDS
PIXELLENCE 2
LVDS
I2C
ScartMain
2 Gb option
FPGA option
5/12
V
LCD
PANEL
DIG. CLK.
MHL
BCM4505
DDR2 128Mx8 RAM
DDR2 128Mx8 RAM
81
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
OVERALL WIRING DIAGRAM
22. LC32LE340E/EV/RU - LC32LE343E Overall Wiring Diagram
PL 306 CN 29 CN26 CN 20
1
24V 1 3V3_V CC
1
GND
1
GND
2
24V 2 PW_K E YB O AR D
2 2 PANE L_V C C
3
24V 3 24V_V CC
3 3 PANE L_V C C
4
24V 4 24V_V CC
4 4 PANE L_V C C
5
24V 5 GND
5 5 PANE L_V C C
6
GND 6 GND
6 6 PANE L_V C C
7
GND 7 3V3_V CC
7 OP TIO N1 7
8
GND 8 5V_V CC
8 OP TIO N2 8
9
GND 9 3V3_V CC
9 OP TIO N3 9
GND
10
A/D_DIM_S E L 10 5V_ VC C
10 OP T ION 4 10 TX _3_A N
11
DIM_P WM_A NAL OG 11 3 V3_V C C
11 OP T ION 5 11 TX _3_A P
12 B L_ ON/O FF _1
12 5 V_V C C
12 TX _1_A N 12 TX_3_B N
13 4 V2_S T B Y
13 TX _1_A P 13 TX _3_B P
14 4 V2_S T B Y
14 TX _1_B N 14 TX_3 _CN
PL 205
15 5 V_S T BY
15 TX _1_B P 15 TX _3_C P
1
GND 16 1 8V_V C C
16 TX _1_C N 16
GND
2
GND 17 1 2V_V C C
17 TX _1_C P 17 TX _3_C LK N
3
SW _SW IT CH 18 1 2V_V C C
18
GND
18 T X_ 3_CL K P
4
GND 19 D IMMIN G
19 TX _1_C LK N 1 9
GND
5
ST _BY 20 GND
20 TX _1_C LK P 20 TX _3_DN
6
GND 21 B AC K LIG HT _ON /OF F_N OT
21
GND
21
TX_3 _DP
7
BL_O N/OF F 22 GND
22 TX _1_D N 22 T X_3 _EN
8
GND 23 S T BY _O N/OF F
23 TX _1_D P 23
TX_3 _E P
9
DIM_P WM_A NAL OG 24 G ND
24 TX _1_E N 24
GND
10
GND 25 M EC H_ SW IT CH
25 TX _1_E P 2 5
GND
11
12V_1 2 6 GND
26
GND
26 T X_ 4_AN
12
12V_1 2 7 GND
27 P ANE L_V C C 27 T X_4_A P
13
5VS TB Y 28 G ND
28 TX _2_A N 28
TX_4 _BN
14
24V_1
29 TX _2_A P 29 TX _4_B P
15
4V25 _ST B Y
30 TX _2_B N 30 TX_4 _CN
16
4V25 _ST B Y
31 TX _2_B P 31 TX _4_C P
17
VCC _3V 3_O N
32 TX _2_C N 32 TX_4_C L KN
18
5V
33 TX _2_C P 33 TX _4_C LK P
19
VCC _3V 3_O N
34 G ND 34
GND
20
5V
35 TX _2_C LK N 3 5 TX_4_ DN
21
VCC _3V 3_O N
36 TX _2_C LK P 36 TX _4_DP
22
5V
37 G ND 37
GND
23
GND
38 TX _2_D N 38 T X_4 _EN
39 TX _2_D P 39 TX_4 _E P
40 TX _2_E N 40
GND
41 TX _2_E P 4 1
GND
24
GND
42 G ND
25
VCC _A UDIO
43 G ND 44 G ND 45 G ND 46 G ND 47 P ANE L_V C C 48 P ANE L_V C C 49 P ANE L_V C C 50 P ANE L_V C C 51 P ANE L_V C C
26
ST _BY 2
PL 100
PL 101
27
A/D_DIM_S E L
CN 17
CN 4
CN 8
28
A/D_DIM_S E L
1 R_A UDI O_P 1 GN D 1 ME C H_S W ITC H
2 R_A UDI O_N 2 3V3_ST BY 2 PW_K EY B OAR D 3 L_AU DIO _P 3 LE D 1 3 GND 4 L_AU DIO _N 4 IR _IN 4 3V3_ST B Y
5 5V_S T BY 5 TOU CH _SD A
6 T OUC H_S C L
1 G ND 2 L ED 2 3 L ED 1 4 IR _I N 5 5V _S TB Y
TO UC H P AD B OAR D
MODE L
MAIN BO AR D
POW E R S UP P LY
LC 32LE 3 40E & LC 32 LE 340 EV
LC 32LE 3 40R U & L C 32LE 3 41S
LC 32LE 3 41E K & LC 32L E3 43E
MB70
PW 07
SP E AK E R R IG HT SP E AK E R LE F T
PW 07 PO WE R S U PP LY B OA RD
LE D I R B OAR D
MB70 / PW07 OVERALL WIRING DIAGRAM
PA NE L T-C ON B OAR D
PA NE L INV ER T E R B OAR D
AC
POWER
PLUG
LED/IR CABLE
SPEAKER CABLE
INVERTER CABLE
ROCKER SWITCH
DC CABLE
LVDS FFC CABLE
INCLUDED IN LED BOARD
Part Code 30071176
Part Code 20570885
I NCLUDED IN SPEAKERS
Part Code 30070913
Part Code 30069612
82
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC40LE340E/EV/RU - LC40LE343E Overall Wiring Diagram
PL 306 CN 29 CN 4
1
24V 1 3V3_V C C
1
GND
2
24V 2 PW_ KE Y BO AR D
2
3
24V 3 24V_V C C
3
4
24V 4 24V_V C C
4
5
24V 5 GND
5
6
GND 6 GND
6
7
GND 7 3V3_V C C
7 OP TI ON1
8
GND 8 5V_V CC
8 OP TI ON2
9
GND 9 3V3_V C C
9 OP TI ON3
10
A/D_DIM_S E L 10 5V _VC C
10 OP T ION 4
11
DIM_P WM_A NAL OG 11 3 V3 _VC C
11 OP T ION 5
12 BL_O N/OF F_1
12 5 V_V C C
12 T X_1_A N
13 4 V2 _ST B Y
13 T X_1_A P
14 4 V2 _ST B Y
14 T X_1_B N
PL 205
15 5 V_S T BY
15 T X_1_B P
1
GND 16 1 8V _VC C
16 T X_1_C N
2
GND 17 1 2V _VC C
17 T X_1_C P
3
SW _S WIT C H 18 12V _VC C
18
GND
4
GND 19 D IMMI NG
19 T X_1_C LK N
5
ST _BY 20 G ND
20 T X_1_C LK P
6
GND 21 B AC K LIG HT _O N/OF F_N OT
21
GND
7
BL_O N/OF F 22 G ND
22 T X_1_D N
8
GND 23 S T B Y_O N/OF F
23 T X_1_D P
9
DIM_P WM_A NAL OG 24 G ND
24 T X_1_E N
10
GND 25 M E CH _SW IT CH
25 T X_1_E P
11
12V_1 26 G ND
26
GND
12
12V_1 27 G ND
27 P ANE L _VC C
13
5VS T BY 28 GN D
28 T X_2_A N
14
24V_1
29 T X_2_A P
15
4V25 _S TB Y
30 T X_2_B N
16
4V25 _S TB Y
31 T X_2_B P
17
VCC _3 V3_O N
32 T X_2_C N
18
5V
33 T X_2_C P
19
VCC _3 V3_O N
34 G ND
20
5V
35 T X_2_C LK N
21
VCC _3 V3_O N
36 T X_2_C LK P
22
5V
37 G ND
23
GND
38 T X_2_D N
24
GND
39 T X_2_D P
25
VCC _A UDIO
40 T X_2_E N
26
ST _BY 2
41 T X_2_E P
27
A/D_DIM_S E L
42 G ND
28
A/D_DIM_S E L
43 G ND 44 G ND 45 G ND 46 G ND 47 P ANE L _VC C 48 P ANE L _VC C 49 P ANE L _VC C 50 P ANE L _VC C 51 P ANE L _VC C
PL 100
PL 101
CN 17
CN 4
CN 8
1 R_A UDI O_P 1 GND 1 MEC H_S W ITC H
2 R_A UDI O_N 2 3V 3_S TB Y 2 PW_K EY B OAR D 3 L_AU DIO _P 3 LED1 3 GND 4 L_AU DIO _N 4 I R_I N 4 3V3_S TB Y
5 5V_S T BY 5 TOUC H _SD A
6 T OU CH _SC L
1 G ND 2 L E D 2 3 L E D 1 4 IR _I N 5 5V _S TB Y
TO UC H P AD B OAR D
MODE L
MAIN BO AR D
POW E R S UP P LY
LC 40LE 3 40E & LC 40 LE 340 EV
LC 40LE 3 40R U & L C 40LE 3 41S
LC 40LE 3 41E K & LC 40L E3 43E
MB70
PW 07
SP E AK E R R IG HT SP E AK E R LE F T
PW 07 PO WE R B OAR D
LE D I R B OAR D
MB70 / PW07 OVERALL WIRING DIAGRAM
PA NE L T-C ON B OAR D
PA NE L INV ER T E R B OAR D
AC
POWER
PLUG
LED/IR CABLE
SPEAKER CABLE
INVERTER CABLE
ROCKER SWITCH
DC
CABLE
LVDS FFC CABLE
Part Code 30071844
Part Code 30071217
Part Code 30071262
I NCLUDED IN SPEAKERS
I N CLUDED IN LED BOARD
Part Code 30069612
83
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
23. SCHEMATIC DIAGRAMS
HDMI1- USB - ETHERNET & KEYBOARD Schematic Diagram
17mb70-5p
MB70 HW_TEAM
16
HDMI1-USB-ETHERNET&KEYBOARD
26-05-2011_11:34
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
BCM3556
U1
R2
T1
U1
U2
R1
T2
V1
V2
N3
N2
P3
P2
W4
AC4
T5
R5
U4
P6
P5
U6
V4
V3
V5
AA3
W2
W3
Y1
Y2
AA2
AA1
AB2
AB1
AA5
AA6
Y6
AB3
AG1
AC1
AC2
AD1
AD2
AE1
AE2
AF1
AF2
HDMI_RX_0_DATA2_P HDMI_RX_0_DATA2_N
HDMI_RX_0_DATA1_P HDMI_RX_0_DATA1_N
HDMI_RX_0_DATA0_P HDMI_RX_0_DATA0_N
HDMI_RX_0_CLK_P HDMI_RX_0_CLK_N
HDMI_RX_0_CEC_DAT
HDMI_RX_0_DDC_SCL HDMI_RX_0_DDC_SDA
HDMI_RX_0_HTPLG_IN HDMI_RX_0_HTPLG_OUT
HDMI_RX_1_DATA2_P HDMI_RX_1_DATA2_N
HDMI_RX_1_DATA1_P HDMI_RX_1_DATA1_N
HDMI_RX_1_DATA0_P HDMI_RX_1_DATA0_N
HDMI_RX_1_CLK_P HDMI_RX_1_CLK_N
HDMI_RX_1_CEC_DAT
HDMI_RX_1_DDC_SCL HDMI_RX_1_DDC_SDA
HDMI_RX_1_HTPLG_IN HDMI_RX_1_HTPLG_OUT
EPHY_RDAC EPHY_VREF
USB_RREF
USB_MONPLL USB_MONCDR
HDMI_RX_0_RESREF
HDMI_RX_1_RESREF
EPHY_RDP EPHY_RDN
EPHY_TDP EPHY_TDN
USB_DP1 USB_DM1
USB_PWRON_1
USB_PWRFLT_1
USB_DP2 USB_DM2
USB_PWRON_2
USB_PWRFLT_2
6
10k
R785
21
S31
50V
100p
C766
4k7
R775
CN34
4
3
2
1
USB_ENABLE1
3V3_STBY
USB2_DN
USB2_DP
USB1_DN
USB1_DP
600R
F73
1
C5V6
D27
21
50V
C579
220p
2V5_VCC
USB_ENABLE
330R
F170
S60
3V3_STBY
47k
R776
2 1
BC848B
Q108
3
2
1
NVM_WP
F65
600R
21
KEYBOARD
1k2
R259
10V
47u
C847
S158
2 1
VFD_RX_SDA
VFD_TX_SCL
S156
2 1
S159
2 1
S157
2 1
TOUCH_SDA
TOUCH_SCL
EEPROM_SCL
EEPROM_SDA
4k7
R773
21
C289 100n 10V
2
1
C947 47u 10V
F56
330R
21
HDMIB_RX1N
HDMIB_RX2N
HDMIB_RX2P
HDMIB_RX0P
4k7
R774
21
R777
47R
21
HDMIB_RX0N
3V3_STBY
BACKLIGHT_ON/OFF
HDMI_TXCP
HDMI_TX0N
HDMI_TX0P
HDMIB_RX1P
HDMI_TX2P HDMI_TX2N
HDMI_TX1P HDMI_TX1N
HDMIB_TXCP HDMIB_TXCN
HDMIB_SDA
HDMIB_SCL
HDMI_TXCN
HDMI_HOTPLUG_IN
600R
F83
21
D22
C5V6
2 1
47R
R444
21
MECH_SWITCH
CN8
65432
1
CN19
432
1
PW_KEYBOARD
F190
1k
F189
1k
TOUCH_SDA
TOUCH_SCL
27k
R1008
3V3_STBY
4k7
R996
3V3_STBY
CEC_OUT
UC_CEC
CEC
3V3_STBY
C922
100n
16V
50V
47p
C924
1N4148
D53
47k
R1001
R1000
12k
10k
R1003
50V
4n7
C925
10k
R1002
R999
12k
3V3_STBY
R1005
220R
HDMIB_HTPLG_OUT
HDMIB_5V
100k
R473
Q129 BC848B
R1006
220R
10V
10u
C522
C921
16V
100n
R1007
470R
R997
4k7
U115
LM358D
8 7
5
6
4
3
2
1
OUT1 IN1- IN1+ GND
IN2- IN2+
OUT2
VCC
R1014
4k7
21
Q131 BC848B
3
2
1
R1015
4k7
21
BACKLIGHT_ON/OFF_NOT
S186
STBY_ON/OFF_NOT
STBY_ON/OFF
Q111 BC848B
3
2
1
3V3_STBY
R786
4k7
21
ETH_TXP ETH_TXN
ETH_RXP ETH_RXN
A_2V5
HDMI_RX_1_VDD2P5
FPF2124
U108
5
43
2
1
VIN
GND
ON ISET
VOUT
CN18
4
3
2
1
U109
FPF2124
5
43
2
1
VIN
GND
ON ISET
VOUT
5V_VCC
USB_SAV_COMMON
S160
47R
R778
21
5V_VCC
AZ099-04S
U4
6
5
4 3
2
1
IO1
GND
IO2IO3
VDD
IO4
R230
10R
21
10R
R231
21
USB1_DP
USB1_DN
CN32
8
7
6
5
4
3
2
1
USB1_VCC
USB2_VCC
10V
10u
C765
330R
F162
21
R232
10R
21
R620
10R
21
USB2_DN
USB2_DP
TP167
1
TP169
1
D37
BAV70
3
2 1
5V_VCC
TP166
1
TP168
1
24LC02
U40
8
5
6
7
4
3
2
1
A0
A1
A2
VSS
WP
SCL
SDA
VCC
HDMIB_5V
HDMIB_SCL
HDMIB_SDA
R788
4k7
21
3V3_VCC
HDMIB_TXCN
CEC
1k
R455
21
HDMIB_SCL
HDMIB_HTPLG_OUT
HDMIB_SDA
CN13
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
12V_VCC
330R
F45
F46
330R
24V_VCC
GS2
SW1
43CT2
1
E2
G4G3G2
G1
E1
R1070
10k
R1074
470R
R1075
2k
D60
C5V6
21
TP253
PL6
PL7
PL8
PL9
PL10
HDMIB_5V
HDMIB_TXCP
HDMIB_RX1P
HDMIB_RX0N
HDMIB_RX0P
HDMIB_RX2P
HDMIB_RX2N
HDMIB_RX1N
4k7
R902
21
USB_ENABLE
3V3_VCC USB_ENABLE1
R901
4k7
21
3V3_VCC
USB1_VCC
USB2_VCC
560R R908
R907
560R
10V
4u7
C859
C860
4u7
10V
16V
100n
C862
16V
C199
100n
16V
10n
C477
C198
16V
100n
16V
C197
100n
R421
47R
R420
47R
ETH_TXN
ETH_TXP
ETH_RXN
ETH_RXP
75R
R344
1kV
1n
C727
R342
75R
R340 75R
R341
75R
R423
47R
R422
47R
JK7
8
7
6
5
4
3
2
1
TX+
TX-
RX+
GND1
GND2
RX-
GND3
GND4
TR1
16
15
14
13
12
11
10
98
7
6
5
4
3
2
1
C861
100n
16V
R248
47k
21
R859
4k7
4k7
R858
3V3_VCC
3V3_VCC
5V_VCC
S128
R249
47k
21
R937 510R
510R
R938
S6
USB_SAV_COMMON
USB INTERFACE
TOUCH_PAD_OPTION
KEYBOARD
30061090_499R
30061090_499R
HDMI (SIL9287)
BLUERAY
Near to USB Inputs
Ethernet lines must be 100ohm differential pairs
Place these capacitors close to transformer
Place these resistors close to STE100P
GROUND TERMINALS
+
Should be close to Pin#40
-
SOURCE
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
84
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
CI AND NAND FLASH & PANEL_SW & DIM Schematic Diagram
17mb70-5p
MB70 HW_TEAM
16
CI AND NAND FLASH&PANEL_SW&DIM
26-05-2011_11:35
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
U1
BCM3556
F6
N24
P24
V24
V23
U23
W24
V25
U25
T23
R24
T25
T24
R23
V28
V27
V26
U27
U26
T27
T26
U24
NAND_DATA0/EBI_DATA8
NAND_DATA1/EBI_DATA9 NAND_DATA2/EBI_DATA10 NAND_DATA3/EBI_DATA11 NAND_DATA4/EBI_DATA12 NAND_DATA5/EBI_DATA13 NAND_DATA6/EBI_DATA14 NAND_DATA7/EBI_DATA15
NAND_ALE/POD_EBI_DSB
NAND_CS0B
NAND_CLE/POD_EBI_TAB NAND_WEB/POD_EBI_WE0B
NAND_REB/POD_EBI_RDB
NAND_RBB/DS_OVST_CLK
SPI_S_MISO
SF_MISO SF_MOSI
SF_SCK SF_CSB
RESET_OUTB
NMIB
RESETB
5
NAND_3V3
3k9
R168
CI_TS_IN_CLK CI_TS_IN_VALID
NAND_3V3
C5 22u 6V3
C137 100n 16V
C239 330p 50V
F7
60R
3V3_VCC
3V3_VCC
R195
4k7
21
3V3_VCC
NAND_3V3
4k7
R219
R171
4k7
2 1
3V3_VCC
74LCX245
U2
20
19
18
17
16
15
14
13
12
1110
9
8
7
6
5
4
3
2
1
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND B8
B7
B6
B5
B4
B3
B2
B1
OE-
VCC
C247 100n 10V
2
1
EBI_RWB
CI_D3
S59
S3
CI_D6
RESET_IC
CI_D4
CI_D7
CI_D5
S24
S58
EBI_CS0B
EBI_CS0B
EBI_RWB
3V3_VCC
R196 4k7
21
PC_WAIT_N
EBI_WE1B
3V3_VCC
C244
100n
10V
2
1
3V3_STBY
RESET_IC
CI_D2
CN131
123456789
10111213141516171819202122232425262728293031323334
353637383940414243444546474849505152535455565758596061626364656667
68
GS11
CI_D0
CI_D1
CI_CE1
CI_CE2
CI_OE
F20
330R
21
CI_WE
50V
C368 1n
CI_IORD
CI_IOWR
RESET_BCM
TP54
1
100R
R375
2 1
GP39_POD_IRQ_N
R273
33R
8 7 6543
2
1
R4
R3
R2
R1
CI_A13
CI_A8
CI_A9
CI_A5
CI_A6
CI_A4
CI_A2
CI_A0
CI_A7
CI_A3
CI_A1
CI_A12
EBI_CS0B
EBI_WE1B
CI_A10
CI_A11
R941
2k7
33R
R271
1 2 3456
7
8
R4
R3
R2
R1
R272
33R
8 7 6543
2
1
R4
R3
R2
R1
R441
47R
2 1
47R
R443
2 1
CI_CD2
R538
150R
21
GP23_POD_VS1_N
PC_WAIT_N
2k7
R940
2k7
R942
C964
22p 50V
50V
22p
C965
S83
21
R20 10k
2 1
100R
R479
8
7
6
5 4
3
2
1
R2
R3
R1
R4
BC858B
Q25
3
2
1
BC848B
Q9
3
2
1
S33
MEGA_DCR_OUT
S32
MEGA_DCR_IN
S86
50V
220p
C588
21
4k7
R181
21
1k
R471
21
4k7
R174
21
C589
50V
220p
21
50V
220p
C590
21
10V
10u
C322
S8
21
S9
21
5V_VCC
3V3_VCC
DIMMING
Q8 BC848B
3
2
1
S84
21
BACKLIGHT_DIM
PANEL_VCC_ON/OFF
R95
10k
2 1
C147
16V
100n
PANEL_VCC
60R
F6
21
47R
R411
21
25V
220n
C66221R478
33k
21
33k
R475
2 1
FDC642P
Q29
2
6543
1
TP3
1
60R
F15
21
F16
60R
21
10k
R94
2 1
5V_VCC
12V_VCC
BC848B
Q6
3
2
1
BC848B
Q18
3
2
1
C160
100n
16V
R172
4k7
21
R939
2k7
NAND_3V3
CI_PWR_CTRL
10k
R377
21
Q107 BC847B
3
2
1
47k
R329
21
47k
R330
21
12V_VCC
C241
100n
10V
2
1
Q106
BSH103
3
2
1
5V_VCC
TP165
1
C290 220u 6V3
C242 100n 10V
2
1
F139
330R
21
CI_PWR
3V3_VCC10k
R13
21
NAND_3V3
NAND_3V3
U35
NAND512-A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
2524
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
NC1
NC2
NC3
NC4
NC5
NC6
RB
R
E
NC7
NC8
VDD1
VSS1
NC9
NC10
CL
AL
W
WP
NC11
NC12
NC13
NC14
NC15 NC16
NC17
NC18
NC19
I/O0
I/O1
I/O2
I/O3
NC20
NC21
NC22
VSS2
VDD2
NC23
NC24
NC25
I/O4
I/O5
I/O6
I/O7
NC26
NC27
NC28
NC29
GP40_DVB_OE_N
U36
74LCX244
20
19
18
17
16
15
14
13
12
1110
9
8
7
6
5
4
3
2
1
1OE-
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND 2A1
1Y4
2A2
1Y3
2A3
1Y2
2A4
1Y1
2OE-
VCC
CI_A5
CI_D5
CI_D7
CI_A10
CI_A11
CI_A8
CI_A14
CI_D4
CI_OE
CI_A13
CI_WE
CI_A6
CI_A4
CI_A2
CI_A0
CI_D1
CI_A7
CI_A3
CI_A1
CI_D0
CI_IORD
CI_D2
CI_A9
CI_D6
CI_CE1
CI_CD1
3V3D_DVB
47R
R410
21
CI_IOWR
GP19_POD_RST
CI_TS_IN_D7
CI_TS_IN_D6
CI_TS_IN_D5
CI_TS_IN_D4
CI_TS_IN_D2
CI_TS_IN_D0
CI_TS_IN_D1
CI_TS_OUT_D2
CI_TS_OUT_D1
CI_TS_OUT_D0
CI_TS_IN_SYNC
CI_TS_IN_D3
CI_D3
CI_TS_OUT_SYNC
CI_TS_OUT_VALID
GP37_POD2CHIP_MCLKI_VS2_N
GP41_DVB_IOIS16_N
CI_TS_IN_VALID
CI_A12
CI_TS_OUT_D3
CI_TS_OUT_D4
CI_TS_OUT_D5
CI_TS_OUT_D6
CI_TS_OUT_D7
CI_CE2
CI_PWRCI_PWR
CI_TS_IN_CLK
R435
47R
21
R539
150R
21
R182
4k7
21
47R
R436
21
R554
47R
876
54
321
R2R3R1
R4
47R
R556
123
45
678
R2R3R1
R4
CI_TS_IN_SYNC
CI_TS_OUT_SYNC
CI_TS_OUT_VALID
CI_TS_OUT_D0 CI_TS_OUT_D1
CI_TS_IN_D4 CI_TS_IN_D5 CI_TS_IN_D6 CI_TS_IN_D7
CI_TS_IN_D3
CI_TS_IN_D1
CI_TS_IN_D0
CI_TS_IN_D2
CI_A14
CI_TS_OUT_D2
CI_TS_OUT_D7
CI_TS_OUT_D6
CI_TS_OUT_D5
CI_TS_OUT_D4
CI_TS_OUT_D3
BCM3556
U1
D26
D27
D28
E26
E27
C25
D24
D25
E23
E24
G23
E25
F23
F24
A27
B27
B28
C26
C27
C28
A28
F25
H23
H24
H25
J23
J24
J25
F26
F27
H28
J26
J28
J27
G26
H27
G25
G24
G27
G28
K23
H26
EBI_WE1B
EBI_RWB
EBI_CLK_OUT
EBI_CLK_IN
ABI_TAB
EBI_CSOB
EBI_ADDR13 EBI_ADDR12 EBI_ADDR11 EBI_ADDR10
EBI_ADDR9 EBI_ADDR8 EBI_ADDR7 EBI_ADDR6 EBI_ADDR5 EBI_ADDR4 EBI_ADDR3 EBI_ADDR2 EBI_ADDR1 EBI_ADDR0
EBI_ADDR15 EBI_ADDR16 EBI_ADDR17 EBI_ADDR18 EBI_ADDR19 EBI_ADDR20 EBI_ADDR21 EBI_ADDR22 EBI_ADDR23 EBI_ADDR24 EBI_ADDR25
EBI_ADDR14
POD2CHIP_MIVAL
POD2CHIP_MISTRT
POD2CHIP_MDI0 POD2CHIP_MDI1 POD2CHIP_MDI2 POD2CHIP_MDI3 POD2CHIP_MDI4 POD2CHIP_MDI5 POD2CHIP_MDI6 POD2CHIP_MDI7
10
3k9
R857
NAND_3V3
16V
100n
C923
10k
R1004
2
1
R15 33R
C335
22p
50V
50V
22p
C337
3V3D_DVB
3V3D_DVB
C333 10u 10V
330R
F301
3V3_VCC
16V
100n
C250
R1044
100k
3V3D_DVB
100k
R1045
3V3D_DVB
100k
R1043
3V3D_DVB
3V3D_DVB
R1042
100k
S203
S202
R40
10k
NAND_DATA_4
NAND_DATA_4
NAND_DATA_4
NAND_DATA_5
NAND_DATA_5
NAND_DATA_5
NAND_DATA_6
NAND_DATA_6
NAND_DATA_6
NAND_DATA_7
NAND_DATA_7
NAND_DATA_7
NAND_ALE
NAND_ALE
NAND_ALE
NAND_CLE
NAND_CLE
NAND_RBB
NAND_RBB
NAND_WEB
NAND_WEB
NAND_WEB
NAND_REB
NAND_REB
NAND_REB
NAND_WPZ
NAND_WPZ
NAND_3V3NAND_3V3
NAND_DATA_0
NAND_DATA_0
NAND_DATA_0
NAND_DATA_1
NAND_DATA_1
NAND_DATA_1
NAND_DATA_2
NAND_DATA_2
NAND_DATA_2
NAND_DATA_3
NAND_DATA_3
NAND_DATA_3
NAND_CS0B
NAND_CS0B
NAND FLASH
PANEL SUPPLY SWITCH
NC
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
85
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
RAM Interface Schematic Diagram
C792 220u 6V3
S81
100n
C639
17mb70-5p
MB70 HW_TEAM
16RAM INTERFACE
26-05-2011_11:35
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
U1
BCM3556
C22
C7
D22
A23
A7
E16
B17
A12
A13
C12
B12
C17
A17
C16
F19
A20
C10
A10
D19
E19
C19
B19
F9
F10
B9
B10
E17
B22
F17
A22
E20
F18
D21
E18
D18
B20
B18
C21
B21
A18
C20
C18
F8
D10
E8
F12
F11
E9
E10
D8
C9
C11
C8
E11
D11
B8
B11
A8
E15
B16
F16
B13
D13
C13
D14
B14
F14
C14
D16
C15
F15
F13
E12
E13
D15
A15
E14
B15
DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03
DDR0_A04 DDR0_A05 DDR0_A06
DDR1_A04 DDR1_A05 DDR1_A06
DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13
DDR01_BA0 DDR01_BA1 DDR01_BA2
DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15
DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1
DDR1_DQS1B
DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1
DDR01_RASB DDR01_CASB
DDR01_WEB
DDR0_CLK
DDR0_CLKB
DDR1_CLK
DDR1_CLKB
DDR01_CKE DDR01_ODT
DDR_VREF0
DDR_VREF1
DDR_VDDP1P8_0 DDR_VDDP1P8_1
DDR_COMP
9
33R
R276
8
7
6543
2
1
R2
R3
R1
R4
DDR01A03
DDR01A02
DDR01A01
DDR01A00
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03
DDR01A07
DDR0A06
DDR0A05
DDR0A04
DDR01_A07
DDR0_A06
DDR0_A05
DDR0_A04
33R
R382
33R
R263
1
2
3456
7
8
R2
R3
R1
R4
DDR01_A08
DDR01_A09
DDR01_A10
33R
R364
DDR01A08
DDR01A09
DDR01A10
DDR01A11
DDR01BA2
DDR01BA1
DDR01BA0
DDR01A12
DDR01_BA2
DDR01_BA1
DDR01_BA0
DDR01_A12
33R
R275
8
7
6543
2
1
R2
R3
R1
R4
R358 240R
33R
R277
1
2
3456
7
8
R2
R3
R1
R4
DDR01_RASB
DDR0_VREF0
DDR0_DQ13
DDR01CASB
DDR01ODT
DDR01WEB
DDR01_ODT
DDR01_WEB
DDR01_CASB
DDR01RASB
C390
1u
6V3
C396
470p
50V
5k1
R362
D_1V8
DDR1_VREF0
D_1V8
5k1
R361
50V
470p
C397
C391
1u
6V3
R360
5k1
5k1
R359
D_1V8
C881 220u 6V3
C245
100n
10V
C253
100n
10V
D_1V8
10V
10u
C419
10V
10u
C882
DDR01CASB
R926
68R
DDR01BA1
DDR01A09
DDR01WEB
DDR01BA0
DDR01A07
DDR01A12
16V
10n
C266
DDR01A13
DDR01A11
DDR01ODT
10n
C884
16V
DDR01A03
DDR01A10
DDR01A01
DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03
DDR0_A04 DDR0_A05 DDR0_A06
DDR1_A04 DDR1_A05 DDR1_A06
DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13
DDR01_BA0 DDR01_BA1 DDR01_BA2
DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12
DDR0_DQ14 DDR0_DQ15
DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15
DDR0_DQS0 DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B DDR1_DQS0 DDR1_DQS0B DDR1_DQS1 DDR1_DQS1B
DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1
DDR01_RASB DDR01_CASB DDR01_WEB
DDR0_CLK DDR0_CLKB DDR1_CLK DDR1_CLKB
DDR01_CKE DDR01_ODT
33R
R288
8
7
6543
2
1
R2
R3
R1
R4
DDR1A06
DDR1A05
DDR1A04
DDR1_A06
DDR1_A05
DDR1_A04
J7 K2 K8 K3 H2 K7 L2 L8
G1 G3 G2 F7 G7 F3 G8 F9
E2
F2 E8 F8
E7 A7 B2 B8 D2 D8 A3 E3 J1 K9
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
U8
NT5TU128MGE-BD
H8 H3 H7 J2 J8 J3
VDD4
VDD3
VDD2
VDD1
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDL
NC2
NC1
NU/RDQSN
DM/RDQS
DQS
DQSN
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS4
VSS3
VSS2
VSS1
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSSDL
CKN
CK
CKE
VREF
ODT
CSN
WEN
CASN
RASN
BA0
BA1
BA2
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DDR01BA2
NT5TU128MGE-BD
U42
H8 H3 H7 J2 J8 J3 J7 K2 K8 K3 H2 K7 L2 L8
G1 G3 G2 F7 G7 F3 G8 F9
E2
F2 E8 F8
E7 A7 B2 B8 D2 D8 A3 E3 J1 K9
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
VDD4
VDD3
VDD2
VDD1
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDL
NC2
NC1
NU/RDQSN
DM/RDQS
DQS
DQSN
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS4
VSS3
VSS2
VSS1
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSSDL
CKN
CK
CKE
VREF
ODT
CSN
WEN
CASN
RASN
BA0
BA1
BA2
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DDR01_A13
DDR01A13
DDR0_VREF0
50V
470p
C880
U41
NT5TU128MGE-BD
H8 H3 H7 J2 J8 J3 J7 K2 K8 K3 H2 K7 L2 L8
G1 G3 G2 F7 G7 F3 G8 F9
E2
F2 E8 F8
E7 A7 B2 B8 D2 D8 A3 E3 J1 K9
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
VDD4
VDD3
VDD2
VDD1
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDL
NC2
NC1
NU/RDQSN
DM/RDQS
DQS
DQSN
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS4
VSS3
VSS2
VSS1
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSSDL
CKN
CK
CKE
VREF
ODT
CSN
WEN
CASN
RASN
BA0
BA1
BA2
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
C872
100n
10V
50V
470p
C878
DDR1_CLKB
DDR1_CLK
DDR0_CLK
DDR0_CLKB
R796 100R
100R
R795
R407
33R
33R
R274
DDR01_A11
DDR1_VREF0
DDR0_VREF0
68R
R412
8
7
6543
2
1
R2
R3
R1
R4
C292
10n
16V
16V
10n
C267
R546
68R
8
7
6543
2
1
R2
R3
R1
R4
R549
68R
16V
C196
10n
DDR1A04
DDR01A00
DDR0A04
DDR01A01
DDR01A02
DDR01A03
DDR0A05
DDR0A06
DDR01ODT
DDR1A05
DDR01A07
DDR01A08
DDR01A09
DDR1A06
DDR01A10
SC2596
U105
8
5
6
7
4
3
2
1
GND
EN
VSENSE
VREF
PVCC
AVCC
VDDQ
VTT
DDR_VTT
3V3_VCC
1k
F171
100n
C779
S121
100n
C781
DDR01A11
D_1V8
100n
C783
S120
390k
R797
6V3
220u
C791
DDR01A12
DDR01A13
DDR01BA1
DDR01BA2
DDR01CASB
DDR01WEB
DDR01RASB
DDR01BA0
R547
68R
8
7
6543
2
1
R2
R3
R1
R4
10n
C195
16V
C876
100n
10V
C879
470p
50V
DDR0_VREF0
10V
100n
C873
D_1V8
U9
NT5TU128MGE-BD
H8 H3 H7 J2 J8 J3 J7 K2 K8 K3 H2 K7 L2 L8
G1 G3 G2 F7 G7 F3 G8 F9
E2
F2 E8 F8
E7 A7 B2 B8 D2 D8 A3 E3 J1 K9
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
VDD4
VDD3
VDD2
VDD1
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDL
NC2
NC1
NU/RDQSN
DM/RDQS
DQS
DQSN
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS4
VSS3
VSS2
VSS1
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSSDL
CKN
CK
CKE
VREF
ODT
CSN
WEN
CASN
RASN
BA0
BA1
BA2
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DDR1_VREF0
C877
470p
50V
10V
100n
C874
68R
R408
8
7
6543
2
1
R2
R3
R1
R4
R413
68R
8
7
6543
2
1
R2
R3
R1
R4
16V
10n
C291
DDR_VTT
DDR01A08
D_1V8
DDR1_VREF0
D_1V8
DDR01RASB
DDR01A00
DDR01A02
DDR_VTT
16V
C888
10n
68R
R927
8
7
6543
2
1
R2
R3
R1
R4
68R
R928
8
7
6543
2
1
R2
R3
R1
R4
16V
C889
10n
R929
68R
8
7
6543
2
1
R2
R3
R1
R4
10n
C886
16V
R931
68R
8
7
6543
2
1
R2
R3
R1
R4
16V
10n
C887
C885
10n
16V
68R
R930
8
7
6543
2
1
R2
R3
R1
R4
DDR01A03
DDR01A03
DDR01A03
DDR01A03
DDR01A02
DDR01A02
DDR01A02
DDR01A02
DDR01A00
DDR01A00
DDR01A00
DDR01A00
DDR01A01
DDR01A01
DDR01A01
DDR01A01
DDR01A07
DDR01A07
DDR01A07
DDR01A07
DDR01BA2
DDR01BA2
DDR01BA2
DDR01BA2
DDR0_DQS0
DDR01A08
DDR01A08
DDR01A08
DDR01A08
DDR01A09
DDR01A09
DDR01A09
DDR01A09
DDR01A10
DDR01A10
DDR01A10
DDR01A10
DDR01A11
DDR01A11
DDR01A11
DDR01A11
DDR01A12
DDR01A12
DDR01A12
DDR01A12
DDR01BA0
DDR01BA0
DDR01BA0
DDR01BA0
DDR01BA1
DDR01BA1
DDR01BA1
DDR01BA1
DDR01RASB
DDR01RASB
DDR01RASB
DDR01RASB
DDR01CASB
DDR01CASB
DDR01CASB
DDR01CASB
DDR01WEB
DDR01WEB
DDR01WEB
DDR01WEB
DDR01ODT
DDR01ODT
DDR01ODT
DDR01ODT
DDR1_DQS1B
DDR1_DQS1 DDR1_DM1
DDR1_DQS0B
DDR1_DQS0 DDR1_DM0
DDR1_DQ15
DDR1_DQ14
DDR1_DQ13 DDR1_DQ12
DDR1_DQ11
DDR1_DQ09
DDR1_DQ08
DDR1_DQ07 DDR1_DQ06
DDR1_DQ05
DDR1_DQ04 DDR1_DQ03
DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08 DDR0_DQ09
DDR0_DQ10 DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR0_DM1
DDR1_DQ01
DDR1_DQ02
DDR1_DQ10
DDR0_DM0
DDR0_CLK
DDR0_CLK
DDR0_CLKB
DDR0_CLKB
DDR1_CLK
DDR1_CLK
DDR1_CLKB
DDR1_CLKB
DDR01_CKE
DDR01_CKE
DDR01_CKE
DDR01_CKE
DDR0A04
DDR0A04
DDR0A05
DDR0A05
DDR0A06
DDR0A06
DDR1A04
DDR1A04
DDR1A05
DDR1A05
DDR1A06
DDR1A06
DDR01A13
DDR01A13
DDR01A13
DDR01A13
OPEN
OPEN
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
86
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
HDMI ( SIL 9287 ) & MAIN POWER Schematic Diagram
5V_STBY
MHL_POWER
R974 10R
10R
R971
10R
R973
17mb70-5p
MB70 HW_TEAM
16HDMI (SIL9287)&MAIN POWER
26-05-2011_11:36
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
1V8_VCC
TP5
1
100n 50V
C634
5V_ENABLE
HDMI_HOTPLUG_IN
U11
SIL9287B
181716151413121110
987654321
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
3738394041424344454647484950515253
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
VCC33
TXCN
TXCP
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
TPWR_CI2CA
CSCL
CSDA
INT
CEC_D
CEC_A
R4PWR5V
DSCL4
DSDA4
R3PWR5V
CBUS_HPD3
DSCL3
DSDA3
R2PWR5V
CBUS_HPD2
DSCL2
DSDA2
SBVCC33
MICOM_VCC33
R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P
VCC33_2
RSVDL
DSDA0
DSCL0
CBUS_HPD0
R0PWR5V
DSDA1
DSCL1
CBUS_HPD1
R1PWR5V
R1XCN
R1XCP
R1X0N
R1X0P
R1X1N
R1X1P
R1X2N
R1X2P
VCC33_1
RSVDL_1
R2XCN
R2XCP
R2X0N
R2X0P
R2X1N
R2X1P
R2X2N
R2X2P
MCOM_VCCC33
10k
R96
R97 10k
HDMI_TX2P
HDMI_TX2N
HDMI_TX1P
HDMI_TX1N
HDMI_TX0P
HDMI_TX0N
HDMI_TXCP
HDMI_TXCN
HDMI_3V3
HDMI0_RX2P
HDMI0_CLKP
HDMI0_CLKN
HDMI0_RX0N
HDMI0_RX0P
HDMI0_RX1N
HDMI0_RX1P
HDMI0_RX2N
HDMI1_CLKP
HDMI1_CLKN
HDMI1_RX0P
HDMI1_RX0N
HDMI1_RX1P
HDMI1_RX1N
HDMI1_RX2P
HDMI1_RX2N
S18
HDMI_3V3
HDMI2_CLKN
HDMI2_CLKP
HDMI2_RX0N
HDMI2_RX0P
HDMI2_RX1N
HDMI2_RX1P
HDMI2_RX2N
HDMI2_RX2P
SIDE_HDMI_2+
SIDE_HDMI_C-
SIDE_HDMI_C+
SIDE_HDMI_0-
SIDE_HDMI_0+
SIDE_HDMI_1-
SIDE_HDMI_2-
SIDE_HDMI_1+
HDMI_3V3
S2
HDMI0_RX2N HDMI0_RX1P
HDMI0_RX1N
HDMI_0_SCL
HDMI_0_SDA
HDMI0_HTPLG_OUT
C106
16V
100n
47k
R245
21
HDMI_1_SCL
10R
R221
2 1
HDMI0_5V
HDMI_1_SDA
HDMI1_HTPLG_OUT
R242
47k
21
HDMI1_5V
R220
10R
2 1
100n
16V
C104
MCOM_VCCC33
16V
1u
C524
R241
47k
2 1
S19
HDMI_3V3
16V
C169
100n
HDMI2_HTPLG_OUT
HDMI_2_SDA
HDMI_2_SCL
R251
47k
2 1
HDMI2_5V
16V
100n
C151
R224
10R
2 1
SIDE_HDMI_SDA
SIDE_HDMI_HTPLG_OUT
SIDE_HDMI_SCL
SIDE_HDMI_5V
R250
47k
2 1
16V
100n
C150
10R
R223
2 1
S54
5V_VCC
HDMI_INT 22p 50V
C529
C528 22p 50V
HDMISW_SDA
HDMISW_SCL
R243
47k
21
47k
R244
21
CEC
HDMI1_HTPLG_OUT
HDMI1_5V
HDMI_1_SDA
HDMI_1_SCL
HDMI1_RX2N
HDMI1_RX2P
HDMI1_RX1N
HDMI1_RX1P
HDMI1_RX0N
HDMI1_RX0P
HDMI1_CLKN
HDMI1_CLKP
R233
47k
21
CN11
21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R468
1k
21
HDMI0_RX0P
HDMI0_RX0N
HDMI0_CLKN
HDMI0_CLKP
HDMI0_RX2P
HDMI0_5V
HDMI0_HTPLG_OUT
R459
1k
21
CN9
21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
47k
R246
21
R247
47k
21
CEC
HDMI_0_SDA
HDMI_0_SCL
1k2
R472
21
R238
47k
21
CN10
21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HDMI2_CLKP
HDMI2_CLKN
HDMI2_RX0P
HDMI2_RX0N
HDMI2_RX1P
HDMI2_RX1N
HDMI2_RX2P
HDMI2_RX2N
HDMI_2_SCL HDMI_2_SDA
HDMI2_5V
HDMI2_HTPLG_OUT
R467
1k
21
CEC
47k
R239
21
R240
47k
21
R235
47k
21
SIDE_HDMI_5V
SIDE_HDMI_1+
SIDE_HDMI_2-
SIDE_HDMI_1­SIDE_HDMI_0+
SIDE_HDMI_0-
SIDE_HDMI_C+
SIDE_HDMI_C-
SIDE_HDMI_2+
CN12
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SIDE_HDMI_SCL
SIDE_HDMI_HTPLG_OUT
SIDE_HDMI_SDA
R236
47k
21
47k
R237
21
1k
R466
21
CEC
5V_ENABLE
R1055
10k
21
D57
C5V6
Q135 BC848B
10k
R1053
21
R1056
10k
21
8V_VCC
5V_ENABLE
S206
10k
R1054
21
60R
F26
21
3V3_VCC
16V
22u
C558
100n C117
16V
100n
16V
C116
HDMI_3V3
SCL
SDA
3V3_VCC
HDMISW_SDA
HDMISW_SCL
3V3_VCC
S10
S16
R139
10k
R98 10k
TP236
1
TP2371TP238
1
D56
C5V6
4k7
R203
S89
R574
2k
21
33R
R535
4V2_STBY
1V2_VCC
24V_VCC
STBY_ON/OFF
12V_VCC
S39
2 1
200k R560
2 1
R562
30k
2 1
CORE_SENSE
C691
47u 16V
2
1
U21
LM1117
4
3 2
1
GND
OUTIN
VOUT
TP128
1
10R
R972
5V_VCC
1V25_VCCFRC
50V
330p
C235
F18
60R
R1068
10k
C971 10n 16V
F148
50R
21
C172 100n 16V
R1060
10k
220R
R602
100R
R379
50V
56p
C712
2
1
F38
50R
21
68R
R580
2 1
50V
4n7
C685
21
2k
R576
2 1
C550 10u 50V
C966 220n 25V
C955 100n 16V
GS1
GS6
GS4
GS8
S74
21
S76
21
FAN2106
U19
5
4
3
2
27
12
11
10
9
8
7
6
23
22
21
26
28
25
1
24
13
15
18
14
17
20
19
16
AGND
FB
COMP
ILIM
EN
RT
VCC
PGOOD
PWM#
BOOT
RAMP
P3GND
P1SW
GND1 GND2 GND3
SW1 SW2 SW3 SW4 SW5 SW6 SW7
P2VIN
VIN1 VIN2 VIN3 VIN4
2k4
R567
2 1
C683
4n7
50V
2 1
1R5
R565
21
CN29
28 27
26 25
24 23
22 21
20 19
18 17
16 15
14 13
12 11
10 9
8 7
6 5
4 3
2 1
10k
R165
2 1
16V
22u
C546
30k
R563
2 1
200k R559
2 1
10V
10u
C439
2
1
S82
4V2_STBY
S66
16V
100n
C112
S96
1V25_VCCFRC
1V2_VCC
3V3_STBY
S26
U37
LM1117
4
3 2
1
ADJ
OUTIN
VOUT
R612 560R
910R
R619
S40
2 1
3V3_STBY
4V2_STBY
60R
F27
10V
10u
C321
C252 100n 10V
2
1
10V
47u
C761
25V
220n
C657
15u
L33
21
470R
R393
R129
10k
2 1
12V_VCC
2V5_VCC
U38
MP1583
1 2 3 4
8 7 6 5
FB
COMP
EN
SS
GND
SW
IN
BS
TP4
1
1k
R465
21
2u4
L14
21
C543 22u 16V
C545 22u 16V
16V
100n
C208
R202
4k7
STBY_ON/OFF_NOT
PW_KEYBOARD
3V3_VCC
16V
22u
C541
S105
12V_VCC
5V_STBY
12V_VCC
R461
1k
21
R498
10k
21
8V_VCC
12V_VCC
18V_VCC
25V
10u
C749
MECH_SWITCH
16V
22u
C542
4k7
R186
21
3V3_VCC
24V_VCC
5V_VCC
STBY_INFO
DIMMING
4V2_STBY
4V2_STBY
24V_VCC
4k7
R185
S106
S107
16V
22u
C539
C234
330p
50V
F17
60R
50R
F147
21
24V_VCC
16V
100n
C171
R604 220R
R395 100R
R561
200k
2 1
C711 56p
50V
2
1
R579
68R
2 1
C684
4n7
50V
21
R575
2k
2 1
S63
21
S64
21
S65
21
U20
FAN2106
5
4
3
2
27
12
11
10
9
8
7
6
23
22
21
26
28
25
1
24
13
15
18
14
17
20
19
16
AGND
FB
COMP
ILIM
EN
RT
VCC
PGOOD
PWM#
BOOT
RAMP
P3GND
P1SW
GND1 GND2 GND3
SW1 SW2 SW3 SW4 SW5 SW6 SW7
P2VIN
VIN1 VIN2 VIN3 VIN4
5V_VCC
1V2_VCC
R566
2k4
2 1
50V
4n7
C682
2 1
R564
1R5
21
R23
10k
2 1
16V
22u
C538
R558
200k
2 1
C438 10u 10V
2
1
C111 100n 16V
R460
1k
21
L13
2u4
21
C537 22u 16V
16V
22u
C540
C207
100n
16V
12V_VCC
50R
F100
21
10k
R21
21
R458
1k
16V
22u
C535
R3
10k
21
1k
R457
C551 10u 50V
16V
22u
C544
D2
SS33
21
C263
100n
16V
21
C473 10n
16V
2
1
5n6
50V
C737
21
R128
3k9
21
16V
C534 22u
16V
22u
C533
22u 16V
C536
C531 22u 16V
10k
R167
21
C170
100n
10V
21
TP2
1
C532 22u 16V
L32
4u7
C383
1u 6V3
3V3_VCC
33k
R477 10k R124
MP2012
U39
6
5
4 3
2
1
FB
GND
SWPVIN
VIN
EN
16V
C65 100n
3V3_VCC
16V
22u
C530
10V
10u
C523
390k
R399
75k
R398
180k
R397
R983 300R
SIDE_HDMI_0-
C905 10u 50V
C906 10u 50V
SIDE_HDMI_C+
SIDE_HDMI_0+ SIDE_HDMI_C+300R
R982
SIDE_HDMI_C-
R977
1k
3V3_VCC
33k
R980
2 1
47R
R970
2 1
BC848B
Q124
3
2
1
5V_VCC
R981
33k
2 1
FDC642P
Q126
2
6543
1
MHL_CONTROL
MHL_POWER
R962 100R
R961
4k7
21
10V
100n
C912
2
1
3V3_VCC
100R
R963
CEC
R984
20k
2N7002
Q125
3
2
1
5V_VCC
BACKLIGHT_ON/OFF_NOT
NC
1V25_VCC
NC
NC
HDMI1
HDMI0
HDMI2
A/D DIMMING SELECTION
adj.
adj.
Near to side HDMI
NC
Near to HDMI1&2
POWER SOCKET
NC
NC
adj.
adj.
NC
NC
330K
Near to U37
NC
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
87
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
BCM POWER / GND Schematic Diagram
TP106
C349
220u
6V3
U114
LM1117
4321
ADJ
OUT IN
VOUT
C593
22u
6V3
C343 22u 6V3
6V3
22u
C868
C869 22u 6V3
6V3
22u
C870
C871 22u 6V3
C864 22u 6V3
6V3
22u
C865
C866 22u 6V3
6V3
22u
C867
C863 22u 6V3
16V
100n
C161
D_1V8
6V3
22u
C612
U1
BCM3556
G19
A19
G17
G15
A14
G13
G11
G9
A9
AB28
U28
L28
E28
AA19
AA18
AA13
AA12
Y21
W21
V21
U21
T21
R21
P21
N21
M21
L21
K21
J21
H21
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H9
AA8
R8
P8
N8
M8
L8
K8
J8
H8
AC28
T28
AB7
M7
L7
K7
AC7
J7
AD6
AD5
M28
F28
AB23
R11
P11
N11
M11
L11
A11
G10
AA9
D9
G8
N14
M14
L14
G14
V13
U13
T13
R13
P13
N13
M13
M16
N16
P16
R16
T16
U16
V16
AA16
D17
T11
U11
V11
D12
G12
L12
M12
N12
P12
R12
T12
U12
V12
L13
Y22
AA22
W23
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
L17
M17
N17
P17
R17
T17
U17
V17
AA17
G18
L18
M18
N18
P18
R18
T18
U18
V18
AC19
D20
G20
H20
A21
E21
F21
P14
R14
T14
U14
V14
L15
M15
N15
P15
R15
T15
U15
V15
A16
G16
L16
DVSS59 DVSS58 DVSS57 DVSS56 DVSS55 DVSS54 DVSS53 DVSS52 DVSS51 DVSS50 DVSS49 DVSS48 DVSS47 DVSS46 DVSS45 DVSS44 DVSS43 DVSS42 DVSS41 DVSS40 DVSS39 DVSS38 DVSS37 DVSS36 DVSS35 DVSS34 DVSS33 DVSS32 DVSS31 DVSS30 DVSS29 DVSS28 DVSS27 DVSS26 DVSS25 DVSS24 DVSS23 DVSS22 DVSS21 DVSS20 DVSS19 DVSS18 DVSS17 DVSS16 DVSS15 DVSS14 DVSS13 DVSS12 DVSS11 DVSS10
DVSS9 DVSS8 DVSS7 DVSS6 DVSS5 DVSS4 DVSS3 DVSS2 DVSS1 DVSS0
DVSS82
DVSS81
DVSS80
DVSS79
DVSS78
DVSS77
DVSS76
DVSS75
DVSS74
DVSS73
DVSS72
DVSS71
DVSS70
DVSS69
DVSS68
DVSS67
DVSS66
DVSS65
DVSS64
DVSS63
DVSS62
DVSS61
DVSS60
DVSS83 DVSS84 DVSS85 DVSS86 DVSS87 DVSS88 DVSS89 DVSS90 DVSS91 DVSS92 DVSS93 DVSS94 DVSS95 DVSS96 DVSS97 DVSS98 DVSS99 DVSS100 DVSS101 DVSS102 DVSS103 DVSS104 DVSS105 DVSS106 DVSS107 DVSS108 DVSS109 DVSS110 DVSS111 DVSS112 DVSS113 DVSS114 DVSS115 DVSS116
VDDC0 VDDC1 VDDC2 VDDC3 VDDC4 VDDC5 VDDC6 VDDC7 VDDC8 VDDC9 VDDC10 VDDC11 VDDC12 VDDC13 VDDC14 VDDC15 VDDC16 VDDC17 VDDC18 VDDC19 VDDC20 VDDC21 VDDC22 VDDC23 VDDC24 VDDC25
VDDC26
VDDC27
VDDC28
VDDC29
VDDC30
VDDC31
VDDC32
VDDO0
VDDO1
VDDO2
VDDO3
VDDO4
VDDO5
VDDO6
VDDO7
DDRV0
DDRV1
DDRV2
DDRV3
DDRV4
DDRV5
DDRV6
DDRV7
DDRV8
11
C417
10u
10V
C414
10u
10V
C28
100n
16V
C456
10n
16V
C354
1n 50V
C596
4u7
10V
16V
100n
C25
16V
10n
C453
50V
1n
C352
17mb70-5p
MB70 HW_TEAM
16BCM POWER/GND
26-05-2011_11:36
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
10V
4u7
C597
A_1V2
C26
100n
16V
C353
1n 50V
C454
10n
16V
C594
4u7
10V
16V
100n
C23
16V
10n
C451
50V
1n
C350
C24
100n
16V
F92
330R
F93
330R
16V
100n
C21
C22
100n
16V
16V
100n
C19
C20
100n
16V
C360
1n 50V
50V
1n
C361
C358
1n 50V
C608
100n
16V
10V
10u
C421
10V
4u7
C599
C598
4u7
10V
330R
F94
C17
100n
16V
C452
10n
16V
16V
100n
C105
C100
100n
16V
16V
100n
C102
16V
10n
C464
C461
10n
16V
16V
10n
C462
50V
1n
C355
U1
BCM3556
N7
P7
N5
N1
T8
T7
R7
T6
R6
AD20
AE20
AF19
AB24
AA23
AC24
AE4
AA15
AB17
AB12
AA14
AB13
AC14
AB14
AC13
AC15
AB15
AC25
Y7
V6
AB6
V8
U8
W7
V7
U7
W6
W1
U5
Y5
W8
Y8
AG2
AB4
AD4
AB5
AA7
AF28
AF27
AA21
AB22
AF26
AD24
F7
E7
D7
E6
E5
A5
C4
F3
C1
G7
H7
B24
B7
AD26
AD22
AC20
AE23
AC21
AB20
AD23
AC23
AC22
AA20
AB21
AB10
AA10
AB9
AF5
AA11
AB11
N6
P4
P1
N4
R4
T3
T4
R3
U3
AG20
AG21
AC18
AF20
AF25
AC6
AB8
AH3
AB16
AC17
AD11
AD12
AE13
AD16
AB18
AC11
AC12
AD13
AD14
AB26
Y3
W5
Y4
AA4
AD3
AC3
AE3
AC5
AG27
AE26
AB19
F5
F4
F2
F1
B23
A24
A6
AD28
AD27
AD21
AE22
AF23
AC8
AE5
AH27
AGC_VDDO
AUDMX_AVDD2P5 AUDMX_LDO_CAP
AUD_AVDD2P5_0 AUD_AVDD2P5_1 AUD_AVDD2P5_2
CLK54_AVDD1P2 CLK54_AVDD1P5
DDR_BVDD0 DDR_BVDD1 DDR_PLL_LDO
LVDS_TX_AVDDC1P2
LVDS_TX_AVDD2P5_1
LVDS_TX_AVDD2P5_2
LVDS_PLL_VREG
PLL_DS_AVDD1P2
EDSAFE_DVDD1P2
EDSAFE_AVDD2P5
HDMI_RX_0_PLL_DVDD1P2
HDMI_RX_0_VDD1P2 HDMI_RX_0_VDD2P5 HDMI_RX_0_VDD3P3 HDMI_RX_1_PLL_DVDD1P2
HDMI_RX_1_VDD1P2 HDMI_RX_1_VDD2P5 HDMI_RX_1_VDD3P3
PLL_MAIN_AVDD1P2
SD_V1_AVDD1P2 SD_V2_AVDD1P2 SD_V3_AVDD1P2 SD_V4_AVDD1P2 SD_V5_AVDD1P2
SD_V1_AVDD2P5 SD_V2_AVDD2P5 SD_V3_AVDD2P5 SD_V4_AVDD2P5 SD_V5_AVDD2P5
PLL_VAFE_AVDD1P2
POR_OTP_VDD2P5 POR_VDD1P2
SPDIF_AVDD2P5
VCXO_AVDD1P2
VDAC_AVDD1P2
VDAC_AVDD2P5
VDAC_AVDD3P3_1 VDAC_AVDD3P3_2
USB_AVDD1P2PLL
USB_AVDD1P2
USB_AVDD2P5 USB_AVDD2P5REF
USB_AVDD3P3
EPHY_PLL_VDD1P2 EPHY_AVDD1P2 EPHY_AVDD2P5
PLL_RAP_AVD_AVDD1P2
AUDMX_AVSS0 AUDMX_AVSS1 AUDMX_AVSS2 AUDMX_AVSS3 AUDMX_AVSS4 AUDMX_AVSS5 AUD_AVSS_00 AUD_AVSS_01 AUD_AVSS_02 AUD_AVSS_03 AUD_AVSS_04 AUD_AVSS_10 AUD_AVSS_11 AUD_AVSS_12 AUD_AVSS_20 AUD_AVSS_21
CLK54_AVSS
DDR_BVSS0 DDR_BVSS1
LVDS_TX_AVSS0 LVDS_TX_AVSS1 LVDS_TX_AVSS2 LVDS_TX_AVSS3 LVDS_TX_AVSS4 LVDS_TX_AVSS5 LVDS_TX_AVSS6 LVDS_TX_AVSS7 LVDS_TX_AVSS8 LVDS_TX_AVSS9
LVDS_TX_AVSS10
PLL_DS_AGND EDSAFE_AVSS0 EDSAFE_AVSS1 EDSAFE_AVSS2 EDSAFE_AVSS3 EDSAFE_AVSS4
HDMI_RX_0_AVSS0 HDMI_RX_0_AVSS1 HDMI_RX_0_AVSS2 HDMI_RX_0_AVSS3
HDMI_RX_0_AVSS4 HDMI_RX_0_PLL_AVSS HDMI_RX_0_PLL_DVSS
HDMI_RX_1_AVSS0
HDMI_RX_1_AVSS1
HDMI_RX_1_AVSS2
HDMI_RX_1_AVSS3
HDMI_RX_1_AVSS4
HDMI_RX_1_AVSS5
HDMI_RX_1_AVSS6
HDMI_RX_1_AVSS7
HDMI_RX_1_AVSS8
HDMI_RX_0_AVSS HDMI_RX_1_PLL_AVSS HDMI_RX_1_PLL_DVSS
PLL_MAIN_AGND
SD_V1_AVSS_0 SD_V1_AVSS_1 SD_V2_AVSS_0 SD_V2_AVSS_1 SD_V2_AVSS_2 SD_V3_AVSS_0 SD_V3_AVSS_1
SD_V4_AVSS SD_V5_AVSS
PLL_VAFE_AVSS
SPDIF_AVSS
VCXO_AGND0 VCXO_AGND1 VCXO_AGND2 VDAC_AVSS0 VDAC_AVSS1 VDAC_AVSS2
USB_AVSS0 USB_AVSS1 USB_AVSS2 USB_AVSS3 USB_AVSS4
EPHY_AGND_0 EPHY_AGND_1 EPHY_AGND_2
PLL_RAP_AVD_AGND
8
C18
100n
16V
330R
F191
2 1
A_2V5
10V
10u
C415
16V
100n
C107
C15
100n
16V
C449
10n
16V
A_2V5
A_2V5
16V
100n
C850
16V
100n
C16
16V
10n
C447
16V
100n
C13
A_2V5
A_1V2 A_2V5
16V
100n
C14
A_1V2
C11
100n
16V
A_1V2
A_1V2
16V
100n
C149
A_2V5
C148
100n
16V
A_2V5
A_1V2
16V
100n
C210
A_1V2
C615
4u7
10V
A_2V5
C209
100n
16V
C431
10u 10V
C472
10n 16V
A_1V2
A_1V2
16V
100n
C12
C9
100n
16V
A_2V5
A_3V3
A_1V2
16V 10n
C471
16V
100n
C10
A_1V2
A_2V5
C63
100n
16V
A_3V3
10V
4u7
C617
C212
100n
16V
A_1V2
A_1V2
A_2V5
C469
10n
16V
A_1V2
A_2V5
C375
1n 50V
C468
10n 16V
16V
100n
C168
16V
100n
C211
A_2V5
D_1V2
A_2V5
16V
100n
C167
C606
4u7
10V
A_1V2
C61
100n
16V
A_1V2
A_2V5
16V
100n
C62
16V
100n
C166
10V
4u7
C605
A_3V3
C165
100n
16V
A_1V2
A_1V2
A_2V5
A_3V3
A_1V2
C164
100n
16V
16V
100n
C163
A_1V2
A_2V5
C636
22u
16V
1V2_VCC
C613
10V
4u7
16V
100n
C118
F89
330R
F71
330R
330R
F95
330R
F96
F88
330R
F97
330R
330R
F90
F101
330R
F113
330R
330R
F91
330R
F62
F102
330R
330R
F86
F72
330R
1n
C591
50V
220u
6V3
C326
1V8_VCC
60R
F34
D_3V3
3V3_VCC
C628
22u
16V
L34
1u2
F87
330R
C230
220u
6V3
F54
60R
5V_TUN C264 22u 16V
6V3
220u
C324
3V3_AGC
1V2_VCC
D_1V2
L7
1u2
A_1V2
A_2V5
C635
22u
16V
2V5_VCC
L8
1u2
16V
22u
C627
A_3V3
3V3_VCC
1u2
L35
R978
560R
715R
R979
R975 220R
3V3_AGC
C914 10u
10V
VDAC_AVDD3P3
D_1V2
D_3V3
D_1V8
C592
10u
10V
TP226
TP221
TP222
TP223
TP224
TP217
TP218
TP219
TP220
TP214
16V
100n
C609
S130
5V_TUN_RF_AGC
16V
22u
C251
HDMI_RX_1_VDD2P5
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
88
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
TUNER & AV & PERIPHERALS Schematic Diagram
S196
F165
600R
21
F164
600R
21
JK9
1
2
3
4
5
6
7
F163
600R
21
Q113
BC848B
BC848B
Q114
Q115
BC848B
BC848B
Q112
SC_L_O
SC_R_O
SC2_AUD_R_OUT
SC2_AUD_L_OUT
SC1_AUD_R_OUT
SC2
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SCART LT1
SC1_AUD_L_OUT
C771
10u 10V
C255
100n 10V
R355
75R
75R
R356
R357
75R
10V100n
C256
C257
100n
10V
C769
10u
10V
C770
10u
10V
S155
S48
10V
100n C302
D54
C2V4
8V_VCC
USB_SAV_COMMON
R794
22k
21
22k
R791
21
SC1_L_INDIA
TP248
R792
22k
21
22k
R793
21
C303
100n
10V
R337
75R
17mb70-5p
MB70 HW_TEAM
16TUNER&AV&PERIPHERALS_1
26-05-2011_11:36
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
VGA_HSNC
16V
100n
C512
C510
100n
16V
16V
100n
C508
PB_IN PR_IN
C506
100n
16V
16V
100n
C504
C491
100n
16V
C505
100n
16V
VGA_VSNC
16V
100n
C507
16V
100n
C509
C511
100n
16V
16V
100n
C520
C480
10n
16V
VDAC_AVDD3P3
R483 560R
R354
75R
1u
L2
2 1
C623
50V
47p 2147p
50V
C624
21
CVBS_OUT
U1
BCM3556
AE9 AH9
AD10
AG3 AF4
AG15 AF15 AE15
AG16 AH17 AF16
AG14 AF14 AE14
AH10 AG10
AE11 AF11
AH13 AE12
AD9 AG11 AG12 AF13
AF17 AE16 AE17 AD15
AH21 AH22
AE27 AE28
Y24
AF9 AG9 AC10
AH15
AH16
AH14
AE10
AH11
AF12
AC9 AF10 AH12 AG13
AG17
AG19 AH20
AH28 AG28
DS_AGCI_CTL
DS_AGCT_CTL
VDAC_1
VDAC_2
SD_INCM_SIF1
SD_INCM_CVBS4
SD_INCM_CVBS3
SD_INCM_CVBS2
SD_INCM_CVBS1
SD_INCM_LC3
SD_INCM_LC2
SD_INCM_LC1
SD_INCM_COMP3
SD_INCM_COMP2
SD_INCM_COMP1
SD_INCM_R
SD_INCM_B
SD_INCM_G
BYP_DS_CLK
EDSAFE_IF_N
EDSAFE_IF_P
VDAC_RBIAS
VDAC_VREG
SD_FB
SD_FS2
SD_FS
SD_SIF1
SD_CVBS4
SD_CVBS3
SD_CVBS2
SD_CVBS1
SD_C3
SD_L3
SD_C2
SD_L2
SD_C1
SD_L1
SD_PR3
SD_PB3
SD_Y3
SD_PR2
SD_PB2
SD_Y2
SD_PR1
SD_PB1
SD_Y1
RGB_VSYNC
RGB_HSYNC
SD_R
SD_B
SD_G
1
75R
R338
R339 75R
C301
100n 10V
VGA_B_IN
VGA_R_IN
R175 100R
21
RF_AGC_TUNER
SAV_CVBS
VGA_G_IN
R368 100R
21
Y_IN
R335
75R
75R
R336
R333
75R
75R
R334
C5V1
D10
R331 75R
50V
3n3
C101
SAV_AUD_R_IN
SAV_AUD_L_IN
SAV_CVBS
C904
100n
16V
JK2
5
4 3
21
SVHS_Y
SVHS_C
75R
R495
R494
75R
D9
C5V1
75R
R332
R327
75R
16V
100n
C903
SVHS_C
600R
F79
21
600R
F78
21
50V
3n3
C103
D20
C5V6
16V
100n
C902
SC1_CVBS_IN
S51
R353
75R
C518
100n
16V
S161
3V3_VCC
3V3_VCC
R499
10k
10k
R500
IF_AGC
RF_AGC
SDA_TUN
SCL_TUN
SCL_DEMOD
5V_TUN
5V_TUN
DIGITAL_IF_P
SDA_DEMOD
10V
C248 100n
2
1
10V
C258 100n
2
1
DIGITAL_IF_N
DIGITAL_IF_P
TDTC-G101DTU1
12
11
10
9
8
7
6
5
4
3
2
1
ANT_PWR
B1
RF_AGC
SCL
SDA
B2
NC
AS
IF_AGC
DIF2
DIF1
AIF
F48
330R
47p
50V
C626
21
1u
L6
21
DIGITAL_IF_N
C625
50V
47p
21
L5
1u
21
C621
50V 47p
2 1
47p
50V
C622
2 1
1u
L3
21
L4
1u
21
R504 330R
R503 330R
R490
2k2
R491
2k2
C470
10n
16V
C474
10n
16V
C516
100n
16V
C515
100n
16V
R170
3k9
SAV_CVBS
R481 100R
8
7
6
5 4
3
2
1
R2
R3
R1
R4
R505
510R
5V_TUN_RF_AGC
3V3_AGC
IF_AGC_TUNER
Q28
BC858B
10k
R497
5V_TUN
SVHS_Y
SC2_CVBS/Y_IN
75R
R343
16V
100n
C514
R351
75R
C503
100n
16V
SC2_C_IN
Q19
BC848B
75R
R328
R932
75R
75R
R326
SC2_CVBS_OUT
CVBS_OUT
5V_VCC
R506
22k
21
SC2_PIN8
RF_MONITOR
SC2_AUD_R_OUT
SC2_CVBS/Y_IN
SC2_C_IN
100R
R388
21
100R
R389
21
50V
1n
C364
21
SC1_CVBS_IN
C374
1n 50V
21
100R
R391
21
100R
R390
21
10V
100n
C274
2 1
50V
220p
C581
2 1
SC2_L_INDIA
C15V
D28
ZENER
C15V_SOD123
2 1
600R
F69
21
F70
600R
21
SC2_CVBS/Y_IN
SC2_R_INDIA
PIN8_WAKEUP_2
C5V6
D23
ZENER
C5V6_SOD123
2 1
SC1_FB
600R
F76
21
SC1_AUD_R_IN
C363
1n
50V
21
SC1_AUD_L_IN
SC1_B
50V
220p
C583
2 1
SC1_R
SC1_G
600R
F75
21
SC1
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SCART LT1
47R
R434
2 1
50V
220p
C586
21
C5V6
D21
ZENER
C5V6_SOD123
2 1
50V
1n
C373
21
SC1_PIN822k
R507
21
4k7
R216
21
C582
220p
50V
2 1
SC1_CVBS_OUT
50V
220p
C580
21
SC1_AUD_L_OUT
TP189
NUP4004M5
D17
NUP4004M5NUP4004M5
54321
SC1_AUD_R_OUT
C578
220p
50V
2 1
C362
1n 50V
21
R348
75R
21
SC2_R_INDIA
SC2_L_INDIA
10V
C304
100n
2 1
SC2_CVBS_OUT
600R
F68
21
C584
220p
50V
21
F77
600R
21
C372
1n 50V
21
50V
1n
C371
21
600R
F67
21
F74
600R
21
R215
4k7
2 1
50V
220p
C585
21
SC2_AUD_L_OUT
SC2_AUD_L_IN
NUP4004M5
D18
NUP4004M5NUP4004M5
5 4
3
2
1
SC2_AUD_R_IN
S46
C576
220p
50V
21
50V 1n
C379
2 1
SC1_FB
16V
100n
C502
C501
100n
16V
16V
100n
C500
75R
R347
R346
75R
R345
75R
SC1_R
CVBS_OUT
SC2_PIN8
SC1_PIN8
SC1_CVBS_OUT
BC848B
Q4
S171
100R
R373
2 1
SC1_R_INDIA
SC1_R_INDIA
SC1_L_INDIA
SC1_CVBS_IN
S78
S44
S11
S43
S47
S12
C907
10u 10V
ACT_ANT
GS3
GS5
JK101
6
4
2
5
3
1
RED
WHT
YEL
GS9
PIN8_WAKEUP
C320 10u 10V
C772
10u 10V
S77
10V
100n
C246
2
1
5V_TUN
S72
2 1
F28
330R
21
8V_VCC
16V
47u
C693
2
1
LM1117
U22
4
3 2
1
GND
OUTIN
VOUT
R502
330R
21
1k
R533
21
SC1_G
SC1_B
R1047
10k
R1049
1k
1k
R1048
TP178
TP177
TP188
TP190
TP196
TP195
TP194
TP172
TP173
BCM_TX_DEBUG
BCM_RX_DEBUG
R856
75R
21
75R
R855
21
R916
75R
75R
R923
75R
R924
75R
R915
R917
75R
75R
R918
R920 75R
75R
R922
R925
75R
75R
R919
R935
75R
75R
R936
R934
56k
R943
200k
5V_VCC
C15V
D51
ZENER
C15V_SOD123
2 1
C15V_SOD123
ZENER
D52
C15V
2 1
16V
10u
C911
R951
22k
ACT_ANT
S168
21
S167
2 1
OVER_CUR_DETECT
R950
10k
21
TP239
1
10k
R949
21
TH1
2R1
21
R957 4R7
21
Q123
FDN336P
3
2
1
5V_TUN
R946
10k
21
ANT_CTRL
Q122
BC848B
3
2
1
R952
1k
21
10k
R948
21
5V_TUN
R958
3k9
R1046
10k
R1037
10k
R1038
10k
RGB_DETECT
Q134 BC847B
3V3_VCC
SC1_FB
C15V
D55
ZENER
C15V_SOD123
2 1
USB_SAV_COMMON
Near Tuner
S-VIDEO
SIDE AV INPUT
390nH
LG
SCART1 INPUT
390nH
SCART2 INPUT
Scart ==> CVBS+Audio Jack
supply pin
Near to Scart Connectors
Near to Tuner
FAV
SLIM
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
89
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
AUDIO AMP Schematic Diagram
U3
CXA3813N
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
AMP2IR1
AMP2IR0
VCC_AMP1
GND_AMP1
AMP1IL
AMP1OL
AMP1OR
AMP1IR
CREFH
CREF
REFO
SEL
AMP2OR
AMP2OL
AMP2IL1
AMP2ILO
HPIR
HPOR
GND_HP
VCC_HP
HPOL
HPIL
AMPMUTE
AMPEN
AMP_EN
R789 100R
JK8
9 8 7
6 5 4
3 2 1
R1061
560R
C945 10u 50V
R14
100R
C347
1u
50V
50V
1u
C346
8V_VCC
C692 22u 16V
PIN2
C714 1u 50V
56R
R976
8
7
6543
2
1
R2
R3
R1
R4
C665 1u 50V
L11
10u
17mb70-5p
MB70 HW_TEAM
16AUDIO AMP
26-05-2011_11:36
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
C521 100u 35V
560R
R1062
50V
330p
C238
35V
100u
C705
R953
100k
1k
R469
HP_R_O
60R
F187
60R
F188
HP_L_O
R12 10k
21
R169
3k9
21
R534
15k
21
100u
16V
C641
2 1
16V
10n
C479
12V_VCC
1N4148
D31
2 1
VDD_AUDIO
S45
21
R258
100k
21
10k
R38
21
16V
C110 100n
S139
5V_VCC
1N4148
D30
2 1
Q3
BC848B
3
2
1
R137
10k
2 1
AMP_EN
Q26
BC858B
3
2
1
R39
10k
21
AMP_MUTE
BC848B Q13
3
2
1
S14
21
16V
10n
C478
JK4
1
2
3
4
5
6
7
3V3_VCC
R214
4k7
1
C913
1u 50V
R7
10k
21
S15
21
VDD_AUDIO
C655 1n 50V
50V
1n
C654
SK24
D32
24V_VCC
VDD_AUDIO
S108
S101
18V_VCC
12V_VCC
S104
25V
220n
C660
L12
10u
C666 1u 50V
L10
10u
C669
1u 25V
R144 10k
10k
R166
S13
50V
1u
C345
MAIN_L_N
C917
1u 25V
U6
TPA3110D2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PVCCR2
PVCCR1
BSPR
OUTPR
PGND2
OUTNR
BSNR
BSNL
OUTNL
PGND1
OUTPL
BSPL
PVCCL1
PVCCL2
PBTL
NC
RINP
RINN
PLIMIT
GVDD
AGND
AVCC
GAIN1
GAIN0
LINN
LINP
FAULT
SD
C667 1u 50V
VDD_AUDIO
R256
100k
100k R254
100k R255
VDD_AUDIO
VDD_AUDIO
MAIN_R_N
C344
1u
50V
25V
1u
C671
R403
56R
876
5 4
321
R2R3R1
R4
R969 10k
10k
R968
S172
L9
10u
L37
10u
R_AUDIO_P
L_AUDIO_N
L_AUDIO_P
R_AUDIO_N
VDD_AUDIO
C632
100n
50V
F112
75R
R257
100k
HP_DETECT
C631
100n
50V
C668 1u 50V
C233
330p
50V
56R
R401
876
5 4
321
R2R3R1
R4
56R
R402
876
5 4
321
R2R3R1
R4
50V
330p
C232
C237
330p
50V
56R
R404
876
5 4
321
R2R3R1
R4
F111
75R
VDD_AUDIO
C661 220n
25V
C658
25V
220n
C659220n
25V
L_AUDIO_N
L_AUDIO_P
R_AUDIO_N
CN17
4
3
2
1
R_AUDIO_P
MAIN_L_P
MAIN_R_P
AMP_EN
56R
R406
8
7
6543
2
1
R2
R3
R1
R4
C967 4u7 16V
C338
1u 50V
HP_L_N
HP_L_P
6V3
1u
C387
C513
100n
16V
8V_VCC
6V3
1u C386
HP_R_P
HP_R_N
C388
1u 6V3
C638
100u
16V
R385 100R
R537
33R
HP_L_O
HP_R_O
R536
33R
R384 100R
C637
100u
16V
R1066
470k
C960
1u
6V3
TPA3110D2
U7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PVCCR2
PVCCR1
BSPR
OUTPR
PGND2
OUTNR
BSNR
BSNL
OUTNL
PGND1
OUTPL
BSPL
PVCCL1
PVCCL2
PBTL
NC
RINP
RINN
PLIMIT
GVDD
AGND
AVCC
GAIN1
GAIN0
LINN
LINP
FAULT
SD
C702
35V
100u
56R
R527
876
5 4
321
R2R3R1
R4
C229
50V
330p
SUBW_OUT
470k
R1067
16V
1u
C962
SK24
D59
16V
22u
C957
25V
470n
C919
VDD_AUDIO
AMP_EN
R510
56R
876
5 4
321
R2R3R1
R4
C920
470n
25V
330p
50V
C162
SUBW_OUT
1u
C552
50V
50V 1u
C556
F98
75R
35V
C703 100u
C664
100n
50V
VDD_AUDIO
SUBW_OUT_P
C555
50V 1u
SUBW_OUT_N
L36
10u
VDD_AUDIO
C715 1u 50V
16V
47u
C696
16V
100n
C519
SC_L_N
SC_R_N
C384
1u 6V3
6V3
1u
C385
75R
F99
C663
50V
100n
VDD_AUDIO
S73
CN3
2
1
SUBW_OUT_P
SUBW_OUT_N
C701
10u
16V
16V
10u
C650
50V
10u
C944
SC_R_O
SC_L_O
SC_L_INT
SC_R_INT
C948
1u 50V
C949
1u
50V
U116
MAX9820
10
9
8
7
65
4
3
2
1
C1P
C1N
VSS
OUTL
OUTR INR
INL
VDD
SHDN
GND
16V
1u
C963
R1065
1k2
S208
BACKLIGHT_ON/OFF_NOT
5V_VCC
C961
1u
6V3
MAIN_L_P
MAIN_R_P
R1063
47k
47k
R1064
R1072
10k
R1073
1k
SC_L_P
C341
1u 50V
50V
1u
C340
SC_R_P
SC_L_INT
SC_R_INT
16V
10n
C934
C935 10n 16V
R1028
10k
C653
10u
16V
100k
R955 100k R956
R954
100k
VDD_AUDIO
10k
R1027
C380
1u 6V3
TP193
TP191
TP192
TP225
S140
S138
8V_VCC
S165
D35
C3V6
PIN2
ANALOG VCC
HEADPHONE AMPLIFIER
POP NOISE CIRCUIT
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
90
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LVDS & PIXELENCE Schematic Diagram
VDD25
3V3_VCC
22n 16V
C687
X8
27MHz
2
41
3
S197
RX_B_4_N RX_B_4_P
RX_B_0_N RX_B_0_P RX_B_1_N RX_B_1_P RX_B_2_N RX_B_2_P
RX_B_CLK_N RX_B_CLK_P
RX_B_3_N RX_B_3_P
RX_A_CLK_N RX_A_CLK_P
RX_A_3_N RX_A_3_P RX_A_4_N RX_A_4_P
RX_A_2_P
RX_A_2_N
RX_A_1_P
RX_A_1_N
RX_A_0_P
RX_A_0_N
BCM3556
U1
D3
D4
E3
E4
E1
E2
D1
D2
C2
C3
B1
B2
C5
B5
D5
D6
A1
A2
B3
A3
C6
B6
B4
A4
LVDS_TX_0_DATA0_N LVDS_TX_0_DATA0_P LVDS_TX_0_DATA1_N LVDS_TX_0_DATA1_P LVDS_TX_0_DATA2_N LVDS_TX_0_DATA2_P LVDS_TX_0_DATA3_N LVDS_TX_0_DATA3_P LVDS_TX_0_DATA4_N LVDS_TX_0_DATA4_P
LVDS_TX_0_CLK_N LVDS_TX_0_CLK_P
LVDS_TX_1_DATA0_N LVDS_TX_1_DATA0_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA3_P LVDS_TX_1_DATA4_N LVDS_TX_1_DATA4_P
LVDS_TX_1_CLK_N LVDS_TX_1_CLK_P
3
VDD12
PIX_SCL
17mb70-5p
MB70 HW_TEAM
16LVDS&PIXELENCE
26-05-2011_11:36
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
16V
22n
C686
C688 22n 16V
50V
4n7
C679
C55 100n 16V
TX_B_CLK_P_PIX
TX_B_CLK_N_PIX
TX_B_3_P_PIX
TX_B_3_N_PIX
F2
60R
C2 22u 6V3
VDD33
C678 4n7 50V
50V
4n7
C681
C680 4n7 50V
C460 10n 16V
2
1
C58 100n 16V
50V
330p
C228
6V3
22u
C1
C444 10n 16V
2
1
C57 100n 16V
16V
100n
C60
16V
10n
C446
2
1
16V
10n
C445
2
1
C481 47n 16V
C570 220p 50V
C673 2n2 50V
50V
2n2
C672
50V
2n2
C675
6V3
220u
C618
16V
100n
C59
50V
220p
C569
60R
F4
VDD12
1V2_VCC
C572 220p 50V
6V3
22u
C4
50V
220p
C571
C574 220p 50V
50V
220p
C573
50V
220p
C575
C674 2n2 50V
50V
2n2
C677
C676 2n2 50V
C448 10n 16V
2
1
C33 100n 16V
2V5_VCC
F1
60R
TX_B_2_P_PIX
TX_B_2_N_PIX
TX_B_1_P_PIX
TX_B_1_N_PIX
TX_B_0_P_PIX
TX_B_0_N_PIX
TX_A_4_P_PIX
TX_A_4_N_PIX
TX_A_3_P_PIX
TX_A_3_N_PIX
TX_A_CLK_P_PIX
TX_A_CLK_N_PIX
TX_A_2_P_PIX
TX_A_2_N_PIX
TX_A_1_P_PIX
TX_A_1_N_PIX
TX_A_0_P_PIX
TX_A_0_N_PIXRX_A_0_N
RX_A_0_P
RX_A_1_N
RX_A_1_P
RX_A_2_N
RX_A_2_P
RX_B_3_P
RX_B_3_N
RX_B_CLK_P
RX_B_CLK_N
RX_B_2_P
RX_B_2_N
RX_B_1_P
RX_B_1_N
RX_B_0_P
RX_B_0_N
RX_A_4_P
RX_A_4_N
RX_A_3_P
RX_A_3_N
RX_A_CLK_P
RX_A_CLK_N
F123
90R
4321
FR2
FR1
90R
F126
4321
FR2
FR1
90R
F130
4321
FR2
FR1
F124
90R
4321
FR2
FR1
90R
F136
4321
FR2
FR1
F141 90R
4321
FR2
FR1
F131
90R
4321
FR2
FR1
90R
F135
4321
FR2
FR1
F125
90R
4321
FR2
FR1
90R
F138
4321
FR2
FR1
F121
90R
4321
FR2
FR1
90R
F140
4321
FR2
FR1
TX_B_4_P_PIX
TX_B_4_N_PIX
RX_B_4_P
RX_B_4_N
PIX_SDA
R367 100R
21
100R
R380
21
SDA
SCL
VCD1V2
VDD33
F11
60R
6V3
22u
C7
60R
F10
VDD12
60R
F13
C8 22u 6V3
F12
60R
VDD12
C277
100n
10V
10V
100n
C278
EXT_RESET
10k
R92
VDD33
VDD12
VDD12 VDD25
TX_A_4_P
TX_A_4_N
TP50
1
TP51
1
TX_B_4_P
TP52
1
TP53
1
OPTION4
OPTION5
S37
21
MEGA_DCR_OUT
S7
21
MEGA_DCR_IN
PANEL_VCC
R35
10k
2 1
TX_A_2_N
TX_A_3_P
F47
330R
2 1
OPTION3
OPTION1
OPTION2
10k
R123
2 1
PANEL_VCC
R33
10k
2 1
S95
21
PANEL_VCC
10k
R34
2 1
PANEL_VCC
S94
21
PANEL_VCC
R90
10k
2 1
TX_A_CLK_N
TX_A_3_N
TX_A_CLK_P
TX_A_2_P
TX_A_1_P
TX_A_1_N
TX_A_0_P
S35
21S121
TX_A_0_N
PANEL_VCC
S93
21
10k
R22
2 1
S36
21
CN22
302928272625242322212019181716151413121110
987654321
CN21
302928272625242322212019181716151413121110
987654321
PANEL_VCC
TX_B_2_N
S91
2 1
PANEL_VCC
PANEL_VCC
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_B_2_P
TX_B_CLK_N
TX_B_CLK_P
TX_B_3_N
TX_B_3_P
TX_A_3_P
TX_A_CLK_N
TX_A_0_N
CN23
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TX_A_0_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_2_P
TX_A_CLK_P
TX_A_3_N
S4
2 1
TX_B_0_N
S92
2 1
MEGA_DCR_IN
TX_A_3_P
TX_A_3_N
TP44
1
TX_A_CLK_P
TP20
1
TX_A_2_N
TX_A_1_P
TX_A_1_N
TX_A_0_P
TX_A_0_N
TX_B_3_P
TX_B_3_N
TX_B_CLK_P
TX_B_CLK_N
TX_B_2_P
TX_B_2_N
TX_B_1_P
TX_B_1_N
TX_B_0_P
TX_B_0_N
MEGA_DCR_OUT
3V3_VCC
10k
R4
2 1
R24
10k
2 1
3V3_VCC
S90
21
PANEL_VCC
S88
21
S34
21
TP32
1
TX_A_CLK_N
TX_A_2_P
TP33
1
TP18
1
TP24
1
TP34
1
TP35
1
S87
21
PANEL_VCC
CN24
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
S85
21
BACKLIGHT_ON/OFF
OPTION3
OPTION2
OPTION1
TX_B_4_N
S38
21
TP42
1
TP43
1
TP22
1
TP23
1
TP48
1
TP49
1
TP14
1
TP15
1
TP25
1
TP19
1
TP45
1
TP21
1
VDD12
VDD25
VDD25
10V
100n
C276
PIX_SCL
PIX_SDA
VDD12
F9
60R
C6
22u
6V3
60R
F8
C707
10p 50V
R581 680R
50V
10p C708
47R
R438
R93
10k
Q2
BC848B
10V
100n
C268
VDD33
R91
10k
10k
R155
R31
10k
10k
R29
R30
10k
10k
R28
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VCD1V2
VCD1V2
VCD1V2
VCD1V2
VCD1V2
VDD12
VDD12
VDD12
VDD12
VDD12
VCD1V2
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD25
VDD25
VDD25
VDD25
VDD25
RX_B_4_N
RX_A_2_P
RX_A_CLK_N
RX_B_0_N RX_B_0_P RX_B_1_N RX_B_1_P RX_B_2_N
RX_B_2_P RX_B_CLK_N RX_B_CLK_P
RX_B_3_N
RX_B_3_P
RX_A_0_N
RX_A_0_P
RX_A_1_N
RX_A_1_P
RX_A_2_N
RX_A_CLK_P
RX_A_3_N
RX_A_3_P
RX_B_4_P
RX_A_4_N
RX_A_4_P
TX_A_CLK_P_PIX
TX_A_CLK_N_PIX
TX_B_4_P_PIX
TX_B_4_N_PIX
TX_A_4_P_PIX
TX_A_4_N_PIX
TX_B_0_N_PIX TX_B_0_P_PIX TX_B_1_N_PIX TX_B_1_P_PIX TX_B_2_N_PIX TX_B_2_P_PIX TX_B_CLK_N_PIX TX_B_CLK_P_PIX TX_B_3_N_PIX TX_B_3_P_PIX
TX_A_0_N_PIX TX_A_0_P_PIX TX_A_1_N_PIX TX_A_1_P_PIX TX_A_2_N_PIX TX_A_2_P_PIX
TX_A_3_N_PIX TX_A_3_P_PIX
VDD33
R76
10k
U14
VESPIX-TNR
44 43 42 41 40 39 38 37 36 35 34 33 32 31
29 28 27 26 25 24 23 22 21 20 19 18 17
30
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
88878685848382818079787776757473727170696867666564636261605958575655545352515049484746
45
89 90 91 92 93 94 95 96 97 98
99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
DFT9
DFT8
DFT7
DFT6
DFT5
VDD33_14
VDD12_17
DFT4
DFT3
DFT2
DFT1
RESETN
VDD33_13
VDD12_16
DFT0
GPIO14
GPIO13
GPIO12
GPIO11
VDD33_12
VDD12_15
GPIO10
GPIO9
GPIO8
GPIO7
VDD33_11
VDD12_14
GPIO6
GPIO5
GPIO4
GPIO3
VDD33_10
GPIO2
GPIO1
NECTEST3
NECTEST2
VDD12_13
VDD33_9
TMC2
TMC1
GPIO0
VDD12_12
VDD33_8
NECTEST1
NECTEST6
VDD33_7
VDD12_11
I2CADD2
I2CADD1
SCL
SDA
RX2AGND
RX2AVDD1V2
VDD12_10
2V5_7
RE2P
RE2N
RD2P
RD2N
RCLK2P
RCLK2N
RC2P
RC2N
RB2P
RB2N
RA2P
RA2N
2V5_6
RX1AGND
RX1AVDD1V2
VDD12_9
2V5_5
RE1P
RE1N
RD1P
RD1N
RCLK1P
RCLK1N
RC1P
RC1N
RB1P
RB1N
RA1P
RA1N
2V5_4
VDD12_8
VDD33_6
NECTEST5
DFT15
JTAGTMS
JTAGTDI
JTAGTCK
JTAGTDO
JTAGRST
DFT16
DFT17
DFT18
DFT19
DFT20
VDD33_2
VDD12_4
DGND_0
DVCD1V2_0
VCP33_0
VCP33_1
DGND_1
DVCD1V2_1
DVCD1V2_2
DGND_2
VDD33_3
VDD12_5
DGND_3
DVCD1V2_3
DVCD1V2_4
DGND_4
VCP33_2
VCP33_3
DVCD1V2_5
DGND_5
VDD12_6
VDD33_4
DFT21
DFT22
DFT23
DFT24
DFT25
DFT26
VDD12_7
VDD33_5
NECTEST4
DFT27
DFT28
DFT10
VDD12_0
SCK2
SCK1
VDD33_0
2V5_0
TE2P
TE2N
TD2P
TD2N
TCLK2P
TCLK2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
2V5_1
TXAGND
TXAVDD1V2
VDD12_1
2V5_2
TE1P
TE1N
TD1P
TD1N
TCLK1P
TCLK1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
2V5_3
VDD12_2
VDD33_1
DFT11
DFT12
IOSTBYB
VDD12_3
DFT13
DFT14
10k
R75
TP122
1
TP123
1
TP121
1
TP98
1
TP120
1
VDD33
R148 10k
10k
R146
10k
R147
VDD33
R103
10k
10k
R201
330R
F14
S162
21
S163
21
OPT1
OPT1
spcap
PANEL_VCC = 5V/12V
SINGLE LVDS FFC OPTIONS
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
91
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
FRC ( GPIO - PCI - VDI ) Schematic Diagram
CN33
2019
1817
1615
1413
1211
109
87
65
43
21
SDA
SCL FRC_SCL2
FRC_SDA2
S118
S119
27MHz
X6
21
17mb70-5p
MB70 HW_TEAM
16FRC (GPIO-PCI-VDI)
26-05-2011_11:37
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
3V3_VCC
TP250
1
TP252
1
FRC_SDA2
FRC_SCL2
10k
R149
2 1
10k
R107
2 1
10k
R102
2 1
47R
R429
21
FRC_RESET
3V3_VCC
TP116
1
JTAG_RST_FRC
R176
4k7
21
47R
R428
21
Q21
BC848B
321
RESET_BCM
NAND_WP_FRC
EPROM_PWR_FRC
R152
10k
2 1
47R
R553
8
7
6
5 4
3
2
1
R2
R3
R1
R4
TMS_FRC
FRC_SCL2
FRC_SCL1
U16
PNX5100
AD23
AF22
AD22
AC22
AD21
AE21
AC21
AF21
J2
J1
H3
H2
H4
AE12
AB21
AF14
AF13
AE13
AD12
H1
AF24
B24
A24
A25
A26
B26
C26
C24
AF26
AF25
AE24
AC8
AD8
AE8
K2
K1
L2
L1
AF8
B25
A23
B23
C23
B22
C22
R1
AE23
AF23
AE22
AI_WS
AI_SD3
AI_SD2
OBSERVE
GPIO_15
GPIO_14
GPIO_13
GPIO_12
GPIO_11
GPIO_5
UA1_RX
SDA2
SCL2
SDA1
SCL1
UA1_TX
UA2_RX
UA2_TX
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
RESET_IN
PLL_OUT
RESET_SYS
XTAL_IN
XTAL_OUT
XTAL_OUT2
VPP_ID
VSSA_XTAL
TCK
TDI
TDO
TMS
TRSTN
AO_OSCLK
AO_SCK
AO_SD0
AO_WS
AI_OSCLK
AI_SCK
AI_SD0
AI_SD1
4
FRC_SCL1
FRC_SDA1
FRC_SDA2
FRC_SDA2
5V_VCC
TX2_FRC
BOOT_MODE_FRC
TDO_FRC
TDI_FRC
TRST_FRC
100n
C206
16V
47R
R433
21
TRST_FRC
R150
10k
21
47R
R557
1
2
3456
7
8
R2
R3
R1
R4
C697
18p 50V
21
C698
18p 50V
21
3V3_VCC
TP89
1
TP90
1
TP57
1
RX1_FRC
3V3_VCC
TP59
1
R431
47R
2 1
3V3_VCC
TP1151TP117
1
TP91
1
TP1191TP118
1
C699 33p 50V
2
1
3V3_VCC
RX1_FRC
TX1_FRC
TP114
1
60R
F25
21
FRC_RESET
BOOT_MODE_FRC
TP251
1
TP111
1
R426
47R
21
R432
47R
21
R446
47R
21
TCK_FRC
TMS_FRC
TDO_FRC
TCK_FRC
TDI_FRC
RX2_FRC
TX1_FRC
RX2_FRC TX2_FRC
EPROM_WP_FRC
FRC_SDA1
FRC_SCL2
3V3_VCC
10k
R571
876
54
321
R2R3R1
R4
TP8
1
TP61TP7
1
R430
47R
TP9
1
JTAG_RST_FRC
FRC_CLK
R572
4k7
876
5 4
321
R2R3R1
R4
10k
R153
21
TP87
1
TP88
1
F3
60R
21
16V
100n
C56
2
1
10k
R164
21
R163
10k
21
R162
10k
21
10k
R161
21
R160
10k
21
10k
R158
21
NAND_FRC_R/B
100R R371
2 1
R369 100R
21
NAND_FRC_CLE
R370 100R
21
100R R372
2 1
2k2
R488
2 1
NAND_FRC_ALE
R378 100R
NAND_FRC_CSN
3V3_VCC
C411 10u 10V
10k
R32
21
NAND_FRC_CSN
NAND_FRC_R/B
R156
10k
21
R110
10k
21
R157
10k
21
3V3_FRCFLASH
4k7
R197
2 1
4k7
R198
2 1
4k7
R199
2 1
4k7
R200
2 1
33R
R305
21
100R R394
2 1
R383
100R
2 1
3V3_FRCFLASH
3V3_FRCFLASH
3V3_FRCFLASH
FRC_IDSEL
NAND_FRC_WEN
NAND_WP_FRC
NAND_FRC_ALE
NAND_FRC_CLE
FRC_IDSEL
FRC_CLK
NAND_FRC_REN
NAND_FRC_REN
NAND_FRC_WEN
3V3_FRCFLASH
R552
47R
8
7
6
5 4
3
2
1
R2
R3
R1
R4
16V
100n
C53
2
1
C54 100n 16V
2
1
C115
16V
100n
2
1
U17
NAND128-A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
2524
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
NC1
NC2
NC3
NC4
NC5
NC6
RB
R
E
NC7
NC8
VDD1
VSS1
NC9
NC10
CL
AL
W
WP
NC11
NC12
NC13
NC14
NC15 NC16
NC17
NC18
NC19
I/O0
I/O1
I/O2
I/O3
NC20
NC21
NC22
VSS2
VDD2
NC23
NC24
NC25
I/O4
I/O5
I/O6
I/O7
NC26
NC27
NC28
NC29
U16
PNX5100
N1
M4
M3
M2
AF7
AC6
V2
V4
W2
AC7
AD7
AD6
W1
W3
V1
M1
L4
AF6
AE7
AE6
U2
V3
L3
AF4
AC5
AD5
AE5
N3
N4
P2
P3
P4
R2
R3
R4
T1
T2
T3
U1
W4
Y1
Y2
Y3
Y4
AA1
AA2
AA4
AB1
AB2
AF2
AE3
AF3
AD4
AE4
AF5
AA3
T4
P1
N2
PCI_AD31
PCI_AD28
PCI_AD18
PCI_AD9
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD29
PCI_AD30
PCI_CBE0
PCI_CBE1
PCI_CBE2
PCI_CBE3
PCI_CLK
PCI_DEVSEL
PCI_FRAME
PCI_GNT
PCI_GNT_B
PCI_GNTA
PCI_IDSEL
PCI_INTA_OUT
PCI_IRDY
PCI_PAR
PCI_PERR
PCI_REQ
PCI_REQ_B
PCI_REQ_A
PCI_SERR
PCI_STOP
PCI_TRDY
XIO_ACK
XIO_AD25
XIO_SEL0
XIO_SEL1
XIO_SEL2
XIO_SEL3
6
BC848B Q22
321
3V3_VCC
47R
R555
8
7
6543
2
1
R2
R3
R1
R4
R210
4k7
2 1
C437
10u
10V
EPROM_PWR_FRC
F5
60R
21
U16
PNX5100
G3G2G1F4F3F2F1E3E1D2D1C1A2A3B3B4C4A5B5C5D5A6B6C6A7B7C7D7A8B8C8D8D6A4E2
G4
VDI_CLK4
VDI_CLK3
VDI_CLK2
VDI_CLK1
VDI_D31
VDI_D30
VDI_D29
VDI_D28
VDI_D27
VDI_D26
VDI_D25
VDI_D24
VDI_D23
VDI_D22
VDI_D21
VDI_D20
VDI_D19
VDI_D18
VDI_D17
VDI_D16
VDI_D15
VDI_D14
VDI_D13
VDI_D12
VDI_D11
VDI_D10
VDI_D9
VDI_D8
VDI_D7
VDI_D6
VDI_D5
VDI_D4
VDI_D3
VDI_D2
VDI_D1
VDI_D0
3
R573
3k3
21
U18
24C64
8
7
6
54
3
2
1
E0
E1
E2
VSS SDA
SCL
WC
VCC
R154
10k
2 1
47R
R416
21
47R
R415
21
TP1031TP102
1
TP1011TP113
1
EPROM_WP_FRC
FRC_SCL1
FRC_SDA1
3V3_VCC
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
92
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
FRC ( DDR ) Schematic Diagram
DDRFRC_D17
17mb70-5p
MB70 HW_TEAM
16FRC (DDR)
26-05-2011_11:37
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
C204
16V
100n
2
1
C564 22u 16V
16V
100n
C203
2
1
33R
R267
8 7 6 5 4
3
2
1
R4
R3
R2
R1
R265
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
33R
R266
8 7 6 5 4
3
2
1
R4
R3
R2
R1
R268
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRC_D1
DDRFRCD14 DDRFRCD11 DDRFRCD12
DDRFRC_D14
DDRFRC_D12
DDRFRCDQM0
100R
R363
DDRFRCDQM1
DDRFRC_D19
1V8_DDRFRC
DDRFRC_D9 DDRFRC_D6
33R
R290
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRC_D2 DDRFRC_D0
DDRFRC_DQS1_P
DDRFRC_D10
DDRFRCD0 DDRFRCDQS1_P
DDRFRC_D15
DDRFRC_D8
DDRFRC_D13
DDRFRCDQS0_P
DDRFRC_DQS0_N
DDRFRC_D7
DDRFRCD13
DDRFRCDQS0_N
DDRFRCD7
DDRFRC_CLKP
DDRFRC_CLKN
DDRFRC_WE
DDRFRC_RAS
DDRFRCD5
DDRFRC_ODT
DDRFRC_CS
DDRFRCDQS1_N
R289
33R
8 7 6543
2
1
R4
R3
R2
R1
DDRFRC_D4
DDRFRC_D3
DDRFRCD4
DDRFRCD3
10V
10u
C404
DDRFRCD19
DDRFRC_D28
DDRFRC_D20 DDRFRCD20
DDRFRCD27
33R
R286
8 7 6 5 4
3
2
1
R4
R3
R2
R1
33R
R296
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRCD30 DDRFRCD17 DDRFRCDQM3 DDRFRCD25
DDRFRCD24
DDRFRCD18
DDRFRCD22
DDRFRCDQM2
33R
R285
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRC_DQS2_N
DDRFRCDQS3_P
DDRFRCD26
DDRFRC_D16 DDRFRCD16
33R
R283
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRC_D21 DDRFRC_D29 DDRFRCD29
DDRFRCD31
DDRFRC_D23
DDRFRC_CAS
DDRFRC_CS
DDRFRC_RAS
DDRFRC_WE
DDRFRC_CKE
DDRFRC_BA1
DDRFRC_BA0
DDRFRC_A12
DDRFRC_A11
DDRFRC_A10
DDRFRC_A9
DDRFRC_A8
DDRFRC_A7
DDRFRC_A4
DDRFRC_A3
DDRFRC_A2
DDRFRC_A1
DDRFRC_A0 DDRFRC_A0
DDRFRC_A1
DDRFRC_A2
DDRFRC_A3
DDRFRC_A4
DDRFRC_A6
DDRFRC_A7
DDRFRC_A8
DDRFRC_A9
DDRFRC_A10
DDRFRC_A11
DDRFRC_A12
DDRFRC_BA0
DDRFRC_BA1
DDRFRCDQS3_N
DDRFRCDQS2_P
DDRFRCDQS2_N
DDRFRCD10
DDRFRC_DQS1_N
DDRFRC_DQS0_P
DDRFRC_DQS3_P
DDRFRC_DQM2
DDRFRC_D5
DDRFRC_DQM1
DDRFRC_DQM0
DDRFRC_D31
DDRFRC_D30
DDRFRC_DQS3_N
DDRFRC_DQM3
DDRFRC_D27
DDRFRCD21
DDRFRC_D22
DDRFRCD23
DDRFRC_D24
DDRFRC_D25
DDRFRCD28 DDRFRC_D26
DDRFRC_D18
DDRFRC_DQS2_P
DDRFRC_D17
R281
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRCD15
DDRFRC_D11
R295
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
R279
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRCD9
DDRFRCD8
DDRFRCCS
DDRFRCD6
DDRFRCODT
R264
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
33R
R280
8 7 6 5 4
3
2
1
R4
R3
R2
R1
DDRFRCD2
DDRFRCD1
DDRFRCRAS
DDRFRCWE
DDRFRC_CKE
DDRFRC_A0
DDRFRC_CLKN
DDRFRC_BA0
DDRFRC_A11
DDRFRC_A1
DDRFRC_A2
DDRFRC_A4
DDRFRC_A5
DDRFRC_A6
DDRFRC_A7
DDRFRC_A8
DDRFRC_A12
DDRFRC_BA1
DDRFRC_BA2
DDRFRC_CAS
R282
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
C226 330p 50V
2
1
DDRFRCA0
DDRFRCA1
DDRFRCA2
DDRFRCA3
DDRFRCA4
DDRFRCA5
DDRFRCA6
DDRFRCA7
C202 100n 16V
2
1
4u7
L24
21
DDRFRCA8
C423 10u 10V
2
1
3V3_VCC
L23
21
4u7
DDRFRCA9
DDRFRCA10
DDRFRCA11
DDRFRCA12 DDRFRCBA0
C90 100n 16V
2
1
DDRFRCBA1
DDRFRCBA2
DDRFRCCAS DDRFRCCKE
DDRFRCCLKN
L25
4u7
21
1V25_VCCFRC
1V8_DDRFRC
1V8_DDRFRC
DDRFRCCLKP
33R
R284
8 7 6 5 4
3
2
1
R4
R3
R2
R1
33R
R294
8 7 6 5 4
3
2
1
R4
R3
R2
R1
C227
330p
50V
2
1
50R
F143
21
560R
R484
21
560R
R485
21
16V
100n
C146
2
1
16V
100n
C145
2
1
560R R482
21
C201 100n 16V
2
1
DDRFRC_ODT
1V8_DDRFRC
1V25_VCCFRC 1V25_DDRFRC_DLL
DDRFRC_A3
DDRFRC_A9
DDRFRC_A10
DDRFRC_CLKP
DDRFRC_ODT
DDRFRC_BA2DDRFRC_BA2
DDRFRC_CKE
DDRFRC_WE
DDRFRC_RAS
DDRFRC_CAS
DDRFRC_A5DDRFRC_A5
DDRFRC_A6
DDRFRC_CS
DDRFRC_D0
DDRFRC_D1
DDRFRC_D2
DDRFRC_D3
DDRFRC_D4
DDRFRC_D5
DDRFRC_D6
DDRFRC_D7
DDRFRC_D8
DDRFRC_D9
DDRFRC_D10
DDRFRC_D11
DDRFRC_D12
DDRFRC_D13
DDRFRC_D14
DDRFRC_D15
DDRFRC_DQM1
DDRFRC_DQM0
HY5PS121621C
U29
G8G2H7H3H1H9F1F7E8F3F9C8C2D7D3D1D9B1B9B7A8B3A2E2L1R3R7
R8
M8M3M7N2N8N3N7P2P8P3M2P7R2L2L3K7L7K3L8K2J8K8K9A3E3J3N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
VDDL
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VREF
VSSDL
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSS5
VSS4
VSS3
VSS2
VSS1
ODT
CK_PCKCKE
CS_P
WE_P
CAS_P
RAS_P
BA1
BA0
A12
A11
A10A9A8A7A6A5A4A3A2A1A0
NC6
NC5
NC4
NC3
NC2
NC1
UDM
UDQS_P
UDQS
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
LDM
LQDS_P
LQDS
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DDRFRC_DQS0_N
DDRFRC_DQS0_P
DDRFRC_DQS1_P
DDRFRC_D16
DDRFRC_D17
DDRFRC_D18
DDRFRC_D19
DDRFRC_D20
DDRFRC_D21
DDRFRC_D22
DDRFRC_DQM2
DDRFRC_DQM3
DDRFRC_DQS3_P
DDRFRC_DQS3_N
DDRFRC_D23
DDRFRC_D24
DDRFRC_D25
DDRFRC_D26
DDRFRC_D27
DDRFRC_D28
DDRFRC_D29
DDRFRC_D30
DDRFRC_D31
DDRFRC_DQS1_N
DDR_VREFFRC
50V
330p
C236
2
1
DDRFRC_DQS2_P
DDRFRC_DQS2_N
DDRFRC_VREF_FB
560R
R486
21
DDRFRC_IREF
C231
330p
50V
2
1
DDR_VREFFRC
C200 100n 16V
2
1
3V3_DDRFRC_PLL
16V
22u
C726
2
1
10V
10u
C435
2
1
1V8_DDRFRC
1V8_DDRFRC
1V8_VCC
1V25_DDRFRC_PLL
HY5PS121621C
U28
G8G2H7H3H1H9F1F7E8F3F9C8C2D7D3D1D9B1B9B7A8B3A2E2L1R3R7
R8
M8M3M7N2N8N3N7P2P8P3M2P7R2L2L3K7L7K3L8K2J8K8K9A3E3J3N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
VDDL
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VREF
VSSDL
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSS5
VSS4
VSS3
VSS2
VSS1
ODT
CK_P
CK
CKE
CS_P
WE_P
CAS_P
RAS_P
BA1
BA0
A12
A11
A10
A9A8A7A6A5A4A3A2A1
A0
NC6
NC5
NC4
NC3
NC2
NC1
UDM
UDQS_P
UDQS
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
LDM
LQDS_P
LQDS
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
1V8_DDRFRC
DDRFRC_CKE 1k
R449
DDRFRC_CLKP
DDRFRC_CLKN
DDRFRC_CLKP
DDRFRC_CLKN
715R
R590
C224
330p
50V
2
1
50V
330p
C225
2
1
50V
330p
C222
2
1
10V
10u
C405
2
1
50V
330p
C223
2
1
50V
330p
C220
2
1
C221
330p
50V
2
1
C402 10u
10V
2
1
C218
330p
50V
2
1
1V8_DDRFRC
C403 10u
10V
2
1
1V8_DDRFRC
16V
100n
C91
2
1
C88 100n 16V
2
1
16V
100n
C89
2
1
C86 100n 16V
2
1
16V
100n
C87
2
1
C84 100n 16V
2
1
16V
100n
C144
2
1
C142 100n 16V
2
1
C143 100n 16V
2
1
16V
22u
C565
DDRFRCA10
DDRFRCA9
DDRFRCA3
DDRFRCD10
DDRFRCD1
DDRFRCD2
DDRFRCD3
DDRFRCD4
DDRFRCD5
DDRFRCD6
DDRFRCD7
DDRFRCD8
DDRFRCD9
DDRFRCD11
DDRFRCA8
DDRFRCA7
DDRFRCA6
DDRFRCA5
DDRFRCA4
DDRFRCA2
DDRFRCA1
DDRFRCA11
DDRFRCA0
16V
100n
C85
2
1
DDRFRCD0
C82
100n
16V
2
1
16V
100n
C83
2
1
C80
100n
16V
2
1
C219
330p
50V
2
1
50V
330p
C216
2
1
C81 100n 16V
2
1
16V
100n
C78
2
1
C79
100n
16V
2
1
16V
100n
C76
2
1
50V
330p
C217
2
1
C214
330p
50V
2
1
50V
330p
C215
2
1
C77
100n
16V
2
1
C213
330p
50V
2
1
C74
100n
16V
2
1
16V
100n
C75
2
1
16V
100n
C72
2
1
16V
100n
C73
2
1
C70
100n
16V
2
1
DDRFRCCLKP
DDRFRCCAS
DDRFRCDQS1_N
DDRFRCDQS0_N
DDRFRCDQM3
DDRFRCDQM0
DDRFRCD31
DDRFRCD20
DDRFRCD13
DDRFRCD14
DDRFRCD15
DDRFRCD16
DDRFRCD17
DDRFRCD18
DDRFRCD19
DDRFRCD21
DDRFRCD22
DDRFRCD23
DDRFRCD24
DDRFRCD25
DDRFRCD26
DDRFRCD27
DDRFRCD28
DDRFRCD29
DDRFRCD30
DDRFRCDQM1
DDRFRCDQM2
DDRFRCDQS0_P
DDRFRCDQS1_P
DDRFRCDQS2_N
DDRFRCDQS2_P
DDRFRCDQS3_N
DDRFRCDQS3_P
DDRFRCWE
DDRFRCRAS
DDRFRCBA2
DDRFRCBA1
DDRFRCA12
DDRFRCBA0
DDRFRCCLKN
DDRFRCCKE
1V8_DDRFRC
DDRFRC_IREF
DDRFRC_VREF_FB
1V25_DDRFRC_PLL
1V25_DDRFRC_DLL
DDRFRCODT
3V3_DDRFRC_PLL
1V25_DDRFRC_PLL
DDRFRCCS
DDRFRCD12
PNX5100
U16
E24
E23
E25
E26
Y24
Y23
W26
W25
G23
G26
AA26
D24
G24
D23
J24
J23
F24
H24
F23
D26
H25
D25
K26
J26
G25
H26
F26
V24
AB24
V23
AC23
AC24
AA24
AB23
W24
V26
AB26
U26
AC25
AC26
E22
AB22
L22
T22
R22
AD26
V22
F22
AA22
M22
P22
AE25
T16
R16
N16
M16
L16
N22
AD25
U24
K24
K23
N23
L23
P26
P25
U23
L24
N24
T25
R26
M24
T26
M23
L26
R24
L25
T24
M26
T23
Y26 N26
U25
N25
K25
P24
P16
U22
AB25
Y25
AA23
M_DQM1
M_DQ2
M_DQ1
VSSA_DLL7
VDD_1V8_DDR_4
M_VREF
M_A11
M_A2
M_A1
M_A0M_DQ0
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A12
M_BA0
M_BA1
M_BA2
M_CASB
M_CKE
M_CLK_N
M_CLK_P
M_CSB
M_IREF
M_ODT
M_RASB
M_WEB
VDD_1V2_DDRPLL0
VDD_1V2_DDRPLL1
VDD_1V8_DDR_1
VDD_1V8_DDR_2
VDD_1V8_DDR_3
VDD_1V8_DDR_5
VDD_1V8_DDR_6
VDD_3V3_DDRPLL0
VDDA_1V2_DDRPLL1
VDDA_1V2_DLL0
VDDA_1V2_DLL1
VDDA_1V2_DLL4
VDDA_1V2_DLL7
VSS_DDRPLL0
VSS_DDRPLL1
VSSA_DDRPLL1
VSSA_DLL0
VSSA_DLL1
VSSA_DLL4
M_DQ3
M_DQ4
M_DQ5
M_DQ6
M_DQ7
M_DQ8
M_DQ9
M_DQ10
M_DQ11
M_DQ12
M_DQ13
M_DQ14
M_DQ15
M_DQ16
M_DQ17
M_DQ18
M_DQ19
M_DQ20
M_DQ21
M_DQ22
M_DQ23
M_DQ24
M_DQ25
M_DQ26
M_DQ27
M_DQ28
M_DQ29
M_DQ30
M_DQ31
M_DQM0
M_DQM2
M_DQM3
M_DQS0_N
M_DQS0_P
M_DQS1_N
M_DQS1_P
M_DQS2_N
M_DQS2_P
M_DQS3_N
M_DQS3_P
5
A1 A9 E1 M9 C1&C3 G9 G1&G3 C7
C9E1 C7G1&G3G9C1&C3M9E1A9A1
E1 C9
P22
T16R16P16N16M16L16
Decoupling Caps for U14
G7J1 J9 E9
E9J9J1 G7
Decoupling Caps for U13
N22AD25
AA22
AE25
M22
Decoupling Caps for U10
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
93
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
FRC ( VDD - VSS ) & FRC_LVDS_OUT Schematic Diagram
90R
F119
4321
FR2
FR1
F118 90R
4321
FR2
FR1
90R
F122
4321
FR2
FR1
PANEL_VCC
S79
21
C559 22u 16V
C942
12p
12p
C943
F325
90R
4321
FR2
FR1
90R
F302
4
3 2
1
FR2
FR1
CN20
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TX_4_EP
TX_4_EN
TX_4_DP
TX_4_DN
TX_4_CN
TX_4_CLKP
TX_4_BP
TX_4_AP
TX_3_EN
TX_3_DN
F127
90R
4321
FR2
FR1
S27
21
PANEL_VCC
S29
21
CN26
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
S30
2 1
OPTION5
OPTION4
90R
F134
4321
FR2
FR1
F133
90R
4321
FR2
FR1
90R
F132
4321
FR2
FR1
TX_1_AN
TX_1_AP
F303
90R
4321
FR2
FR1
F324
90R
4
3 2
1
FR2
FR1
90R
F311
4
3 2
1
FR2
FR1
90R
F310
4
3 2
1
FR2
FR1
S28
2 1
90R
F120
4321
FR2
FR1
PANEL_VCC
S42
2 1
F129
90R
4321
FR2
FR1
TX_1_BN
TX_1_BP
TX_1_CN
TX_1_CP
TX_1_CLKN
TX_1_CLKP
TX_2_DP
TX_2_DN
TX_2_EP
TX_2_EN
OPTION3
OPTION2
OPTION1
R46 10k
21
TX_1_DN
TX_1_DP
TX_1_EN
TX_1_EP
TX_2_AN
F117
90R
4321
FR2
FR1
90R
F137
4321
FR2
FR1
TX_3_CN
TX_3_CLKN
TX_3_BN
TX_3_AP
TX_3_AN
TX_3_BP
TX_3_CP
TX_3_CLKP
TX_3_DP
TX_3_EP
TX_4_AN
TX_4_BN
TX_4_CLKN
TX_4_CP
S23
2 1
S21
2 1
S20
2 1
S22
2 1
90R
F305
4321
FR2
FR1
F309
90R
4321
FR2
FR1
90R
F304
4
3 2
1
FR2
FR1
F308
90R
4
3 2
1
FR2
FR1
90R
F307
4
3 2
1
FR2
FR1
C970 220u 6V3
F306
90R
4321
FR2
FR1
F312
90R
4321
FR2
FR1
90R
F316
4321
FR2
FR1
F313
90R
4321
FR2
FR1
R1069
15R
CORE_SENSE
3V3_VCC
16V
100n
C157
2
1
L20
4u7
21
U16
PNX5100
AF17 AE17 AD17 AC17 AF16 AE16 AF15 AE15 AD15 AC15 AD16 AC16 AF20 AE20 AD20 AC20 AF19 AE19 AF18 AE18 AD18 AC18 AD19 AC19 AB15 AB17 AB18 AB19
VSS_LVDSIN
VDDA_3V3_LVDSIN
VDD_3V3_LVDSIN_2
VDD_3V3_LVDSIN_1
LIN2_CLKP
LIN2_CLKN
LIN2_EP
LIN2_EN
LIN2_DP
LIN2_DN
LIN2_CP
LIN2_CN
LIN2_BP
LIN2_BN
LIN2_AP
LIN2_AN
LIN1_CLKP
LIN1_CLKN
LIN1_EP
LIN1_EN
LIN1_DP
LIN1_DN
LIN1_CP
LIN1_CN
LIN1_BP
LIN1_BN
LIN1_AP
LIN1_AN
2
C429 10u
10V
TX_A_0_N TX_A_0_P TX_A_1_N TX_A_1_P TX_A_2_N
TX_A_3_N
TX_A_2_P
TX_A_3_P TX_A_4_N
TX_A_CLK_N
TX_A_4_P
TX_A_CLK_P
TX_B_0_N TX_B_0_P TX_B_1_N
F128
90R
4321
FR2
FR1
TX_1_AN
TX_1_AP
TX_1_BN
TX_1_BP
TX_1_CN
TX_1_CP
TX_1_DN
TX_1_DP
TX_1_EN
TX_1_EP
TX_1_CLKN
TX_1_CLKP
TX_2_AN
TX_B_CLK_P
TX_A_0_N
TX_A_0_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_3_N
TX_A_2_P
TX_A_3_P
3D_SHUTTER
R302
4k7
3V3_VCC
90R
F320
4321
FR2
FR1
F318
90R
4321
FR2
FR1
90R
F322
4321
FR2
FR1
F321
90R
4321
FR2
FR1
TX_2_AP
TX_A_4_N
TX_2_BN
TX_B_1_P
TX_2_BP
TX_2_CN
16V
22u
C560
C562 22u 16V
16V
22u
C561
16V
100n
C129
2
1
C136 100n 16V
2
1
TX_B_2_N TX_B_2_P
12k
R570
21
3V3_LVDSD
R568
12k
2 1
TX_2_CLKP
3V3_LVDSD
TX_2_CP
U16
PNX5100
A21 B21 C21 D21 B20 C20 A19 B19 C19 D19 E20 E21 A18 B18 C18 D18 B17 C17 A16 B16 C16 D16 E18 E19 E15 B15 D15 A15 C15
A14 B14 C14 D14 B13 C13 A12 B12 C12 D12 E12 E13 A11 B11 C11 D11 B10 C10
A9 B9 C9
D9 E10 E11 E17 E14 A22 D10 D13 D17 D20
VDD_3V3_LVDSOUT_4
VDD_3V3_LVDSOUT_3
VDD_3V3_LVDSOUT_2
VDD_3V3_LVDSOUT_1
RGB_CLK
IREF_LVDS2
IREF_LVDS1
LOUT4_CLKP
LOUT4_CLKN
LOUT4_EP
LOUT4_EN
LOUT4_DP
LOUT4_DN
LOUT4_CP
LOUT4_CN
LOUT4_BP
LOUT4_BN
LOUT4_AP
LOUT4_AN
LOUT3_CLKP
LOUT3_CLKN
LOUT3_EP
LOUT3_EN
LOUT3_DP
LOUT3_DN
LOUT3_CP
LOUT3_CN
LOUT3_BP
LOUT3_BN
LOUT3_AP
LOUT3_AN
VSSA_LVDS2
VSSA_LVDS1
VDDA_3V3_LVDS2
VDDA_3V3_LVDS1
VDDA_1V2_LVDS_PLL
LOUT2_CLKP
LOUT2_CLKN
LOUT2_EP
LOUT2_EN
LOUT2_DP
LOUT2_DN
LOUT2_CP
LOUT2_CN
LOUT2_BP
LOUT2_BN
LOUT2_AP
LOUT2_AN
LOUT1_CLKP
LOUT1_CLKN
LOUT1_EP
LOUT1_EN
LOUT1_DP
LOUT1_DN
LOUT1_CP
LOUT1_CN
LOUT1_BP
LOUT1_BN
LOUT1_AP
LOUT1_AN
1
TX_2_CLKN
TX_2_CLKP
TX_4_CLKP
TX_4_CLKN
S80
21
TX_4_EN
TX_A_CLK_N
TX_A_4_P
TX_4_DN
TX_A_CLK_P
TX_B_0_N
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_4_CN
TX_B_2_N
TX_4_BN
TX_B_2_P
TX_4_AN
TX_B_3_N
TX_3_CLKN
TX_B_3_P
TX_3_EN
TX_3_CLKP
TX_B_4_N
TX_3_DN
TX_3_CN
TX_B_4_P
TX_B_CLK_N
TX_3_BN
TX_2_AP
TX_3_BP
TX_2_BN
TX_3_AN
TX_2_BP
TX_1_AN
TX_2_CLKN
TX_2_CN
TX_2_EN
TX_2_DP
TX_2_DN
TX_2_CN TX_2_CP
TX_2_BN
TX_2_AN
TX_1_CLKN
TX_1_EN
TX_2_CP
TX_2_DN
TX_2_DP
TX_1_DN
TX_1_CN
TX_2_EN
TX_2_EP
TX_1_BN TX_1_BP
TX_1_AP
TX_1_CLKP
TX_1_CP
TX_1_DP
TX_1_EP
TX_2_AP
TX_2_BP
TX_2_EP
TX_3_AP
TX_3_CP
TX_3_DP
TX_2_CLKN
TX_3_EP
TX_2_CLKP
TX_4_AP
C130 100n 16V
2
1
C132 100n 16V
2
1
TX_4_BP
TX_B_3_N TX_B_3_P TX_B_4_N
TX_B_4_P TX_B_CLK_N TX_B_CLK_P
16V
100n
C131
2
1
1V25_LVDSFRC
3V3_LVDSD_IN
TX_4_CP
3V3_LVDSA
3V3_LVDSD
3V3_VCC
3V3_VCC
3V3_VCC
C133 100n 16V
2
1
TX_4_DP
TX_4_EP
1V25_LVDSFRC
3V3_LVDSA
4u7
L21
21
L22
4u7
21
F23
60R
1V25_VCCFRC
C441 10u 10V
16V
100n
C134
2
1
16V
100n
C158
2
1
16V
100n
C135
2
1
16V
100n
C159
2
1
60R
F24
C549 22u 16V
16V
22u
C548
17mb70-5p
MB70 HW_TEAM
16
FRC (VDD-VSS)&FRC_LVDS_OUT
26-05-2011_11:37
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
F319
90R
4321
FR2
FR1
C127
100n
16V
1V25_TRI_PLL2
1V25_TRI_PLL1
3V3_SYS_PLL
1V25_XTAL
1V25_UIP_PLL
1V25_TRI_PLL3
1V25_TRI_PLL2
1V25_TRI_PLL1
1V25_VCCFRC
4u7
L19
21
16V
100n
C156
C51 100n 16V
2
1
16V
100n
C52
2
1
16V
100n
C49
2
1
C50 100n 16V
2
1
16V
100n
C47
2
1
C48 100n 16V
2
1
16V
100n
C45
2
1
C46 100n 16V
2
1
16V
100n
C43
2
1
C44 100n 16V
2
1
16V
100n
C41
2
1
C42 100n 16V
2
1
C126 100n 16V
2
1
16V
100n
C154
2
1
16V
100n
C109
2
1
L17
4u7
21
1V25_TRI_PLL2
3V3_VCC
1V25_VCCFRC
50R
F145
21
3V3_SYS_PLL
1V25_XTAL
1V25_UIP_PLL
1V25_TRI_PLL3
1V25_TRI_PLL1
L26
4u7
21
C128
100n
16V
2
1
60R
F22
10V
10u
C440
2
1
10V
10u
C428
2
1
C153 100n 16V
2
1
1V25_VCCFRC
1V25_VCCFRC
10V
10u
C408
2
1
3V3_PERFRC
16V
100n
C152
2
1
1V25_VCCFRC
16V
100n
C125
2
1
C124 100n 16V
2
1
3V3_PERFRC
1V25_UIP_PLL
C39 100n 16V
2
1
4u7
L16
21
10V
10u
C433
2
1
MEGA_DCR_IN
3V3_VCC
L15
4u7
21
4u7
L18
21
C434 10u 10V
2
1
16V
100n
C37
2
1
16V
100n
C38
2
1
C35 100n 16V
2
1
16V
100n
C36
2
1
C34 100n 16V
2
1
16V
100n
C98
2
1
C99 100n 16V
2
1
16V
100n
C96
2
1
16V
100n
C97
2
1
C94 100n 16V
2
1
C95 100n 16V
2
1
10V
10u
C409
2
1
C406 10u 10V
2
1
16V
100n
C93
2
1
MEGA_DCR_OUT
C205 100n 16V
2
1
C427 10u 10V
2
1
C407 10u
10V
2
1
10V
10u
C432
2
1
PNX5100
U16
AF11
AF10
AE11
AE10
AD11
AD10
AC12
AC11
AC10
AB12
AB11
AB10
Y22
W22
H22
G22
U3K3J3U4K4
J4
AC13
AB13
K5
H5
AD14
AD13
AF12
U5T5L5
J5
AE14
AB20
AB7
AB6
W5V5N5M5G5E7E6
D22
AC14
AB14
AF9
AE9
AD9
AC9
AB16
AB8
AA5
Y5R5P5
K22
J22F5E16
E9
E8 A1
A10
A13
A17
A20
B1B2C2
C3
C25
D3D4E4
E5
F25
H23
J25
L11
L12
L13
L14
L15
M11
M12
M13
M14
M15
M25
N11
N12
N13
N14
N15
P11
P12
P13
P14
P15
P23
R11
R12
R13
R14
R15
R23
R25
T11
T12
T13
T14
T15
V25
W23
AA25
AB3
AB4
AB5
AC1
AC2
AC3
AC4
AD1
AD2
AD3
AD24
AE1
AE2
AE26
AF1
AB9
VDD_1V2_CORE_12
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1VDD_1V2_CORE_1
VDD_1V2_CORE_2
VDD_1V2_CORE_3
VDD_1V2_CORE_4
VDD_1V2_CORE_5
VDD_1V2_CORE_6
VDD_1V2_CORE_7
VDD_1V2_CORE_8
VDD_1V2_CORE_9
VDD_1V2_CORE_10
VDD_1V2_CORE_11
VDD_1V2_CORE_13
VDD_1V2_CORE_14
VDD_1V2_CORE_15
VDD_1V2_CORE_16
VDD_1V2_CORE_17
VDD_1V2_MCAB_1
VDD_1V2_MCAB_2
VDD_3V3_PER_1
VDD_3V3_PER_2
VDD_3V3_PER_3
VDD_3V3_PER_4
VDD_3V3_PER_5
VDD_3V3_PER_6
VDD_3V3_PER_7
VDD_3V3_PER_8
VDD_3V3_PER_9
VDD_3V3_PER_10
VDD_3V3_PER_11
VDDA_1V2_1_7_MCAB
VDDA_1V2_TRI_PLL1
VDDA_1V2_TRI_PLL2
VDDA_1V2_TRI_PLL3_1
VDDA_1V2_TRI_PLL3_2
VDDA_1V2_UIP_PLL
VDDA_1V2_XTAL
VDDA_3V3_SYS_PLL
VDDD_1V2_TRI_PLL1
VDDD_1V2_TRI_PLL2
VSS_MCAB_1
VSS_MCAB_2
VSSA_TRI_PLL1
VSSA_TRI_PLL2
VSSA_TRI_PLL3
VSSD_TRI_PLL1
VSSD_TRI_PLL2
VSSD_TRI_PLL3
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
7
1V25_VCCFRC
90R
F317
4321
FR2
FR1
F314
90R
4321
FR2
FR1
90R
F315
4321
FR2
FR1
F323
90R
4321
FR2
FR1
S123
S125
S122
2 1
PANEL_VCC
S126
FULL HD/WO_FRC OPTION
PNX5100 DUAL LVDS IN/QUAD LVDS OUT
D20
D15
D17 AB17
E15
D10 D13
B15
AB15
L5
M5G5E7E6
P5J22F5E9 E16 K22
Y5 AA5
3100mA
250mA
AD13
L5
J5
T5
AF12
H5
K5
U5
N5 V5 W5 AB6 AB7 AB20
AB8 AB9 AB16 AC9 AE9 AF9
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
94
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
AUDIO IN/OUT & PERIPHERALS _28_CLOCK_12C Schematic Diagram
BAV99
D8
5V_VCC
BAV99
D7
YPBPR_AUD_L
50V
1n
C377
21
50V
1n
C378
21
VGA_G_IN
VGA_B_IN
U111
74V1G08
5
43
2
1
A B GND Y
VCC
U112
74V1G08
5
43
2
1
A B GND Y
VCC
5V_VCC
5V_VCC
600R
F81
21
F80
600R
21
YPBPR_AUD_R
JK3
2
4
6
5
3
1
RED
BLU
GRN
R11 10k
Q7
BC848B
3
2
1
D14
BAV70
3
21
R42 10k
21
50V
C365
1n
21
PC_DETECT
5V_VCC
AMP_MUTE
Q11
BC848B
3
2
1
50V
220p
C577
2 1
SPDIF_OUT
R387 100R
21
D6
BAV99
SPDIF_OUT_COAXIAL
R217
4k7
21
5V_SPDIF
C259
100n
10V
21
C288
100n
10V
21
R470
1k
21
R178
4k7
21
S53
21
TSMICLK_1
5V_SPDIF
F51
330R
21
5V_VCC
SPDIF_OUT_COAXIAL
50V
220p
C587
21
S52
C896
47n
16V
L42
220n
TP1
1
NUP4004M5
D61
54321
TP100
1
R480 100R
8
7
6
5 4
3
2
1
R2
R3
R1
R4
R386
100R
21
10k
R106
21
2k2
R489
2 1
10V
100n
C280
2
1
TP851TP86
1
10k
R105
21
10k
R1
21
NUP4004M5
D19
54321
2k2
R487
2 1
C282
100n
10V
D13
BAV70
3
21
VGA_5V
Y_IN
PB_IN
D26
C5V6
IR101
3
2
1
GND
VCC
VIN
120R
F115
F116
120R
120R
F114
ST24LC21
U13
8
7
6
5 4
3
2
1
A0
A1
A2
GNDSDA
SCL
WP
VCC
VGA_5V
PR_IN
S131
TP55
1
5V_SPDIF
GS10
VGA_HSNC
VGA_VSNC
R906
4k7
4k7 R905
3V3_VCC
3V3_VCC
X10
27MHz
2413
JK1
2
4
6 5
3
1
BLK
RED
WHT
100R
R366
CN15
1514131211
10
987654321
C328 10u 10V
C954
4p7 50V
C952 22p 50V
C953 22p 50V
SDA
R790
22k
L27
2u7
50V
1n C968
21
22R
R583
16V
47n
C897
C969 1n
50V
21
GS7
JK10
3
2
1
NUP4004M5
D11
54321
100R
R550
21
50V
1n
C369
21
SUBW_OUT
600R
F21
21
17mb70-5p
MB70 HW_TEAM
16
AUDIO_IN/OUT&PERIPHERALS_2&CLOCK_I2C
26-05-2011_11:37
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
C700
22p
50V
U1
BCM3556
A26
B25
A25
H5
H6
H4
H1
H2
H3
G1
K2
K3
J1
J2
W25
W26
W28
W27
AB25
AB27
AE25
AA24
AD25
AE24
B26
C24
D23
M24
M25
J3
J6
J4
J5
Y23
F20
C23
AC16
AF24
M6
AC26
AC27
CLK54_XTAL_P CLK54_XTAL_N PLL_RAP_AVD_TESTOUT VCXO_PLL_AUDIO_TESTOUT PLL_VAFE_TESTOUT DDR_EXT_CLK DDR_PLL_TEST PM_OVERRIDE
TMODE_0 TMODE_1 TMODE_2 TMODE_3
BSC_S_SCL/SPI_S_SCK BSC_S_SDA/SPI_S_MOSI
PKT0_CLK PKT0_DATA PKT0_SYNC
BYP_SYS216_CLK BYP_SYS175_CLK
BYP_CPU_CLK
CLK54_MONITOR
PLL_MAIN_MIPS_EREF_TESTOUT
PLL_DS_TESTOUT
SGPIO_00/BSC_M0_SCL SGPIO_01/BSC_M0_SDA SGPIO_02/BSC_M1_SCL SGPIO_03/BSC_M1_SDA SGPIO_04/BSC_M2_SCL SGPIO_05/BSC_M2_SDA SGPIO_06/BSC_M3_SCL SGPIO_07/BSC_M3_SDA
EJTAG_TRSTB
EFTAG_TDI EJTAG_TDO EJTAG_TMS EJTAG_TCK
EJTAG_CE0 EJTAG_CE1
RMX0_CLK RMX0_DATA RMX0_SYNC
7
22R
R585
C334 27p
50V
50V
27p
C336
2k7
R578
2k7
R577
SCL_TUN SDA_TUN
R512
1k
1k
R511
R521
1k
1k
R523
1k
R5261kR525
3V3_VCC
R582 330R
SCL
100R
R365
TSMISYNC_1
TS_MDI0_1
CN135
4
3
2
1
R603
47R
47R
R600
R606
47R
R598
47R
R599
47R
R601
47R
47R
R605
47R
R607
16V
100n
C180
16V
100n
C179
16V
100n
C178
C177
16V
100n
16V
100n
C176
100n
C175
16V
16V
100n
C174
16V
100n
C173
SC2_AUD_L_IN
SC1_AUD_R_IN
SC2_AUD_R_IN
SC1_AUD_L_IN
YPBPR_AUD_L
YPBPR_AUD_R
S132
AUDMX_RIGHT1
AUDMX_LEFT1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_LEFT3
AUDMX_LEFT4
AUDMX_RIGHT3
AUDMX_RIGHT4
SAV_AUD_L_IN
SAV_AUD_R_IN
16V
47n
C900
C901
47n
16V
3V3_VCC
D48
B5V1
U1
BCM3556
AG18
AH19
AF18
AH2
AF22
AG22
AF21
AE21
AG24
AH24
AH23
AG23
AH25
AG25
AG26
AH26
AG8
AE8
AH6
AE7
AG4
AF6
AD18
AD17
AE18
AF3
AH1
AH8
AH7
AF8
AD8
AG7
AH5
AF7
AG6
AG5
AH4
AD7
AE6
AUDMX_LEFT1
AUDMX_RIGHT1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_LEFT5
AUDMX_RIGHT5
AUDMX_LEFT6
AUDMX_RIGHT6
SPDIF_IN_P SPDIF_IN_N
I2S_CLK_IN I2S_DATA_IN I2S_LR_IN
AUDMX_INCM1
AUDMX_INCM2
AUDMX_INCM3
AUDMX_INCM4
AUDMX_INCM5
AUDMX_INCM6
AUD_LEFT0_P
AUD_LEFT0_N
AUD_RIGHT0_P AUD_RIGHT0_N
AUD_LEFT1_P
AUD_LEFT1_N
AUD_RIGHT1_P AUD_RIGHT1_N
AUD_LEFT2_P
AUD_LEFT2_N
AUD_RIGHT2_P AUD_RIGHT2_N
AUD_SPDIF
I2S_CLK_OUT I2S_DATA_OUT
I2S_LR_OUT
2
MAIN_R_N
R618 100R
100R
R616
R617 100R
100R
R615
6V3
1u
C141
C890 1u 6V3
C138
1u
6V3
SC_L_N
SC_L_P
SC_R_N
MAIN_L_P MAIN_L_N
MAIN_R_P
SC_R_P
AUDMX_LEFT4
C893 1u 6V3
AUDMX_RIGHT4
AUDMX_RIGHT3
AUDMX_LEFT3
AUDMX_RIGHT2
AUDMX_LEFT2
AUDMX_RIGHT1
AUDMX_LEFT1
HP_R_N
HP_R_P
HP_L_N
HP_L_P
SPDIF_OUT
TP176
TP174
TP175
TP185
TP187
TP186
S166
VGA_R_IN
TP184
120R
F203
F201
120R
120R
F202
C898
47n
16V
16V
47n
C899
C891
47n
16V
16V
47n
C892
C940 1u 6V3
C941 1u 6V3
C938 1u 6V3
6V3
1u
C939
B5V1
D47
SDA_S2
SCL_S2
R1036
75k
C894 1u 6V3
C139
1u
6V3
C895 1u 6V3
C140
1u
6V3
YPbPr
SPDIF OUTPUT INTERFACE
VGA INPUT
30061217 CAP SMD 2.2UF 6.3V M X5R (0402) MXM ROHS
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
95
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
DVB S2 Schematic Diagram
3V3_VCC
10k
R27
3V3_VCC
U30
LNBH23L
27 4 19 18 6 9 14 29 30
22 13 21 11 12
1 2 3 7 8 16 17 23 24 25 26 31 32
101528520
A_GND
P_GND
I_SEL
BYP
ADDR
NC_13
NC_12
NC_11
NC_10
NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
DSQIN
PDC
VO_RX
EXTM
VO_TX
RSV_2
RSV_1
TTX
SCL
SDA
VCC_L
VCC
LX
V_UP
50V
1u
C348
35V
100u
C339
25V
220n
C330
S71
S70
R591
15k
DISEQC
50V
C729
15n
25V
220n
C331
D34
1N5819
1N4001
D33
CN28
R1059
33R
4k7
R71
R900
4k7
4k7
R899
3V3_VCC
C325
220u
6V3
47R
R903
C721 33p 50V
TP247
RESET_IC
10k
R782
3V3_VCC
BC848B
Q109
100n
C768
10V
R783
10k
10k
R784
C951
22p 50V
TSMICLK
TSMIVALID
TSMISYNC
33R
R440
876
54
321
R2R3R1
R4
TP244
TP246
L41
10n
C937 6p8 50V
10n
16V
C777
50V
6p8
C936
C382 330u 35V
SDA_S2
82n
L31
5V_TUN
L29
10n
100p 50V
C730
LNB_OUT
C731
100p 50V
C710
56p
17mb70-5p
MB70 HW_TEAM
16DVB S2
26-05-2011_11:37
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
SCL_S2
TNR0_RFP
U25
BCM4505QLEG
3837363534333231302928272625242322212019181716151413121110
987654321
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
6566676869707172737475767778798081828384858687888990919293949596979899
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
S1_AFE_AVDD_1P2
S1_DSEC_IN
S1_AFE_AVDD_2P5
DSEC_TX
LNB_VSENSE
S1_FSK_AVDD_1P2
VDDC_1P2_14
S1_DSEC_TXOUT
S1_DSEC_TXEN
GPIO[4]
VDDC_1P2_13
VDDO_3P3_10
S1_LNB_SELV
S1_LNB_VCTL
VDDC_1P2_12
S1_TNR_SDA
S1_TNR_SCL
RST_OUTB
VDDO_3P3_9
S1_IF_AGC
S1_RF_AGC
TEST_EN[0]
JTAG_TDI
JTAG_TMS
VDDO_3P3_8
JTAG_TDO
JTAG_TCK
S1_PKT_DAT[7]
S1_PKT_DAT[6]
S1_PKT_DAT[5]
S1_PKT_DAT[4]
VDDO_3P3_7
VDDC_1P2_11
S1_PKT_DAT[3]
S1_PKT_DAT[2]
S1_PKT_DAT[1]
S1_PKT_DAT[0]
VDDC_1P2_10
S1_PKT_VALID
S1_PKT_SYNC
VDDC_1P2_9
VDDO_3P3_6
VDDC_1P2_8
S1_PKT_CLK
S1_PKT_ERROR
S0_PKT_ERROR
S0_PKT_CLK
VDDC_1P2_7
VDDO_3P3_5
VDDC_1P2_6
S0_PKT_SYNC
S0_PKT_VALID
VDDC_1P2_5
S0_PKT_DAT[0]
S0_PKT_DAT[1]
S0_PKT_DAT[2]
S0_PKT_DAT[3]
VDDC_1P2_4
VDDO_3P3_4
S0_PKT_DAT[4]
S0_PKT_DAT[5]
S0_PKT_DAT[6]
S0_PKT_DAT[7]
IRQ_OUTB
S0_AFE_AVDD_1P2
S0_DSEC_IN
S0_AFE_AVDD_2P5
S0_DSEC_TX
S0_LNB_VSENSE
S0_DSEC_AVDD_1P2
VDDC_1P2_1
S0_DSEC_TXOUT
S0_DSEC_TXEN
GPIO[0]
VDDC_1P2_2
VDDO_3P3_1
S0_LNB_SELV
S0_LNB_VCTL
VDDC_1P2_3
S0_TNR_SDA
S0_TNR_SCL
GPIO[3]
VDDO_3P3_2
S0_IF_AGC
S0_RF_AGC
TEST_EN[1]
HOST_SDA
HOST_SCL
VDDO_3P3_3
RESETB
S1_AFE_QN
S1_AFE_QP
S1_AFE_IP
S1_AFE_IN
T1_RF_IF_AVDD_1P2
T1_RF_IF_AVDD_2P5
T1_RFP_SHLD_1
T1_RFP_SHLD_2
T1_RFP
T1_RFN
T1_RFN_SHLD_1
T1_RFN_SHLD_2
T1_PLL_AVDD_2P5_1
T1_PLL_AVDD_2P5_2
T1_REF_AVDD_2P5
XTAL_AVDD_2P5
T1_SHLD
XTALN
XTALP
XTAL_AVDD_1P2
REF_PLL_AVDD_2P5_1
REF_PLL_AVDD_2P5_2
REF_PLL_AVDD_2P5_3
T0_PLL_AVDD_2P5_3
T0_PLL_AVDD_2P5_1
T0_PLL_AVDD_2P5_2
T0_RFN_SHLD_1
T0_RFN_SHLD_2
T0_RFN
T0_RFP
T0_RFP_SHLD_1
T0_RFP_SHLD_2
T0_RF_IF_AVDD_2P5
T0_RF_IF_AVDD_1P2
S0_AFE_IN
S0_AFE_IP
S0_AFE_QP
S0_AFE_QN
TS_MDI0
R55
4k7
SCL_LNBP
SDA_LNBP
TNR0_RFN
TNR0_RFP
R62 4k7
4k7
R66
3V3_VCC
3V3_VCC
D29
1N4148
R310
33R
33R
R309
50V
33p
C722
X5
27MHz
21
SDA
SCL
IRQ_S2
R73
4k7
3V3_VCC
4k7
R67
R47
4k7
4k7
R69
3V3_VCC
R63
4k7
R60
4k7
TP245
R322
4k7
25V
C329 220n
1k
R127
R324
2k2
R323
4k7
SDA_LNBP SCL_LNBP
3V3_VCC
R904 47R
3V3_VCC
DISEQC
10k
R26
3V3_VCC
R262
15R
3V3_VCC
Q1 BC817-25
R260
15R
3V3_VCC
15R
R261
LNB_OUT
D1
SS33
12V_VCC
4k7
R52
L30 R584
22R
ISL55012
U31
6
5
43
2
1
GND1
GND2
IN VSP
GND3
OUT
50V100p
C736
50V
15p
C739
F61
1k
10u C436
PDC
C670
1u
C738
100p 50V
C908
100p
50V
50V
2p2
C704
C640
2p2
50V
TNR0_RFN
LNB_OUT
3V3_VCC
3V3_VCC
4k7
R49
3V3_VCC
R53
4k7
3V3_VCC
R57
4k7
3V3_VCC
R87
4k7
3V3_VCC
4k7
R85
3V3_VCC
3V3_VCC
4k7
R83
4k7
R82
R25
1k
3V3_VCC
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_3V3
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
S2_1V2
1V2_VCC
3V3_VCC
F149
220R
220R
F150
6V3
220u
C342
C71
100n
16V
16V
100n
C68
C69
100n
16V
C66
100n
16V
16V
100n
C67
16V
100n
C64
C778 10n 16V
C775 10n 16V
C776 10n 16V
C773 10n 16V
C774 10n 16V
C647
1n
50V
50V
1n
C645
C646
1n
50V
50V
1n
C643
C644
1n
50V
50V
1n
C642
1V2_VCC
2V5_VCC
16V
100n
C192
C114
100n
16V
C191
100n
16V
220R
F160
F161
220R
F158
220R
1V2_VCC
C190
100n
16V
2V5_VCC
16V
100n
C113
16V
100n
C189
220R
F159
F157
220R
2V5_VCC
16V
100n
C188
1V2_VCC
16V
100n
C187
220R
F156
220R
F155
2V5_VCC
C186
100n
16V
1V2_VCC
C185
100n
16V
F154
220R
F153
220R
C184
100n
16V
1V2_VCC
16V
100n
C183
2V5_VCC
F152
220R
C182
100n
16V
2V5_VCC
220R
F151
PDC
L40
22u
BALUN
F193
330R
S190 S188 S187
S189
open
75 OHM LINE
Option for heavy capacitve load
WIDTH:69 MIL
GND AIRGAP:130 MIL
OPEN
CLOSE TO ISL55012
BALUN CIRCUIT
24.9R%1
100R DIFF TRACE
TP?
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
96
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
DVB C & DVB T2 Schematic Diagram
DIGITAL_IF_P
DIGITAL_IF_N
TSMICLK_1
RESET_IC
R118 10k
R1058
33R
C950 22p 50V
33R
R1057
3V3_DVDD
C272
10V
100n
C750 10u 10V
BC848B
Q5
TSMISYNC_1
TSMIVALID_1
TS_MDI0_1
10k
R781
IF_AGC_T2
RF_AGC_T2
RF_AGC
IF_AGC
MSB1222_XOUT
5V_TUN
AGC_SW1 AGC_SW2
100n
C767
10V
BC848B
Q110
10k
R780
RESET_IC
X11
41MHz
2413
IFAGCMSB1222
RFAGCMSB1222
C734 22u 6V3
U33
LM1117
4
3 2
1
GND
OUTIN
VOUT
DIGITAL_IF_P
IF_AGC_TUNER
RF_AGC_TUNER
3V3_VCC
6V3
22u
C249
1V2_VCC_DEMOD
C695 22u 16V
17mb70-5p
MB70 HW_TEAM
16DVB C&DVB T2
26-05-2011_11:38
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
MSB1222_XIN
S135
C283
10V
100n
C733 10u 10V
10V
100n
C193
2
1
1V2_CVDD
2V5_AVDD
1V2_PVDD
1V2_MVDD
3V3_DVDD
3V3_DVDD
1V2_CVDD
3V3_DVDD
SDA
SCLRF_MONITOR
2V5_AVDD
3V3_RVDD
47R R414
R448
47R
R43 10k R44 10k
10k
R114
600R
F142
2V5_AVDD
F43
330R
F33
330R
100n
C299
10V
100n
C300
10V
2V5_VCC
3V3_DVDD
S137
S134
3V3_RVDD
16V
22u
C563
F35
330R
3V3_IF
10V
100n
C298
100n
10V
C260
100n
10V
C275
330R
F44
100n
10V
C315
100n
10V
C314C271
10V
100n
10V
100n
C286
100n
C319
10V
10V
100n
C317
C284
10V
100n 100n
C316
10V
10V
100n
C318
F32
330R
F31
330R
330R
F42
1V2_PVDD
1V2_MVDD1V2_VCC
1V2_CVDD
100n
C273
10V
10V
100n
C285
CXD2820_XIN
CXD2820_XOUT
CXD2820_XOUT
CXD2820_XIN
22k
R508
R143
10k
C656
50V
1n
R45
10k
C313
100n
U27
CXD2820R
16151413121110
987654321
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
333435363738394041424344454647
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
IFAGC
RFAGC_GPIO1
PLLBPN
CVDD
VSS9
DVDD
TUNERCLK
TUNERDAT
CVDD6
VSS8
RVDD
RFAIN
AVDD1
AVSS1
AINP
AINM
XVSS
XTALI
XTALO
XVDD
PVDD
PVSS
MVSS4
MVDD4
MVDD3
MVSS3
OSCMODE
RESETN
CVDD5
VSS7
OSCENBN
A0
TSDATA3
MVSS2
MVDD2
CVDD3
VSS4
TSDATA4
TSDATA5
TSDATA6
TSDATA7
VSS5
DVDD2
SCL
SDA
CVDD4
VSS6
TESTMODE
GPIO0
TSERR_GPIO2
TSSYNC
TSVALID
TSCLK
VSS1
CVDD1
MVDD1
MVSS1
VSS2
DVDD1
TSDATA0
TSDATA1
CVDD2
VSS3
TSDATA2
C312
100n
10k
R115
R119 10k
1V2_CVDD
1V2_MVDD
SCL_DEMOD
1V2_CVDD
3V3_DVDD
1V2_CVDD
SDA_DEMOD
C293
10V
100n
IF_AGC_T2
3V3_DVDD
1V2_CVDD
1V2_MVDD
1V2_CVDD
RF_AGC_T2
10k
R130
R131
10k
TS_MDI0_1
10V
100n
C294
TSMISYNC_1
TSMIVALID_1
TSMICLK_1
33R
R439
8
7
6
5 4
3 2 1
R4 R3 R2 R1
MSB1222
U32
121110
987654321
24
23
22
21
20
19
18
17
16
15
14
13
2526272829303132333435
36
37
38
39
40
41
42
43
44
45
46
47
48
TS_ERR
TS_CLK
TS_DATA7
TS_DATA6
TS_DATA5
VDDP3
TS_DATA4
TS_DATA3
TS_DATA2
TS_DATA1
TS_DATA0
TS_VLD
TS_SYNC
VDDP2
GND7
IF_AGC
RF_AGC
GND6
VDDC4
GND5
VDDC3
I2CM_SDA
I2CM_SCL
XTAL_MODSEL
GND3
ZIF_QM
ZIF_QP
ZIF_IP
ZIF_IM
AVDD1
VREFM
VREFP
GND4
XIN
XOUT
AVDD2
VDDC1
GND1
VDDP1
I2CS_SCL
I2CS_SDA
GPIO1
VDDC2
GND2
RESETZ
GPIO2
GPIO3
PLL_TEST
3V3_IF
C689 22n 16V
100R
R374
10V
2u2
C746
5V_IF_SUP
DIGITAL_IF_N
16V
22n
C690
R145
10k
R396 100R
C745 2u2 10V
U104
M74HC4052
16 15 14 13 12 11 10 98
7
6
5
4
3
2
1
2Y0 2Y2 2Z 2Y3 2Y1 E VEE GND S1
S0
1Y3
1Y0
1Z
1Y1
1Y2
VCC
R450
1k
1V2_VCC_DEMOD
330R
F41
21
1V2_MSB
1V2_MSB
1V2_MSB
3V3_MSB
3V3_MSB
3V3_MSB
1V2_MSB
1V2_MSB
2V8_MSB_ADC
2V8_MSB_PLL
2V8_MSB_PLL
F40
330R
21
10V
2u2
C748
C287 100n 10V
2V8_MSB
2V8_MSB_ADC
C310 100n 10V
10V
100n
C311
C747 2u2 10V
330R
F39
21
2V8_MSB
C295 100n 10V
10V
100n
C297
C296 100n 10V
C269 100n 10V
10V
100n
C308
C309 100n 10V
F30
330R
21
C305 100n 10V
10V
100n
C306
3V3_MSB
3V3_IF
TP99
1
R80
10k
C307 100n 10V
10k
R79R77
10k 10k
R78
10k
R99
R100
10k
3V3_MSB
2V8_MSB
S136
MSB1222_XIN
MSBXTALMODSEL
MSB1222_XOUT
50V
27p
C720
2k
R595
R594
2k
10V
100n
C261
10V
C262
100n
ZIF_QN
R151
10k
S68
ZIF_QP
50V
C725
27p
MSBXTALMODSEL
ZIF_QP
ZIF_QN
ZIF_IP
ZIF_IN
ZIF_IP
ZIF_IN
22R
R588
R587
22R
10V
C243
100n
10V
100n
C240
33R
R306
R308
33R
SDA
SCL
TP60
1
R292
33R
8 7 6 5 4
3
2
1
R4
R3
R2
R1
10V
100n
C270
33R
R313
R314
33R
4k7
R209
3V3_VCC
3V3_VCC SCL_DEMOD
10k
R101
3V3_IF
10V
10u
C442
SDA_DEMOD
R207
4k7
4k7
R206
10k
R5
IFAGCMSB1222
RFAGCMSB1222
5V_VCC
220R
R608
LM1117
U24
4
3 2
1
GND
OUTIN
VOUT
10V
10u
C751
16V
22u
C956
F37
330R
21
R456
1k
R462
1k
2V8_MSB
5V_VCC
3V3_IF
R597 220R
715R
R589
LM1117
U23
4
3 2
1
GND
OUTIN
VOUT
16V
47u
C694
2
1
330R
F36
21
R613
560R
5V_IF_SUP5V_TUN
10V
10u
C422
60R
F19
21
C194 22u 6V3
1V2 FIXED REG
11-->0XF2
10-->0XB2
01-->0X72
00-->0X32
GPIO3-2-->I2C ADDR
NCNC
NC
CAN TUNER:BJT
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
97
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
GPIO & LOW_PWB & LED Schematic Diagram
EEPROM_SCL EEPROM_SDA
TP105
1
3V3_STBY
TP104
1
R959
33R
10k
R1050
U103
24C32
7
8
6 54
3
2
1
E0 E1 E2 VSS SDA
SCL
VCC
WC
FLMDO
17mb70-5p
MB70 HW_TEAM
16GPIO&LOW_PWR&LED
26-05-2011_11:38
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
U1
BCM3556
L6
L4
M1
M2
M3
P26
K5
K6
P27
P28
R26
R27
R28
N23
M26
L27
K1
K4
L5
P25
L24
G4
G6
G5
G3
G2
Y27
Y28
L23
M5
M4
AE19
AD19
M23
P23
AH18
N27
N28
R25
AA25
M27
Y26
Y25
L2
L3
L1
AA26
AA28
AA27
K25
K26
K24
K28
K27
L25
N25
L26
N26
GPIO_00
GPIO_01
GPIO_02
GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30 GPIO_31
GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
4
VFD_RX_SDA
UART_HEX_DWLD_TX
S195
LED3
PROTECT_PANEL
S205
2 1
UART_HEX_DWLD_RX
Q127 BC848B
3
2
1
PIN8_WAKEUP
SC1_PIN8_NOT
BCM_TX
3V3_STBY
OCDA_DEBUG
3V3_VCC
C181
100n
10V
2 1
MHL_CONTROL
10k R967
2 1
3V3_STBY
R881
1k
3V3_STBY
VFD_TX_SCL
CN1
121110
987654321
SC1_PIN8_NOT
BCM_RX
4k7
R986
21
PROTECT_PANEL
R1009
10k
2 1
3V3_STBY
X1
10MHz
LED1
UART_HEX_DWLD_RX
IR_IN
UART_HEX_DWLD_TX
R985
4k7
21
50V
1n
C930
BCM_RX
LED2
TP107
1
R311 33R
MOTION_SENSOR
STBY_ON/OFF_NOT
BCM_TX
R120
10k
21
10k
R116
21
INT_A
C381
1u 6V3
MOTION_SENSOR
C724
27p
50V
21
F63
1k
R10
10k
21
220R
R609
21
LED2
R122
10k
21
5V_STBY
3V3_STBY
220R
R610
21
TP108
1
TP92
1
Q27
BC858B
3
2
1
3V3_VCC
3V3_VCC
3V3_VCC
PIN8_WAKEUP_2
4k7
R994
21
3V3_STBY
R995
4k7
2 1
SC2_PIN8_NOT
R998 100R
Q128 BC848B
3
2
1
3V3_VCC
TSMIVALID_1
3V3_STBY
R1051
10k
3V3_STBY
C926 27p 50V
3V3_STBY
R989 100R
D46
1N4148
2 1
IR_BRCM_IN
S204
21
IR_BRCM_IN
3V3_VCC
10k
R1071
2 1
X9
32.768kHz
2
4 1
3
10k
R947
2 1
U113
DS1337S
8
7
6
54
3
2
1
X1
X2
INTA
GND SDA
SCL
INTB
VCC
Q132
BC848B
FLMDO
10k
R125
2
RESET_BCM
U10
uPD78F0503
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
P32
P31
P30
P17
P16
P15
P14
P13
P12
P11
P10
AVREF
AVSS
P23
P22
P33
P61
P60
VDD
VSS
REGC
P121
P122
FLMD0
RESET
P120
P00
P01
P20
P21
3V3_STBY
C490
16V
100n
3V3_STBY
3V3_VCC
CI_CD1
R862
10k
21
TS_MDI0
TSMIVALID
TSMISYNC TSMICLK
R320
33R
R126
10k
21
Q24
BC858B
3
2
1
R318
33R
R307
33R
AGC_SW2
R319
33R
EEPROM_SCL
OCDB_DEBUG
R104
10k
21
3V3_STBY
R321
33R
33R
R316
AGC_SW1
50V
27p
C916
10k
R966
R301
10k
2 1
INT_A
3V3_VCC
10k
R2
NVM_WP
GP19_POD_RST
CI_CD2
GP37_POD2CHIP_MCLKI_VS2_N
GP23_POD_VS1_N
3V3_VCC
3V3_VCC
3V3_VCC
GP40_DVB_OE_N
GP41_DVB_IOIS16_N
GP39_POD_IRQ_N
CI_PWR_CTRL
HDMI_INT
HP_DETECT AMP_MUTE EXT_RESET
R1031
10k
3V3_VCC
R1032
4k7
OPTION2
BACKLIGHT_ON/OFF
PANEL_VCC_ON/OFF
BACKLIGHT_DIM
BCM_RX_DEBUG
BCM_TX_DEBUG
2 1
R315 10k
10k
R419
2 1
R6
10k
2 1
R297
10k
2 1
4k7
R1033
3V3_VCC
10k
R291
21
R317
10k2110k
R136
21
3V3_VCC
10k
R19421R180
10k
21
R225
10k2110k
R269
21
10k
R27021R227
10k
21
3V3_VCC
R222 10k
2 1
10k
R193
2 1
R252 10k
21
IR_IN
3V3_VCC
R278
10k
2 1
600R
F192
21
R993
10k
21
OCDB_DEBUG
R965
10k
10k
R300
2 1
3V3_VCC
R879
10k
S180
2 1
S207
C946 1u 6V3
R1052
100R
IRQ_S2
SC2_PIN8_NOT
S174
2 1
S173
2 1
CEC_OUT
PC_DETECT
S178
2 1
S179
2 1
R991
10k
21
CN138
8
7
6
5
4
3
2
1
R1026
2k7
Q10
BC848B
3
2
1
3V3_STBY
STBY_INFO
S124
21
PANEL_VCC
F200
1k
3V3_STBY
12V_VCC
TOUCH_SDA
10k
R964
2
1
AMBILIGHT_SENSOR
R121
10k
21
3V3_VCC
R596
220R
21
3V3_VCC
220R
R611
21
R944
10k
2 1
S25
21
S61
21
R8
10k
21
Q15
BC848B
3
2
1
LED1
CN4
54321
S62
21
LED3
5V_STBY
600R
F84
21
C723
27p
50V
21
F85
600R
21
AMBILIGHT_SENSOR
F66
600R
21
Q12 BC848B
3
2
1
100R
R871
R9 10k
21
C719
27p
50V
21
R17 10k
21
50V
27p
C717
21
1k
F64
C718
50V
27p
21
3D_SHUTTER
F82
600R
21
IR_IN
10k
R138
21
10k
R142
21
BC848B
Q20
3
2
1
3V3_STBY
10k
R16
21
3V3_STBY
10k
R141
2 1
R41
10k
S5621S57
21
3V3_VCC
S175
2 1
S176
2 1
10k
R992
21
3V3_STBY
C915
27p
50V
FPGA_GPIO1
FPGA_GPIO3
PNX_VSYNC
3V3_VCC
5V_VCC
10k
R883
21
R884
10k
21
BC848B
Q119
3
2
1
24V_VCC
R880
10k
21
R882
10k
21
BAW56
D40
3
21
R885
10k
21
10k
R886
21
BC848B
Q118
3
2
1
Q120
BC858B
3
2
1
10k
R888
21
3V3_STBY
33k
R896
2 1
D41
BAW56
3
21
R889
10k
2 1
BAW56
D39
3
21
10V
100n
C849
2
1
PROTECT
TP227
1
10k
R887
21
6k8
R898
R893
10k
21
3V3_VCC
BAW56
D38
3
21
8V_VCC10k
R890
21
R895
33k
2 1
33k
R894
2 1
R891
10k
21
18V_VCC
D49
1N4148
5V_TUN
3V3_IF
R892 10k
21
BAW56
D42
3
21
3V3_VCC
R872
100R
R877
47k
47k R874 100R R869
6k8 R897
2V8_MSB
2V5_VCC
1V2_VCC_DEMOD
47k R876 100R R867
PROTECT
47k
R875
1V2_VCC
R873
47k
R868
100R
BC858B Q121
3
2
1
D43
BAW56
3
21
BAW56
D45
3
21
100R
R870
47k
R878
1V25_VCCFRC
OVER_CUR_DETECT
S5
NUP4004M5
NUP4004M5
D12
NUP4004M5
54321
ZENER
D16
C5V6
21
S150
S149
EEPROM_SDA
EEPROM_SCL
3V3_STBY
ANT_CTRL
3V3_VCC
S183
2 1
UC_CEC
S184
2 1
TOUCH_SCL
S181
2 1
S182
2 1
OCDA_DEBUG
C5V6
D15
ZENER
21
KEYBOARD
EEPROM_SDA
FPGA_GPIO2
C933 1n 50V
50V
1n
C931
1k
F194
3V3_STBY
1k
F195
1k
F197
50V
1n
C928
F198
1k
C929
1n
50V
F199
1k
50V1n
C927
F196
1k
C932
1n
50V
RGB_DETECT
TXD1
RXD1
DNI
SHORT CCT PROTECTION
LOW POWER+CEC MICROCONTROLLER
LED&VFD
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
98
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
FPGA Schematic Diagram
TP249
PNX_VSYNC
FPGA_SPI_CLK
FPGA_SPI_D
S142
S141
FPGA_VSYNC
FPGA_SPI_D
FPGA_VSYNC
100R
R909
FPGA_SPI_CLK
R910 100R
D58
1N4148
+3V3
C958
1u 6V3
TP94
TP93
TP56
TP58
17mb70-5p
MB70 HW_TEAM
16FPGA
26-05-2011_11:38
87654321
A
B
C
D
E
F
AXM
1 2 3 4 5 6 7 8
A
B
C
D
E
F
A3
PROJECT NAME :
VESTEL
SCH NAME :
DRAWN BY :
TOTAL SHEET:
CN133
8765432
1
1V2_VCC
2V5_VCC
60R
F184
21
100n C793
16V
C844
6V3
220u
TX_B_4_P
16V
C794
100n
TX_B_4_N
F185
60R
21
TX_B_3_P
TX_B_3_N
TX_B_CLK_P
TX_B_CLK_N
TX_B_2_P
TX_B_2_N
TX_B_1_P
TX_B_1_N
TX_B_0_P
TX_B_0_N
TX_B_1_N_PIX
TX_B_0_N_PIX
TX_B_0_P_PIX
TX_A_4_P_PIX
TX_A_3_P_PIX TX_B_3_P_PIX
TX_A_2_P
TX_A_2_N
TX_A_4_N_PIX
TX_A_1_N
TX_A_3_N_PIX TX_B_3_N_PIX
TX_B_CLK_P_PIX
TX_B_CLK_N_PIX
TX_B_2_P_PIX
TX_B_2_N_PIX
TX_B_1_P_PIX
TX_A_CLK_P_PIX
TX_A_CLK_N_PIX
TX_A_2_P_PIX
TX_A_2_N_PIX
TX_A_1_P_PIX
TX_A_1_N_PIX
TX_A_0_P_PIX
TX_A_0_N_PIX
R820 100R
100R
R841
R828 100R
100R
R830
R843 100R
100R
R842
90R
F179
4
3 2
1
FR2
FR1
F181 90R
4
3 2
1
FR2
FR1
F180 90R
4
3 2
1
FR2
FR1
90R
F182
4
3 2
1
FR2
FR1
F177 90R
4
3 2
1
FR2
FR1
90R
F172
4
3 2
1
FR2
FR1
TX_B_0_N
TX_A_4_N_PIX
TX_A_3_N_PIX
TX_A_CLK_N_PIX
TX_A_2_N_PIX
TX_A_1_N_PIX
TX_A_0_N_PIX
TX_A_0_P_PIX
TX_A_1_P_PIX
TX_A_2_P_PIX
TX_A_CLK_P_PIX
TX_A_3_P_PIX
TX_A_4_P_PIX
TX_B_0_P
TX_B_1_P
TX_B_1_N
TX_B_2_P
TX_A_0_N
TX_A_3_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_2_P
TX_A_CLK_N
TX_A_CLK_P
TX_B_2_N
TX_B_CLK_P
TX_A_4_N
TX_A_4_P
TX_A_0_P
TX_A_3_N
F178 90R
4
3 2
1
FR2
FR1
90R
F183
4321
FR2
FR1
F176 90R
4
3 2
1
FR2
FR1
90R
F173
4321
FR2
FR1
F174 90R
4321
FR2
FR1
90R
F175
4
3 2
1
FR2
FR1
TX_B_4_N_PIX
TX_B_2_N_PIX
TX_B_CLK_N_PIX
TX_B_3_N_PIX
TX_B_0_N_PIX
TX_B_1_N_PIX
TX_B_0_P_PIX
TX_B_4_P_PIX
TX_B_1_P_PIX
TX_B_2_P_PIX
TX_B_CLK_P_PIX
TX_B_3_P_PIX
TX_B_CLK_N
TX_B_3_P
TX_B_3_N
TX_B_4_P
TX_B_4_N
TX_A_0_P_PIX TX_A_1_N_PIX TX_A_1_P_PIX TX_A_2_N_PIX
TX_A_2_P_PIX TX_A_CLK_N_PIX TX_A_CLK_P_PIX
TX_A_3_N_PIX
TX_A_3_P_PIX TX_B_CLK_N_PIX TX_B_CLK_P_PIX
TX_A_0_N_PIX
TX_A_4_N_PIX
TX_A_4_P_PIX
TX_B_4_P_PIX
TX_B_4_N_PIX
TX_B_3_P_PIX
TX_B_3_N_PIX
TX_B_2_P_PIX
TX_B_2_N_PIX
TX_B_1_P_PIX
TX_B_1_N_PIX
TX_B_4_N_PIX
TX_B_4_P_PIX
330R
F186
21
3V3_VCC
16V
22u
C883
C875 100n 10V
TP215
+3V3
R819 4k7
3V3_VCC
FPGA_GPIO2
R833 100R
4k7
R809
+3V3
+3V34k7
R800
R829 100R
100R
R822
R831 100R
100R
R845
R846 100R
100R
R844
TX_B_0_P_PIX
TX_B_0_N_PIX
+1V2_FPGA
220u 6V3
C843
+2V5_FPGA
C809 100n 10V
+3V3
XCS1200E
U106
M14
F5
B10
B5
B12F7F10
E15
G11
K11
M15L7L10R5R12
E2G6K6M2D4
D13E5E12M5M12N4N13A6A11F1F16L1L16T6T11A1A16
B9
F6
F11
G7G8G9
G10
H2H7H8
H9
H10
J7J8J9
J10
J15
K7K8K9
K10
L6R8T1
T16
A15A2C14
B15
A7
A12
B4 B2 B1 E4
L11
N14
C1 E3
N16
F3
L13
N6 E1
L12
M6
D1 E10 L15
P6
G4 D10 L14
R6
G5
P7
G2
N7
G3 K15
F8
K1
E8
J1
C7
K3
B7
K2 G13
L3 F15 M10
L5 F14 N10
K5 F12
N1 F13
M1 E16
L4 E13
M4
C4
P1
C5
R1
P2
R2 R15
T8 K12 R16
P15
P16
K13P5J16L8K16M8J13P8J14N8H14
H15
H11N9H12P9G16
G15
G14
D14
N12
D15
C15
R13
C16
T13
P14
T9
C2
N15
M16F4K14
R10
L2
D9
P13R4H13
D16
G1N2T7F9H6E9H5H4H3J3J2D8J4C8J5
C12
D12C9C10
R7E6D5
M11 N11
B6
M7
T12
A3 B16 C13
D2 E14
F2 G12
H1 H16
J6 J11 J12
K4
M3 M13
N3
T2 T14
B3
C3
A4
A5
D6
C6
B8
A8
D7
E7
A9 A10 B11 C11 E11 D11 A13 B13 A14 B14 T15
D3
T5
T4
P4 P10 P11 P12 R11
R3
T3
L9 T10
R9 R14
P3
N5
M9
D0
MOSI
CSO_B
CCLK
M2
M1
M0
SW_2
SW_1
LED4
LED3
LED2
LED1
INIT_B
SCL
SDA
PROG_B
DONE
TX3+
TX3-
TX_CLK+
TXCLK-
TX2+
TX2-
TX1+
TX1-
TX0+
TX0-
RX3+
RX3-
RX_CLK+
RX_CLK-
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
INPUT24
INPUT23
INPUT22
INPUT21
INPUT20
INPUT19
INPUT18
INPUT17
INPUT16
INPUT15
INPUT14
INPUT13
INPUT12
INPUT11
INPUT10
INPUT9
INPUT8
INPUT7
INPUT6
INPUT4
INPUT1
L17P_2
L17N_2
L16P_0
L16N_0
L08P_2
L07P_0
L07N_0
L02P_0
L02N_0
L11P_3
L11P_0
L11N_3
L11N_0
L10P_3
L10N_3
L09P_3
L09N_3
L08P_3
L08P_0
L08N_3
L08N_0
L08N_2
VREF_3_2
VREF_3_1
VREF_1_2
VREF_1_1
VREF_2_2
VREF_2_1
VREF_0
L14N_3
L14N_2
L08N_1
L04N_3
L04N_1
L03N_1
L02N_3
L11P_2
L20P_2
L19P_2
L19P_1
L19N_2
L19N_1
L18P_1
L18N_2
L18N_1
L14N_1
L13P_1
L13N_1
L12P_2
L12P_1
L12N_2
L12N_1
L11P_1
L11N_1
L10P_2
L10P_1
L10N_2
L10N_1
L09P_2
L09P_1
L09N_2
L09N_1
L03P_2
L07P_1
L02P_1
L02N_1
L01P_1
L07N_1
D5
L01N_1
L19P_3
L18P_3
L19N_3
L18P_0
L18N_3
L18N_0
L17P_3
L17P_1
L17N_3
L17N_1
L16P_3
L16P_1
L16N_3
L16N_1
L15P_3
L15P_2
L15P_1
L15N_3
L15N_2
L15N_1
L14P_3
L14P_1
L13P_3
L13P_0
L13N_3
L13N_0
L12P_3
L12P_0
L12N_3
L12N_0
L08P_1
L07P_3
L07P_2
L07N_3
L07N_2
L06P_3
L06P_2
L06P_1
L06P_0
L06N_3
L06N_2
L06N_1
L06N_0
L05P_3
L05P_2
L05P_1
L05N_3
L05N_2
L05N_1
L04P_3
L04P_1
L03P_3
L02P_3
L03P_1
L03N_3
L01P_3
L01N_3
GPIO3
GPIO2
GPIO1
TMS
TDO
TDI
TCK
GND28
GND27
GND26
GND25
GND24
GND23
GND22
GND21
GND20
GND19
GND18
GND17
GND16
GND15
GND14
GND13
GND12
GND11
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
VCCAUX8
VCCAUX7
VCCAUX6
VCCAUX5
VCCAUX4
VCCAUX3
VCCAUX2
VCCAUX1
VCCINT8
VCCINT7
VCCINT6
VCCINT5
VCCINT4
VCCINT3
VCCINT2
VCCINT1
VCCO16
VCCO15
VCCO14
VCCO13
VCCO12
VCCO11
VCCO10
VCCO9
VCCO8
VCCO7
VCCO6
VCCO5
VCCO4
VCCO3
VCCO2
VCCO1
INPUT2 INPUT3
INPUT5
U107
M25P40
8
7
6
5 4
3
2
1
S
Q
W
VSSD
C
HOLD
VCC
10k
R849
2 1
R850
10k
2 1
R848
10k
2 1
+3V3
+3V3
10k
R847
2 1
CSO_B
D0
W_PROTECT
HOLD
CCLK
MOSI
R810
4k7
10V
100u
C846
R804 4k7
4k7
R817
R818 4k7
BC848B
Q116
R840 100R
PROG_B
+3V3 INIT_B
C808
100n
10V
C807 100n 10V
DONE+2V5_FPGA
+2V5_FPGA
FPGA_GPIO1
DONE
PROG_B
INIT_B
SDA
SCL
100R
R832
R834 100R
CN126
1413
1211
109
876543
21
+3V3
R823
100R
100R
R826
R824
100R
100R
R827
CSO_B
CCLKD0MOSI
TP216
TP199
R806
4k7
4k7
R805
C837
1u
6V3
+3V3
4k7
R801
4k7
R816
R802
4k7
M2
M0
M2
+3V3
M0
FPGA_LED1
DEBUG_M16
FPGA_LED3 FPGA_LED4
SW1 SW2
R807
4k7
+3V3
4k7
R808
4k7
R811
R812
4k7
SW1
SW2
S127
FPGA_LED1 DEBUG_M16 FPGA_LED3 FPGA_LED4
TP207
TP205
TP206
TP208
R821 100R
FPGA_GPIO3
R836
100R
100R
R838
R839
100R
100R
R837
TP209 TP211 TP212
TP210
CCLK
CSO_B
MOSI
D0
100R
R825
+3V34k7
R803
W_PROTECT
HOLD
R813
4k7
4k7
R814
R815
4k7
TP213
TP201
TX_A_1_P
TX_A_3_P
TX_A_4_P
TX_A_CLK_N
TX_A_CLK_P
TX_A_3_N
TX_A_4_N
PNX_VSYNC
R835
100R
TX_A_0_P
TX_A_0_N
+1V2_FPGA
R853
47R
R852
47R
+2V5_FPGA
+2V5_FPGA
+3V3
+2V5_FPGA
10V
100n
C834
C835 100n 10V
10V
100n
C836
C829 100n 10V
C838 10u 10V
+3V3
10V
100n
C830
10V
10u
C839
C831 100n 10V
10V
100n
C832
C825 100n 10V
C826 100n 10V
10V
100n
C827
C828 100n 10V
10V
100n
C821
+1V2_FPGA
C840 10u 10V
10V
100n
C822
C823 100n 10V
10V
100n
C824
C817 100n 10V
10V
100n
C818
C819 100n 10V
10V
100n
C820
C813 100n 10V
10V
100n
C814
C815 100n 10V
10V
100n
C816
C810 100n 10V
+2V5_FPGA
10V
100n
C811
C812 100n 10V
R854 330R
47R
R851
+2V5_FPGA
C806 330p 50V
50V
330p
C802
C803 330p 50V
50V
330p
C804
C805 330p 50V
50V
330p
C798
C799 330p 50V
50V
330p
C800
+1V2_FPGA
C801 330p 50V
50V
330p
C795
C796 330p 50V
50V
330p
C797
C841 10u 10V
spcap
LG LOCAL DIMMING OPT.
R12R5L10L7 N13N4D13D4
N13M12N4M5D13E12E5D4
K11K6G11G6T11T6L16L1F16F1A11A6
M15M2B12B5E15E2F10F7
PLACE TOP SIDE
FPGA SUPPLY VOLTAGES
100 OHM FPGA LVDS IN TERMINATION
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
99
LC-32LE340/343 LC-40LE340/343
LC-32LE340/343 LC-40LE340/343
1
2 3 4 5 6 7 8 9 10
11 12
13
14
15 16
I
H
G
F
E
D
C
B
A
POWER SUPPLY Schematic Diagram
27k
R106
25V
1u
C132
20R
R128
330k
R104
S111
S109
GNDCAP
47k
R110
AC1_start
15R
R107
25V
1u
C120
330R
R122
4kV
2n2
C198
50V
1n
C123
AC2
ZCD
S106
ZCD
2k7
R102
20R
R129
330k
R105
SW_OFF
+400V
25V
1u
C124
CS1
4kV
2n2
C119
1kV
470p
C116
AC3
20R
R125
+400V
S107
0R47
R108
47k
R131
20R R130
+400V
120k
R120
25V
1u
C129
RS1008_SOD123
D104
330R
R121
27k
R101
4kV
2n2
C193
20R
R126
16V
1u
C107
VCC2
0R47
R109
ZCD
50V
10n
C131
VCC1
1u
C112
16V
FQPFN50C
Q100
20R R127
330k
R103
S110
S108
50V
10n
C104
GNDCAP1
VAR-510V-YATIK
R100
RS1008_SOD123
D102
10k
R116
C8V2_SOD123
D101
1M
R113
AC5
1M
R1111MR114
1M
R1191MR118
1M
R117
AC1
GNDCAP1
4kV
2n2
C190
RL207
D108
RL207
D109
PL101
1
2
PL100
1
2
FERRITE_BEAD_FTZ_AXIAL_8x17x7
L104
FERRITE_BEAD_FTZ_AXIAL_8x17x7
L105
S112
S105
BC858B
Q120
10k
R132
10k
R134
10k
R135
FQPFN50C
Q122
15R
R133
BC858B Q121
VSW
CS1
VSW
GATE
GATE
GATE
1u
C136
16V
2k7
R138
1N5406
D111
1N5406
D110
630V
10n
C133
630V
10n
C138
S114
S115
275V
220nF
C100
150u
TR101
7
2
70R
FR100
L101
1 2
34
L102
1 2
34
1u
C429
1k
R409
1R5
R411
+5V
CSSD
1N4148_SOD123
D401
10k
R417
NCP1579
IC400
1BST
3GND6 FB
8 PHASE
2TG
4BG
7 COMP/DIS
5 VCC
16V
1u
C404
16V
1u
C403
+12V
50V
10n
C419
1k5
R424
AO4842
IC401
1 S2
3 S1 6D1_2
8D2_2
2 G2
4 G1
7D2_1
5D1_1
+5V_FB
1R5
R412
CSSD
+5V_FB
50V
2n2
C408
16V
10u
C407
FIXED_COIL_TOROID_33u_3A_16x12
L401
1R
R414
+12V
CSSD
16V
10u
C406
50V 100n
C400
+12V
56R
R410
10k
R418
16V
10u
C432
CSSD
50V
100p
C428
33R
R406
100k
R429
50V
100n
C427
5k6
R407
50R_100MHZ_3A
L402
47k
R222
1N4148_SOD123
D213
10k
R208
1k8
R248
2k4
R246
47k
R201
10k
R223
24V_2_2
50V
100n
C203
1N4148_SOD123
D221
+12V
HO
VCC_AUDIO
1k
R216
BL_ON/OFF_1
TR200
10
2
9
7
6
1
3
84
5
11
12
10k
R235
1N4148_SOD123
D214
50V
330p
C229
6k8
R260
SW_OFF
10R
R204
12V_2_1
+24V_BO
FQPFN50C
Q201
BC848B
Q210
6k8
R243
3k3
R200
100R R262
10R
R205
+12V_1
1k5
R221
0R47
R230
10k
R214
BC848B
Q209
50V
560p
C228
33R
R241
50V
47n
C226
50R_100MHZ_3A
L205
C22V_SOD123
D207
10k
R207
24V_2_1
1N4148_SOD123
D227
50V
22n
C211
SW_SWITCH
10k
R239
10k
R220
A/D_DIM_SEL
50V
2n2
C207
12V_2_1
2k4
R242
100k
R263
10k
R233
S201
+24V_BO
BC848B
Q211
+12V_1
+400V
1k8
R202
1N4148_SOD123
D220
50V
330p
C231
10k
R228
1k5
R268
35V
1000u
C218
TCET110GIC201
1
2
3
4
+24V
33R
R211
+12V
6k8
R210
ST_BY2
VCC1
BC848B
Q215
30k
R218
470R
R232
4k7
R217
50V
100n
C230
1N4148_SOD123
D208
50V
1n
C206
3k3
R247
1k
R253
+12V_BO
ST_BY
BC858B Q205
BC848B
Q200
TL431SAMF2
D200
50V 100n
C201
BAV99
D205
10k
R256
+5VSTBY
1k8
R266
TCET110G
IC200
1
2
3
4
1k
R213
1kV
1n
C215
330R_100MHZ_3A
L206
+5V
6k8
R259
50V
100n
C232
LO
S200
47R R215
6k8
R258
Freq
1N4937
D219
HO
BSH103
Q212
ON_OFF
A/D_DIM_SEL
50V
100n
C216
5k1
R212
35V
1000u
C210
+4V25_STBY
50V
100n
C205
1kV
1n
C220
+24V
50V
2n2
C217
FAN7621
IC202
1HVCC
3HO
5NC2
7NC310 SG
12 LVCC
14 LO
16 PG
2CTR
4NC1
6CON
8RT
15 NC6
13 NC5
9 CS
11 NC4
+24V
ON_OFF
1N4148_SOD123
D201
C3V9_SOD123
D210
A1K
2
L202
50V
47n
C225
100R
R252
ST_BY
10k
R234
1k
R245
47k
R229
10k
R238
+24V
47k
R203
+4V25_STBY
470R
R267
1k5
R261
100k
R226
VCC1
DIM_PWM_ANALOG
ON_OFF
D203
BL_ON/OFF
2k2
R244
15k
R231
1kV
1n
C200
CS
DIM_PWM_ANALOG
Freq
FQPFN50C
Q202
VCC_3V3_ON
BC858B Q206
1N4148_SOD123
D204
VCC_3V3_ON
S202
+24V
+24V
22k
R227
BAV70
D209
BC848B
Q213
VCC1
CS
10k
R236
1N4148_SOD123
D206
33k
R219
35V
1000u
C208
56k
R224
1kV
1n
C204
100k R255
C6V8_SOD123
D202
A1K
2
BL_ON/OFF
1k8
R257
8k2
R209
10k
R237
LO
+4V25_STBY
50V
330p
C237
10k
R206
+24V
16V
1u
C219
BL_ON/OFF_1
+5V
+12
1k
R254
120R
R240
2k4
R337
16V
1000u
C319
50R_100MHZ_3A
L302
S301
BC848B
Q303
47k
R307
22R
R316
+4V25_STBY
3k3
R310
BC848B
Q300
10k
R333
450V
4u7
C315
2k2
R304
10k
R324
VSTR
22R
R323
10k
R318
10R
R312
680R
R330
10k
R334
+4V25_STBY
4M7
R338
AC1_start
4k7
R300
63V
100n
C306
C12V_SOD123
D303
50V
10n
C321
+5VSTBY
60R_100MHZ_3A
L303
10k
R314
1kV
1n
C314
1kV
1n
C317
TL431SAMF2
D301
S302
BC327
Q302
680R
R331
10V
10u
C313
50V
10n
C320
25V
STPS5L25B
IC303
2
3
4
1
390R
R325
Opto
BC848B
Q301
1k8
R313
VCC1
3k3
R315
10k
R317
1kV
1n
C316
ST_BY
BC848B
Q306
1k
R326
10k
R327
SOT23
Q305
20R
R319
+4V25_STBY_1
PL300
1
2
1k
R336
50V
47n
C310
RS1008
D302
RS1008_SOD123
D300
VSTR
1k
R335
VCC2
47k
R305
50V
100n
C303
VCC1
Opto
BC848B
Q308
VF_MAIN
TCET110GIC300
1
2
3
4
+4V25_STBY
VFSTBY
47k
R306
450V
4u7
C318
+4V25_STBY_1
1u
L300
47k
R328
VFSTBY
10k R308
10k R309
TRF_SMPS_SAFE_42
TR300
1
2
3
4
5
6
7
8
9
10
11
12
ST_BY2
TCET110G
IC302
1
2
3
4
FSDL321
IC301
1GND
3VFB 6DR_1
8DR_3
2VCC
4 IPK
7DR_2
5VSTR
1kV
1n
C311
1N4148_SOD123
D309
SW_SWITCH
RS1008_SOD123
D304
1k
R332
50V
1n
C304
330R_100MHZ_3A
L301
S303
BC848B
Q304
BC858B
Q307
22R
R322
24V_2_1
24V_2_2
12V_2_1
12V_2_2
16V
1000u
C209
+12V_BO
+12V
L201
24V_2_2
24V_2_1
+3V3_FB
50V
2n2
C413
10k
R426
+12V
CSSD_2
16V
10u
C418
10k
R425
FIXED_COIL_TOROID_33u_3A_16x12
L413
1R5
R421
1k5
R427
5k6
R401
25V
1u
C422
+3V3_FB
CSSD_2
CSSD_2
50V
100p
C425
16V
10u
C420
50V
10n
C421
CSSD_2
1N4148_SOD123
D404
VCC_3V3_ON
+12V
AO4842
IC403
1 S2
3 S1 6D1_2
8D2_2
2 G2
4 G1
7D2_1
5D1_1
50V
100n
C426
1u
C430
1R5
R420
33R
R400
50R_100MHZ_3A
L414
1R
R422
25V
1u
C411
NCP1579
IC402
1BST
3GND6 FB
8 PHASE
2TG
4BG
7 COMP/DIS
5 VCC
1k
R403
50V 100n
C412
16V
10u
C416
+12V
100k
R428
22R
R419
AC1
D25XB60
D100
630V
10n
C137
275V
220nF
C105
630V
10n
C135
630V
10n
C141
50R_100MHZ_3A
L304
50R_100MHZ_3A
L305
2k2
R340
VF_MAIN
F100
FUSE_RADIAL
50V
33p C117
630V
10n
C143
VCC1
250V
12n
C309
VF_MAIN
70R
FR102
70R
FR101
TR100
1234
5
6
50R_100MHZ_3A
L415
50R_100MHZ_3A
L416
+5V
BYD33D
D308
16V
10u
C307
RL100
1
23
4
TCET110G
IC101
1
2
3
4 10k
R145
+12V
VCC1
BC858B
Q101
330R
R142
330R
R143
S103
TH102
TH103
TH104
TH105
PL306
1
2
3
4
5
6
7
8
9
10
11
12
VCC2
S117
S116
RELAY_SAFE_LKF1AM_12V_1_5
RL102
1
23
4
GND_CAP_14kV
2n2
C151
PL305
1
2
3
4
5
6
20R
R329
VCC1
16V
10u
C312
10u
C301
16V
50V
47u
C213
50V
47u
C300
50V
47u
C302
50V
47u
C308
50V
47u
C325
50V
47u
C202
15k
R430
15k
R431
275V
47n
C152
630V
15n
C214
450V
1u
C122
450V
1u
C102
450V
47u
C101
450V
47u
C103
450V
47u
C106
PL205
12
34
56
78
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
+24V
S113
2k2
R163
1N4148_SOD123
D150
1N4148_SOD123
D119
1N4148_SOD123
D237
1N4148_SOD123
D250
1N4148_SOD123
D238
C6V8_SOD123
D107
A
1
K
2
GNDCAP
RS1008_SOD123
D121
RS1008_SOD123
D103
RS1008_SOD123
D117
CAP002DG
IC103
1NC1
2D1_1
3D1_2
4NC25 NC3
6 D2_2
7 D2_1
8 NC4
1kV
1n
C127
1kV
1n
C126
1kV
1n
C128
MD103
S304
1u
C153
25V
1u
C154
25V
1u
C155
25V
1u
C156
25V
47k
R147
47k
R148
PZT2907
Q309
FQT1N60C
Q102
RL207
D106
4kV
2n2
C134
S102
1N5819
D233
24V_2_1
35V
1000u
C221
1N5819
D234
12V_2_2
16V
1000u
C240
1N5819
D231
1N5819
D215
VCC_AUDIO
1N5819
D228
1N5819
D232
1N5819
D235
16V
1000u
C241
1N5819
D225
24V_2_2
12V_2_1
S225
S226
A/D_DIM_SEL
56k
R137
27k
R136
12k
R112
HS100 HS200
MD102
MD200
GNDCAP1
S230
VCC_AUDIO
GBU4M
D105
RECT_AC
RECT_AC
L1L2
L1L2
16V
10u
C434
16V
10u
C433
16V
10u
C405
16V
10u
C431
16V
1000u
C224
HS201
S207
S204 S203
S208
50R_100MHZ_3A
FR401
50R_100MHZ_3A
FR402
50R_100MHZ_3A
FR400
50R_100MHZ_3A
FR405
+24V_1
+24V_1
150u L306
GNDCAP
1N4148_SOD123
D239
4kV
2n2
C121
70R
FR403
70R
FR404
1kV
1n
C125
GND_CAP_1
MD101
S100
S229
S228
4kV
2n2
C118
S120
F101
FUSE_RADIAL
S121
AC_LINE AC_NOTR
AC4
VCC_ST
BY
VCC_STBY
4kV
2n2
C113
S123
VCC_STBYAC1
AC1AC2
AC2
4kV
2n2
C109
S197
4kV
2n2
C110
AC5
AC5
AC6
AC6
AC6AC5
RECT_AC
RECT_AC
CS1
ZCD
WITHDRAWAL1
WITHDRAWAL2
WITHDRAWAL1WITHDRAWAL2
VCC_STBY
4kV
2n2
C194
GNDCAP
4kV
2n2
C181
4kV
2n2
C191
S181
S191
16V
1u
C114
FAN7529
IC100
1 INV
3MOT 6GND
8VCC
2COMP
4 CS
7OUT
5ZCD
4V2_BIAS
4V2_BIAS
4V2
4V2
DRAIN
DRAIN
VCC1
CTR
CTR
CTR
RES_CAP
RES_CAP
ON_OFF
Freq
R123
R115
12V_2_2
16V
1000u
C212
+12V_BO
+12V_BO
12V_2_1
12V_2_2
UF5402
D224
UF5402
D223
+24V_BO
+24V_BO
24V_2_1
24V_2_2
UF5402
D229
UF5402
D226
+24V_BO
1N4148_SOD123
D216
1N4148_SOD123
D211
R124
630V
10n
C115
AC2VCC_STBY
FUSE_SMD_7A/32VDC_1206
F200
1N5819
D240
1N5819
D241
1N5819
D242
1N5819
D243
+12V_BO
12V_2_1
12V_2_2
GNDCAP
S128
AC3
AC_NOTR
AC3
S194
275V
47n
C144
+12
+12V +24V_1
S255
S104
10V
470u
C323
10V
470u
C401
16V
1000u
C402
AC_LINE
VCC_STBY
AC_LINE
AC4
AC_LINE
50V
47u
C322
50V
47u
C417
12V
D305
6k8
R225
R149
R150
22n
C326
UF5402
D244
UF5402
D245
+24V_BO
24V_2_2
24V_2_1
RL207
D123
RL207
D124
RL207
D122
RL207
D120
RECT_AC
L2
L1
1kV
470p
C139
STPS20H100CFP
D212
STPS20H100CFP
D222
STPS20H100CFP
D218
STPS20H100CFP
D236
STPS20H100CFP
D217
S227
10k
R301
2k4
R311
D246
S205
2kV
1n
C111
S101
100k
R320
68k
R144
68k
R146
S300
2kV
1n
C108
10u
C233
RL207
D112
AC2_start
AC2_start
50V
100n
C223
50V
100n
C222
1k
R249
1N4148_SOD123
D230
OPTO_RES
OPTO_RES
17PW07-2
HALF-BRIDGE RESONANT MODE POWER S
U
32" - 42" SLIM LED TV
90-270 OPTION
POWER GROUND
SIGNAL GROUND
D217-D218-D236-D212-D222
HEATSINK
HEATSINK Q201-Q202HEATSINK Q100-Q122-D100
SAFETY & EMC OPTIONS
42 INCH DIODE OPTIONS
100
LC-32LE340/343 LC-40LE340/343
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