SGS Thomson Microelectronics VNW100N04 Datasheet

VNW100N04
”OMNIFET”:
FULLY AUTOPROTECTED POWER MOSFET
PRELIMINARY DATA
November 1997
BLOCK DIAGRAM
TYPE V
R
DS(on)
I
lim
VNW10 0N0 4 42 V 0.012 100 A
LINEARCURRENTLIMITATION
THERMAL SHUT DOWN
SHORTCIRCUIT PROTECTION
INTEGRATEDCLAMP
LOW CURRENT DRAWN FROM INPUTPIN
DIAGNOSTICFEEDBACKTHROUGHINPUT
PIN
ESD PROTECTION
DIRECTACCESS TO THE GATE OF THE
POWERMOSFET(ANALOGDRIVING)
COMPATIBLEWITH STANDARD POWER
MOSFET
STANDARDTO-247 PACKAGE
DESCRIPTION
The VNW100N04 is a monolithic device made using SGS-THOMSON Vertical Intelligent Power M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear
current limitation and overvoltage clamp protect the chip in harsh enviroments.
Faultfeedback can be detected by monitoring the voltageat the input pin.
1
2
3
TO-247
1/11
ABSOLUTEMAXIMUMRATING
Symbol Parameter Value Unit
V
DS
Drain-source Voltage (Vin= 0 ) Int er nall y Clamped V
V
in
Input V ol ta ge 18 V
I
D
Drain Current Internally Limited A
I
R
Reverse DC Output Cur rent -100 A
V
esd
Elect r o st at ic Discharge (C= 100 pF , R=1. 5 K) 2000 V
P
tot
Tot al Dis s ipation at Tc=25oC 208 W
T
j
Oper at i ng J un c t ion T em perature Internally Limit ed
o
C
T
c
Case Operating Temperature Internally Limited
o
C
T
stg
St orage Temperatur e -55 to 150
o
C
THERMAL DATA
R
thj-case
R
thj- amb
Ther mal Resistan ce Junction-cas e Max Ther mal Resistan ce Junction-ambien t Max
0.6 30
o
C/W
o
C/W
ELECTRICAL CHARACTERISTICS (T
case
=25oC unlessotherwise specified)
OFF
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
CLAMP
Drain-source Clamp Volt age
ID=50A Vin= 0 36 42 48 V
V
CLTH
Drain-source Clamp Thr eshold Vol ta ge
ID=2mA Vin=0 35 V
V
INCL
Input-Source Reverse Clamp Volt age
Iin=-1mA -1 -0.3 V
I
DSS
Zer o Inpu t V oltage Drain Current (V
in
=0)
V
DS
=13V Vin=0
V
DS
=25V Vin=0
50
200
µA µA
I
ISS
Supply Current f rom Input Pin
VDS=0V Vin= 10 V 250 500 µA
ON ()
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
IN(th)
Input T hreshold Volt age
VDS=VinID+Iin=1mA 0.8 3 V
R
DS(on)
St at ic D rain- s our ce On Resistance
Vin=10V ID=50A V
in
=5V ID=50A
0.012
0.015ΩΩ
DYNAMIC
Symbol Parameter Test Condition s Min. Typ. Max. Unit
g
fs
()Forward
Tr ansc on ductance
VDS=13V ID=50A 40 60 S
C
oss
Out put Capacit anc e VDS=13V f=1MHz Vin= 0 2000 3000 pF
VNW100N04
2/11
ELECTRICAL CHARACTERISTICS (continued) SWITCHING(∗∗)
Symbol Parameter Test Condition s Min. Typ. Max. Unit
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time Rise T ime Turn-off Delay Time Fall T ime
VDD=15V Id=50A V
gen
=10V R
gen
=10
(see figure 3)
110 500
1000
600
250
900 1800 1000
ns ns ns ns
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time Rise T ime Turn-off Delay Time Fall T ime
VDD=15V Id=50A V
gen
=10V R
gen
= 1000
(see figure 3)
2.2
3.5 22 12
3.5 6
30 18
µs µs µs µs
(di/dt)
on
Tur n-on Current Slope VDD=15V ID=50A
V
in
=10V R
gen
=10
55 A/µs
Q
i
Total Input Charge VDD=15V ID=50A Vin= 10 V 190 nC
SOURCE DRAIN DIODE
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
SD
()ForwardOnVoltage ISD=50A Vin=0 1.6 V
t
rr
(∗∗)
Q
rr
(∗∗)
I
RRM
(∗∗)
Reverse Recov ery Time Reverse Recov ery Charge Reverse Recov ery Current
I
SD
= 50 A di/dt = 10 0 A/µs
V
DD
=30V Tj=25oC
(see test circuit, figure 5)
800
5
15
ns
µC
A
PROTECTION
Symbol Parameter Test Condition s Min. Typ. Max. Unit
I
lim
Drain Cur rent Limit Vin=10V VDS=13V
V
in
=5V VDS=13V
70 70
100 100
140 140
A A
t
dlim
(∗∗) Step Res pon se
Current Lim it
Vin=10V V
in
=5V
50
13080200
µs µs
T
jsh
(∗∗) Overtemperatu r e
Shut dow n
170
o
C
T
jrs
(∗∗) Overtemperatu r e Reset 155
o
C
I
gf
(∗∗) Fault Sink Current Vin=10V VDS=13V
V
in
=5V VDS=13V
50 20
mA mA
E
as
(∗∗) S i ngle Pulse
Avalanche E ner gy
starting Tj=25oCVDD=20V V
in
=10V R
gen
=1KΩ L=10mH
4J
() Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (∗∗) Parameters guaranteed by design/characterization
VNW100N04
3/11
During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (I
iss
) flows into the Input pin in order to
supplythe internalcircuitry. The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 42V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductiveloads.
- LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperaturethreshold T
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing the chip temperatureand are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperaturecutout occurs at minimum 170
o
C. The device is automatically restarted when the chip temperature falls below155
o
C.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (witha small increase in R
DS(on)
).
PROTECTION FEATURES
VNW100N04
4/11
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