SGS Thomson Microelectronics VND7N04-1, VND7N04, VNP7N04FI, VNK7N04FM Datasheet

VND7N04/VND7N04-1



FULLY AUTOPROTECTED POWER MOSFET

TYPE V

VND7N04
VND7N04-1
VNP7N04FI
VNK7N04FM

■ LINEAR CURRENT LIMITATION

■ THERMALSHUTDOWN

■ SHORTCIRCUIT PROTECTION

■ INTEGRATEDCLAMP

■ LOW CURRENTDRAWN FROM INPUTPIN

■ DIAGNOSTICFEEDBACK THROUGH INPUT

clamp

42 V
42 V
42 V
42 V

PIN

■ ESD PROTECTION

■ DIRECT ACCESS TO THE GATE OF THE

POWERMOSFET(ANALOGDRIVING)

■ COMPATIBLEWITH STANDARD POWER

MOSFET

DESCRIPTION

The VND7N04, VND7N04-1, VNP7N04FI and
VNK7N04FM are monolithic devices made using
STMicroeletronics VIPower M0 Technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications.Built-in
thermal shut-down, linear current limitation and
overvoltage clamp protect the chip in harsh

BLOCK DIAGRAM

R

DS(on)

0.14 Ω

0.14 Ω

0.14 Ω

0.14 Ω

I

lim

7A
7A
7A
7A

VNP7N04FI/K7N04FM

”OMNIFET”:

3

1

DPAK

TO-252

ISOWATT220

3

2

1

IPAK

TO-251

SOT82-FM

enviroments.
Faultfeedback can be detectedby monitoringthe

voltageat theinput pin.

3

2

1

February 2000

1/14

VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM

ABSOLUTEMAXIMUMRATING

Symbol Parameter Value Unit

V

V

Drain-source Voltage (Vin= 0) Internally Clam ped V

DS

V

Input Voltage 18 V

in

I

Drain Current Inte r nally Limited A

D

I

Reverse DC Output Current -7 A

R

Elect r os t at ic Discha rge (C= 100 pF,

esd

R=1. 5 KΩ)

P

T

Tot al Dis sipa t ion at Tc=25oC60249W

tot

T

Oper at ing Junction Tem perature Inte r nally Limited

j

T

Case Operating Temperature Internally Limited

c

Sto rage Tem perat ure -55 to 150

stg

THERMAL DATA

R

thj-case

R

thj-amb

Ther mal Resistance Juncti on- case
Max 3.75 5.2 14

Ther mal Resistance Juncti on- amb ient
Max 100 62.5 100

DPAK

IPAK

DPAK/IPAK ISOWAT T220 SOT82-FM

ISOWATT220 SOT -82FM

2000 V

o

C/W

o

C/W

o

C

o

C

o

C

ELECTRICAL CHARACTERISTICS (-40 < Tj< 125oC unlessotherwisespecified)
OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

CLAMP

Drain-source Clamp

ID= 200 mA Vin= 0 32 42 52 V

Volt age

V

CLTH

Drain-source Clamp

ID=2mA Vin=0 31 V

Thr eshold Vol ta ge

V

INCL

Input-Source Reverse

Iin= -1 mA -1.1 -0.25 V

Clamp Voltage

I

DSS

I

ISS

Zer o I npu t V olt age
Drain Current (V

in

Supply Current from

V

=13V Vin=0

=0)

DS

=25V Vin=0

V

DS

VDS=0V Vin= 10 V 250 550 µA

75

200

Input Pin

ON (∗)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

R

DS(on)

IN(th)

Input Thres hold
Volt age

St at ic Drain-sour ce On
Resistance

VDS=VinID+Iin=1mA 0.8 3 V

Vin=10V ID=3.5A

=5V ID=3.5A

V

in

-40 < T
V
V
T

<25oC

j

=10V ID=3.5A

in

=5V ID=3.5A

in

= 125oC

j

0.14

0.28

0.28

0.56

µA
µA

Ω
Ω

Ω
Ω

2/14

VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM

ELECTRICAL CHARACTERISTICS (continued)

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

g

(∗)Forward

fs

Tr ansc on ductance

C

Out put Capacit anc e VDS=13V f=1MHz Vin= 0 250 500 pF

oss

SWITCHING(**)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

t

d(on)

t

d(off)

(di/dt)

Q

Turn-on Delay Time

t

Rise Time

r

Turn-off Delay T ime

t

Fall T ime

f

Turn-on Delay Time

t

Rise Time

r

Turn-off Delay T ime

t

Fall T ime

f

Tur n-on Current Slope VDD=15V ID=3.5A

on

Total Input Charge VDD=12V ID=3.5A Vin= 10 V 18 nC

i

VDS=13V ID=3.5A 2 5 S

VDD=15V Id=3.5A

=10V R

V

gen

gen

=10Ω

(see figure 3)

VDD=15V Id=3.5A

=10V R

V

gen

= 1000 Ω

gen

(see figure 3)

50
60

130

50

140

0.4

2.5

150
180
300
200

500

1.1
7

1

4

50 A/µs

=10V R

V

in

gen

=10Ω

ns
ns
ns
ns

ns

µs
µs
µs

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(∗)ForwardOnVoltage ISD=3.5A Vin=0 1.7 V

SD

t

rr

Reverse Re covery

(∗∗)

Time
Reverse Re covery

(∗∗)

Q

rr

I

=3.5A di/dt=100A/µs

SD

=30V Tj=25oC

V

DD

(see test circuit, figure 5)

40

0.2

Charge

(∗∗)

I

RRM

Reverse Re covery

3.6

Current

PROTECTION

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

dlim

T

jsh

I

lim

Drain Current Limit Vin=10V VDS=13V

=5V VDS=13V

V

in

(∗∗) St ep Response

Current Lim it

Vin=10V

=5V

V

in

(∗∗) Overtem per at u r e

Shut dow n

(∗∗) O vertemperatu re Reset 135

T

jrs

I

(∗∗) Fault Sink Current Vin=10V VDS=13V

gf

E

(∗∗) Single Pulse

as

Avalanche Energy

(∗) Pulsed: Pulse duration = 300 µs, duty cycle1.5 %
(∗∗) Parametersguaranteed by design/characterization

=5V VDS=13V

V

in

starting Tj=25oCVDD=20V

=10V R

V

in

=1KΩ L=30mH

gen

4
4

13
15

7
7

11
11

20
25

150

50
20

0.4 J

ns

µC

A

A
A

µs
µs

o

C

o

C

mA
mA

3/14

VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM

PROTECTION FEATURES

During normal operation, the Input pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC to 50 KHz. The only difference
from the user’s standpoint is that a small DC
current (I

) flows into the Input pin in order to

iss

supplythe internalcircuitry.
The device integrates:

- OVERVOLTAGE CLAMP PROTECTION:

internally set at 42V, along with the rugged
avalanche characteristics of the Power
MOSFET stage give this device unrivalled
ruggedness and energy handling capability.
This feature is mainly important when driving
inductiveloads.

- LINEAR CURRENT LIMITER CIRCUIT: limits

the drain current Id to Ilim whatever the Input
pin voltage. When the current limiter is active,
the device operates in the linear region, so
power dissipation may exceed the capabilityof
the heatsink. Both case and junction
temperatures increase, and if this phase lasts
long enough, junction temperature may reach
the overtemperaturethresholdT

jsh

.

- OVERTEMPERATURE AND SHORT CIRCUIT

PROTECTION: these are based on sensing
the chip temperatureand are not dependent on
the input voltage. The location of the sensing
element on the chip in the power stage area
ensures fast, accurate detection of the junction
temperature. Overtemperaturecutout occurs at
minimum 150
restarted when the chip temperature falls
below135

o

C. The device is automatically

o

C.

- STATUS FEEDBACK: In the case of an

overtemperature fault condition, a Status
Feedback is provided through the Input pin.
The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the
voltage at the Input pin, which will be close to
ground potential.

Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit (with a small increase in R

DS(on)

).

4/14

VND7N04/VND7N04-1/VNP7N04FI/VNK7N04FM

Thermal ImpedanceFor DPAK / IPAK

Derating Curve

ThermalImpedanceFor ISOWATT220

OutputCharacteristics

Transconductance

StaticDrain-SourceOnResistancevs Input
Voltage

5/14