SGS Thomson Microelectronics VNV49N04, VNP49N04FI, VNB49N04 Datasheet

VNP49N04FI



FULLY AUTOPROTECTED POWER MOSFET

TYPE V

VNP49N04FI
VNB49N04
VNV49N04

n LINEAR CURRENT LIMITATION
n THERMAL SHUT DOWN
n SHORT CIRCUIT PROTECTION
n INTEGRATED CLAMP
n LOW CURRENT DRAWN FROM INPUT PIN
n DIAGNOSTIC FEEDBACK THROUGH INPUT

CLAMP

42 V 20 mΩ 49 A

PIN

n ESD PROTECTION
n DIRECT ACCESS TO THE GATE OF THE

POWER MOSFET (ANALOG DRIVING)

n COMPATIBLE WITH STANDARD POWER

MOSFET

DESCRIPTION

The VNP49N04FI, VNB49N04, VNV49N04 are
monolithic devices designed in
STMicroelectronics VIPower M0 Technology,
intended for replacement of standard Power

R

DS(ON)

I

LIM

/ VNB49N04 / VNV49N04

“OMNIFET”:

ISOWATT220

3

2

1

3

1

TO-263 (D2PAK)

ORDER CODES:

ISOWATT220 VNP49N04FI
PowerSO-10
TO-263 (D2PAK) VNB49N04

TM

MOSFETS from DC up to 50KHz applications.
Built-in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.

10

PowerSO-10

VNV49N04

1

TM

BLOCK DIAGRAM

DRAIN

Overvoltage

Clamp

INPUT

October 1999 1/14

Gate

Control

Linear

Current

Limiter

Over

Temperature

Status

SOURCE

1

VNP49N04FI / VNB49N04 / VNV49N04

ABSOLUTE MAXIMUM RATING

Symbol Parameter

V

DS

V

IN

I

D

I

R

V

ESD

P

tot

T

T

T

stg

CONNECTION DIAGRAM (TOP VIEW)

Drain-source Voltage (VIN=0V) Internally Clamped V
Input Voltage 18 V
Drain Current Internally Limited A
Reverse DC Output Current -50 A
Electrostatic Discharge (R=1.5KΩ, C=100pF) 2000 V
Total Dissipation at Tc=25°C 125 125 40 W
Operating Junction Temperature Internally limited °C

j

Case Operating Temperature Internally limited °C

c

Storage Temperature -55 to 150 °C

PowerSO-10

Value

TM

D2PAK ISOWATT220

Unit

INPUT
INPUT
INPUT
INPUT
INPUT

6
7
8
9

10

DRAIN

PowerSO-10

5
4
3

2
1

11

TM

SOURCE
SOURCE
N.C.
SOURCE
SOURCE

SOURCE

3

DRAIN

2
1

INPUT

D2PAK

3
2

1

SOUR CE
DRAIN
INPUT

ISOWATT220

2/14

1

VNP49N04FI / VNB49N04 / VNV49N04

THERMAL DATA

Symbol Parameter

R

thj-case

R

thj-amb

Thermal Resistance Junction-case}}} MAX 1 1 3.12 °C/W
Thermal Resistance Junction-ambient MAX 50 62.5 62.5 °C/W

PowerSO-10 D2PAK ISOWATT220

ELECTRICAL CHARACTERISTICS (-40°C<Tj< 125°C, unless otherwise specified)

OFF

Symbol Parameter Test Conditions Min Typ Max Unit

V

CLAMP

V

CLTH

V

INCL

I

DSS

I

ISS

Drain-source Clamp
Voltage
Drain-source Clamp

Threshold Voltage
Input-Source Reverse

Clamp Voltage
Zero Input Voltage Drain

Current (V

IN

=0V)

Supply Current fromInput
Pin

=200 mA; VIN=0 34 42 50 V

I

D

=2mA; VIN=0 33 V

I

D

= -1mA -1.2 -0.1 V

I

IN

=13V; VIN=0V

V

DS

=25V; VIN=0V

V

DS

=0V; VIN=10V 250 550 µA

V

DS

ON (*)

Symbol Parameter Test Conditions Min Typ Max Unit

V

R

DS(on)

IN(th)

Input Threshold Voltage VDS=V

=10V; ID=25A

Static Drain-source On
Resistance

V

IN

=5V; ID=25A

V

IN

IN;ID+IIN

=1mA 0.8 3 V

Value

70

220

0.04

0.05

Unit

µA
µA

Ω
Ω

DYNAMIC

Symbol Parameter Test Conditions Min Typ Max Unit

g

fs

C

OSS

Forward

(*)

Transconductance

=13V; ID=25A; T

V

DS

Output Capacitance VDS=13V; f=1MHz; VIN=0V; T

=25°C 25 30 S

c

=25°C 1100 1500 pF

c

SWITCHING (**)

Symbol Parameter Test Conditions Min Typ Max Unit

t

d(on)

t

t

d(off)

t

t

d(on)

t

t

d(off)

t

(di/dt)

Q

Turn-on Delay Time
Rise Time 1300 3600 ns

r

Turn-off Delay Time 800 2400 ns
Fall Time 300 900 ns

f

Turn-on Delay Time
Rise Time 3.8 10.4 µs

r

Turn-off Delay Time 12 24 µs
Fall Time 6.1 17 µs

f

Turn-on Current Slope

on

Total Input Charge VDS=15V; ID=25A; VIN=10V 100 nC

i

=15V; ID=25A

V

DS

=10V; R

V

gen

(see figure 3)

=15V; ID=25A

V

DS

=10V; R

V

gen

(see figure 3)

=15V; ID=25A

V

DS

=10V; R

V

IN

gen

gen

gen

=10 Ω

=1000Ω

=10 Ω

200 600 ns

1.3 3.8 µs

25 A/µs

3/14

1

VNP49N04FI / VNB49N04 / VNV49N04

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min Typ Max Unit

V

(*) Forward On Voltage ISD=25A; VIN=0V 1.8 V

SD

t

(**) Reverse Recovery Time ISD=25A; di/dt=100A/µs

rr

Q

(**) Reverse Recovery Charge 910 nC

rr

(**) Reverse Recovery Current 7.5 A

I

RRM

=30V; Tj=25°C

V

DS

(see test circuit, figure 5)

PROTECTIONS

Symbol Parameter Test Conditions Min Typ Max Unit

=10V; VDS=13V

V

I

LIM

t

dlim

T

jsh

T

jrs

(**) Fault Sink Current

I

gf

E

as

(*) Pulsed: Pulse duration = 300µs, duty cycle 1.5%
(**) Parameters guaranteed by design/characterization

Drain Current Limit
Step Response Current

(**)

Limit
Overtemperature

(**)

Shutdown

(**) Overtemperature Reset 135 °C

Single Pulse

(**)

Avalanche Energy

IN

=5V; VDS=13V

V

IN

=10V

V

IN

=5V

V

IN

=10V; VDS=13V

V

IN

=5V; VDS=13V

V

IN

Starting T
V

IN

=25°C; VDS=20V

j

=10V; R

=1KΩ; L=6mH

gen

28
28

150 °C

4J

250 ns

49
49
35
90

70
70
50

150

50
20

A
A

µs
µs

mA
mA

4/14

2

PROTECTION FEATURES

During normal operation, the INPUT pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC up to 50KHz. The only difference
from the user’s standpoint is that a small DC
current (I
supply the internal circuitry.

) flows into the INPUT pin in order to

ISS

The device integrates:

- OVERVOLTAGE CLAMP PROTECTION:
internally set at 42V, along with the rugged

avalanche characteristics of the Power MOSFET
stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly
important when driving inductive loads.

- LINEAR CURRENT LIMITER CIRCUIT:
limits the drain current IDto I

INPUT pin voltage. When the current limiter is

whatever the

LIM

active, the device operates in the linear region, so
power dissipation may exceed the capability ofthe
heatsink. Both case and junction temperatures
increase, and if this phase lasts long enough,

VNP49N04FI / VNB49N04 / VNV49N04

junction temperature may reach the
overtemperature threshold T

- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION:

these are based on sensing the chip temperature
and are not dependent on the input voltage. The
location of the sensing element on the chip in the
power stage areaensures fast, accuratedetection
of the junction temperature. Overtemperature
cutout occurs at minimum 150°C. The device is
automatically restarted when the chiptemperature
falls below 135°C.

- STATUS FEEDBACK:
in the caseof an overtemperaturefaultcondition, a

status feedback is provided through the INPUT
pin. The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100
failure can be detected by monitoring the voltage
at the INPUT pin, which will be close to ground
potential. Additional features of this device are
ESD protection according to the Human Body
model and the ability to be drivenfrom a TTL Logic
circuit (with a small increase in R

jsh

.

DS(ON)

Ω.

The

).

5/14

1