SGS Thomson Microelectronics VNV14N04, VNK14N04FM, VNP14N04FI, VNB14N04 Datasheet

VNB14N04/K14N04FM
FULLY AUTOPROTECTED POWER MOSFET
TYPE V
VNB14N04 VNK14N04FM VNP14N04FI VNV14N04
LINEAR CURRENT LIMITATION
THERMALSHUTDOWN
SHORTCIRCUIT PROTECTION
INTEGRATEDCLAMP
LOW CURRENT DRAWN FROM INPUT PIN
DIAGNOSTICFEEDBACK THROUGH INPUT
clamp
42 V 42 V 42 V 42 V
PIN
ESD PROTECTION
DIRECT ACCESS TO THE GATE OF THE
POWERMOSFET(ANALOGDRIVING)
COMPATIBLEWITHSTANDARD POWER
MOSFET
DESCRIPTION
The VNB14N04, VNK14N04FM, VNP14N04FI and VNV14N04 are monolithic devices made using STMicroelectronics VIPower M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear current limitation and overvoltage clamp protect
BLOCK DIAGRAM ()
DS(on)
0.07
0.07
0.07
0.07
I
lim
14 A 14 A 14 A 14 A
VNP14N04FI/VNV14N04
”OMNIFET”:
3
1
D2PAK TO-263
2
1
ISOWATT220
the chip in harsh enviroments. Faultfeedback can be detected by monitoringthe
voltageat the input pin.
3
SOT82-FM
10
1
PowerSO-10
() PowerSO-10 PinConfiguration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB
June 1998
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VNB14N04-VNK14N04FM-VNP14N04FI-VNV14N04
ABSOLUTEMAXIMUMRATING
Symbol Parameter Value Unit
V
V
Drain-source Voltage (Vin= 0 ) Internally Clamped V
DS
V
Input Voltage 18 V
in
I
Drain Current Inte r nally Limited A
D
I
Reverse DC Output Current -14 A
R
Elect r os t at ic Discha rge (C= 100 pF,
esd
R=1. 5 K)
P
T
Tot al Dis sipa t ion at Tc=25oC509.531W
tot
T
Oper at ing Junction Tem perature Inte r nally Limited
j
T
Case Operating Temperature Internally Limited
c
Sto rage Tem perat ure -55 to 150
stg
THERMAL DATA
R
thj-case
R
thj-amb
Ther mal Resistan ce Junct ion-case Max 4 2.5 13 2.5
Ther mal Resistan ce Junct ion-ambient Max 62.5 50 100 62.5
PowerSO -10
D2PAK
ISOWATT220 Po werSO-10 SOT82-FM D 2PAK
SOT-82FM ISOWATT220
2000 V
o
C/W
o
C/W
o
C
o
C
o
C
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwise specified)
case
OFF
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
V
CLAMP
Drain-source Clamp
ID= 200 mA Vin= 0 36 42 48 V
Volt age
V
CLTH
Drain-source Clamp
ID=2mA Vin=0 35 V
Thr eshold Vol ta ge
V
INCL
Input-Source Reverse
Iin=-1mA -1 -0.3 V
Clamp Voltage
I
DSS
I
ISS
Zer o I npu t V olt age Drain Current (V
in
Supply Current from
V
=13V Vin=0
=0)
DS
=25V Vin=0
V
DS
VDS=0V Vin= 10 V 250 500 µA
50
200
Input Pin
ON ()
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
V
R
DS(on)
IN(th)
Input Thres hold Volt age
St at ic Drain-sour ce On Resistance
VDS=VinID+Iin=1mA 0.8 3 V
Vin=10V ID=7A
=5V ID=7A
V
in
0.07
0.1
µA µA
Ω Ω
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VNB14N04-VNK14N04FM-VNP14N04FI-VNV14N04
ELECTRICAL CHARACTERISTICS (continued)
DYNAMIC
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
g
()Forward
fs
Tr ansc on ductance
C
Out put Capacit anc e VDS=13V f=1MHz Vin= 0 400 5 00 pF
oss
SWITCHING(**)
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
t
d(on)
t
d(off)
t
d(on)
t
d(off)
(di/dt)
Q
Turn-on Delay Time
t
Rise Time
r
Turn-off Delay T ime
t
Fall T ime
f
Turn-on Delay Time
t
Rise Time
r
Turn-off Delay T ime
t
Fall T ime
f
Tur n-on Current Slope VDD=15V ID=7A
on
Total Input Charge VDD=12V ID=7A Vin= 10 V 30 nC
i
VDS=13V ID=7A 8 10 S
VDD=15V Id=7A
=10V R
V
gen
gen
=10
(see figure 3)
VDD=15V Id=7A
=10V R
V
gen
= 1000
gen
(see figure 3)
60 160 250 100
300
1.5
5.5
1.8
120 300 400 200
500
2.2
7.5
2.5
120 A / µ s
=10V R
V
in
gen
=10
ns ns ns ns
ns
µs µs µs
SOURCE DRAIN DIODE
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
V
()ForwardOnVoltage ISD=7A Vin=0 1.6 V
SD
t
rr
Reverse Re covery
(∗∗)
Time Reverse Re covery
(∗∗)
Q
rr
I
= 7 A di/dt = 100 A/µs
SD
=30V Tj=25oC
V
DD
(see test cir cuit, figure 5)
110
0.34
Charge
(∗∗)
I
RRM
Reverse Re covery
6.1
Current
PROTECTION
Symbol Parameter Test Cond itions Min. Typ. Max. Unit
t
dlim
T
jsh
I
lim
Drain Current Limit Vin=10V VDS=13V
=5V VDS=13V
V
in
(∗∗) St ep Response
Current Lim it
Vin=10V
=5V
V
in
(∗∗) Overtemperatu re
Shut dow n
(∗∗) Overtemperatu re Reset 135
T
jrs
I
(∗∗) Fault Sink Current Vin=10V VDS=13V
gf
E
(∗∗) S i ngle Pulse
as
Avalanche Energy
() Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (∗∗) Parameters guaranteed by design/characterization
=5V VDS=13V
V
in
starting Tj=25oCVDD=20V
=10V R
V
in
=1KΩ L=10mH
gen
10 10
14
14
30
80
20 20
60
150
150
50
20
0.65 J
ns
µC
A
A A
µs µs
o
C
o
C
mA mA
3/14
VNB14N04-VNK14N04FM-VNP14N04FI-VNV14N04
PROTECTION FEATURES
During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (I
) flows into the Input pin in order to
iss
supplythe internalcircuitry. The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 42V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductiveloads.
- LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capabilityof the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperaturethreshold T
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing the chip temperatureand are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperaturecutout occurs at minimum 150 restarted when the chip temperature falls below135
o
C. The device is automatically
o
C.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in R
DS(on)
).
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VNB14N04-VNK14N04FM-VNP14N04FI-VNV14N04
Thermal ImpedanceFor ISOWATT220
Derating Curve
ThermalImpedanceFor D2PAK / PowerSO-10
OutputCharacteristics
Transconductance
StaticDrain-SourceOnResistancevs Input Voltage
5/14
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