SGS Thomson Microelectronics VNP10N07 Datasheet

VNP10N07
”OMNIFET”:
FULLY AUTOPROTECTED POWER MOSFET
TYPE V
VNP10N07 70 V 0.1 10 A
LINEARCURRENTLIMITATION
THERMALSHUT DOWN
SHORTCIRCUIT PROTECTION
INTEGRATEDCLAMP
LOW CURRENTDRAWN FROM INPUT PIN
DIAGNOSTICFEEDBACK THROUGHINPUT
R
DS(on)
I
lim
PIN
ESDPROTECTION
DIRECTACCESS TO THE GATE OF THE
POWERMOSFET(ANALOGDRIVING)
COMPATIBLEWITH STANDARD POWER
MOSFET
STANDARD TO-220 PACKAGE
DESCRIPTION
The VNP10N07 is a monolithic device made using SGS-THOMSON Vertical Intelligent Power M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shut-down, linear
BLOCK DIAGRAM
3
2
1
TO-220
current limitation and overvoltage clamp protect the chip in harsh enviroments.
Faultfeedback can be detected by monitoringthe voltageat the input pin.
April 1996
1/11
VNP10N07
ABSOLUTEMAXIMUM RATING
Symbol Parameter Value Unit
V
V
V
P
T
THERMAL DATA
R
thj-case
R
thj-amb
Drain-source Voltage (Vin= 0 ) Int er nall y Clamped V
DS
Input Voltage 18 V
in
I
Drain Current Internally Limited A
D
I
Reverse DC Output Current -14 A
R
Elect r o st at ic Discharge (C= 100 pF, R=1. 5 K) 2000 V
esd
Tot al Dissipat ion at Tc=25oC50W
tot
T
Oper at i ng Junct ion Temperat ur e Internally Limited
j
T
Case Operating Temperature Internally Limited
c
St orage Temperature -55 t o 150
stg
Ther mal Resis t an ce Junction- case M ax Ther mal Resis t an ce Junction- ambient Max
2.5
62.5
o o
o
C
o
C
o
C
C/W C/W
ELECTRICAL CHARACTERISTICS (T
=25oC unlessotherwise specified)
case
OFF
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
CLAMP
Drain-source Clamp
ID= 200 mA Vin= 0 60 70 80 V
Volt age
V
CLTH
Drain-source Clamp
ID=2mA Vin=0 55 V
Thr eshold Vol ta ge
V
INCL
Input-Source Reverse
Iin=-1mA -1 -0.3 V
Clamp Voltage
I
I
DSS
ISS
Zer o I npu t V olt age Drain Current (V
in
Supply Current from
=0)
=13V Vin=0
V
DS
V
=25V Vin=0
DS
50
200
VDS=0V Vin= 10 V 250 500 µA
Input Pin
ON ()
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
IN(th)
Input Thres hold
VDS=VinID+Iin=1mA 0.8 3 V
Volt age
R
DS(on)
St at ic Drain-sour ce On Resistance
Vin=10V ID=5A
=5V ID=5A
V
in
0.1
0.14
DYNAMIC
µA µA
Ω Ω
Symbol Parameter Test Condition s Min. Typ. Max. Unit
g
()Forward
fs
VDS=13V ID=5A 6 8 S
Tr ansc on ductance
C
Out put Capacit anc e VDS=13V f=1MHz Vin= 0 350 500 pF
oss
2/11
VNP10N07
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING(∗∗)
Symbol Parameter Test Condition s Min. Typ. Max. Unit
t
d(on)
t
d(off)
t
d(on)
t
d(off)
(di/dt)
Q
Turn-on Delay Time
t
Rise Time
r
Turn-off Delay T ime
t
Fall T ime
f
Turn-on Delay Time Rise Time
t
r
Turn-off Delay T ime
t
Fall T ime
f
Tur n-on Current Slope VDD=15V ID=5A
on
Total Input Charge VDD=12V ID=5A Vin= 10 V 30 nC
i
VDD=15V Id=5A
=10V R
V
gen
gen
=10
(see figure 3)
VDD=15V Id=5A V
=10V R
gen
= 1000
gen
(see figure 3)
=10V R
V
in
gen
=10
SOURCE DRAIN DIODE
Symbol Parameter Test Condition s Min. Typ. Max. Unit
V
()ForwardOnVoltage ISD=5A Vin=0 1.6 V
SD
Q
I
RRM
t
rr
Reverse Re covery
(∗∗)
Time Reverse Re covery
(∗∗)
rr
Charge
(∗∗)
Reverse Re covery Current
I
= 5 A di/dt = 100 A/µs
SD
V
=30V Tj=25oC
DD
(see test cir cuit, figure 5)
50
80 230 100
600
0.9
3.8
1.7
100 160 400 180
900
2 6
2.5
60 A /µs
125
0.3
4.8
ns ns ns ns
ns
µs µs µs
ns
µC
A
PROTECTION
Symbol Parameter Test Condition s Min. Typ. Max. Unit
t
dlim
T
jsh
I
lim
Drain Current Limit Vin=10V VDS=13V
=5V VDS=13V
V
in
(∗∗) St ep Response
Current Lim it
Vin=10V
=5V
V
in
(∗∗) O vertem perat ure
Shut dow n
(∗∗) Overtem perat ure Re set 135
T
jrs
I
(∗∗) Fault Sink Current Vin=10V VDS=13V
gf
E
(∗∗) S i ngle Pulse
as
Avalanche E ner gy
() Pulsed: Pulse duration = 300 µs, duty cycle1.5 % (∗∗) Parameters guaranteed by design/characterization
=5V VDS=13V
V
in
starting Tj=25oCVDD=20V
=10V R
V
in
=1KΩ L=10mH
gen
7 7
10
10
20
50
14 14
30 80
150
50
20
0.4 J
A A
µs µs
o
C
o
C
mA mA
3/11
VNP10N07
PROTECTION FEATURES
During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (I
) flows into the Input pin in order to
iss
supplythe internalcircuitry. The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 70V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductiveloads.
- LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capabilityof the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperaturethresholdT
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing the chip temperatureand are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperaturecutout occurs at minimum 150 restarted when the chip temperature falls below135
o
C. The device is automatically
o
C.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (witha small increase in R
DS(on)
).
4/11
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