The TS4890 (Min iSO8 & SO 8) is a n A udio P ower
Amplifier capable of delivering 1W of continuous
RMS. ouput power into 8
This Audio Am plifier is exhibiting 0.1% distortion
level (THD) from a 5V supply for a Pout = 250mW
RMS. An external standby mode cont rol reduces
the supply current to less than 10n A. An internal
thermal shutdown protection is also provided.
The TS4890 have b een designed for high quality
audio applications such as m obile phones and t o
minimize the number of external components.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
Ω load @ 5V.
PIN CONNECTIONS (Top View)
TS4890ID, TS4890IDT - SO8
Standby
Bypass
V+
VIN-
Standby
Bypass
V+
IN
VIN-
STANDBY
STANDBY
BYPASS
BYPASS
1
2
3
IN
4
TS4890IST - MiniSO8
1
2
3
4
1
1
2
2
V
V
3
3
IN+
IN+
V
V
4
4
IN-
IN-
8
V2OUT
7
GND
6
CC
V
5
VOUT1
8
V2OUT
7
GND
6
CC
V
5
VOUT1
TS4890IQT - DFN8
V
V
8
8
OUT 2
OUT 2
7
7
GND
GND
6
6
Vcc
Vcc
V
V
5
5
OUT 1
OUT 1
APPLICATIONS
■Mobile Phones (Cellular / Cordless)
■Laptop / Notebook Computers
■PDAs
■Portable Audio Devices
ORDER CODE
Part
Number
Temperature
Range
TS4890-40, +85°C
MiniSO & DFN only available in Tape & Reel: with T suffix.
SO is available in Tube (D) and of Tape & Reel (DT)
June 2003
Package
Marking
SDQ
•
•
•
4890I
4890
4890
TYPICAL APPLICATION SCHEMATIC
Cfeed
Vcc
Rfeed
Audio
Input
Vcc
Cin
Rstb
Rin
4
Vin-
Vin+
3
Bypass
2
Standby
1
Cb
6
Vcc
-
+
Av=-1
+
Bias
GND
7
Vout1
Vout2
TS4890
Cs
5
RL
8 Ohms
8
1/32
TS4890
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
T
T
R
Supply voltage
CC
V
iInput Voltage
Operating Free Air Temperature Range-40 to + 85°C
oper
Storage Temperature-65 to +150°C
stg
T
Maximum Junction Temperature150°C
j
Thermal Resistance Junction to Ambient
thja
SO8
MiniSO8
DFN8
Pd
Power Dissipation
ESDHuman Body Model2kV
ESDMachine Model200V
Latch-up ImmunityClass A
Lead Temperature (solde ring, 10sec )260°C
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed V
3. Device is protected in case of over temperature by a thermal shutdown active @ 150°C.
4. Exceeding the power derating curves during a long period may involve abnormal working of the device.
1)
2)
3)
6V
GND to V
CC
175
215
70
4)
+ 0.3V / GND - 0.3V
CC
See Power Derating Curves
Fig. 24
V
°C/W
W
OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
R
1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves Fig. 24)
2. When mounted o n a 4 l ayers PCB
Supply Voltage2.2 to 5.5V
CC
+ 1V to V
Common Mode Input Voltage Range
ICM
G
ND
Standby Voltage Input :
STB
Device ON
Device OFF
R
Load Resistor4 - 32
L
Thermal Resistance Junction to Ambient
thja
SO8
1)
MiniSO8
2)
DFN8
1.5 ≤ V
G
ND
≤ VCC
STB
V
≤
≤ 0.5
STB
150
190
41
CC
V
V
Ω
°C/W
2/32
TS4890
ELECTRICAL CHARACTERISTICS
= +5V, GND = 0V, T
V
CC
SymbolParameterMin.Typ.Max.Unit
= 25°C (unless otherwise specified)
amb
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode is actived wh en Vstdby is tied to GND
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
V
= +3.3V, GND = 0V, T
CC
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
= 8Ω, CL = 500pF
R
L
Gain Bandwidth Product
= 8
R
Ω
L
amb
Ω
Ω
Ω
Ω
2)
RFeed = 22K
Ω,
Vripple = 200mV rms
Ω,
= 25°C (unless otherwise specified)
68mA
101000nA
520mV
1W
0.15%
77dB
70Degrees
20dB
2MHz
SymbolParameterMin.T yp.Max.Unit
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode is actived wh en Vstdby is tied to GND
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
= 8Ω, CL = 500pF
R
L
Gain Margin
= 8Ω, CL = 500pF
R
L
Gain Bandwidth Product
= 8
R
Ω
L
Ω
2)
RFeed = 22K
Ω,
Ω
Ω
Vripple = 200mV rms
Ω,
5.58mA
101000nA
520mV
450mW
Ω
0.15%
77dB
70Degrees
20dB
2MHz
3/32
TS4890
VCC = 2.6V, GND = 0V, T
= 25°C (unless otherwise specified)
amb
SymbolParameterMin.Typ.Max.Unit
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode is actived wh en Vstdby is tied to GND
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
= 8Ω, CL = 500pF
R
L
Gain Margin
= 8Ω, CL = 500pF
R
L
Gain Bandwidth Product
R
= 8
Ω
L
Ω
2)
RFeed = 22K
Ω,
Ω
Ω
Vripple = 200mV rms
Ω,
58mA
101000nA
520mV
260mW
Ω
0.15%
77dB
70Degrees
20dB
2MHz
= 2.2V, GND = 0V, T
V
CC
= 25°C (unless otherwise specified)
amb
SymbolParameterMin.T yp.Max.Unit
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode is actived wh en Vstdby is tied to GND
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
= 8Ω, CL = 500pF
R
L
Gain Margin
= 8Ω, CL = 500pF
R
L
Gain Bandwidth Product
= 8
R
Ω
L
Ω
2)
RFeed = 22K
Ω,
Ω
Ω
Vripple = 100mV rms
Ω,
58mA
101000nA
520mV
180mW
Ω
0.15%
77dB
70Degrees
20dB
2MHz
4/32
ComponentsFunctional Description
TS4890
Rin
Cin
RfeedFeed back resistor which sets the closed loop gain in conjunction with Rin
CsSupply Bypass capacitor which provides power supply filtering
CbBypass pin capacitor which provides half supply filtering
Cfeed
RstbPull-down resistor which fixes the right supply level on the standby pin
GvClosed loop gain in BTL configuration = 2 x (Rfeed / Rin)
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also
forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
Low pass filter capacitor allowing to cut the high frequency
(low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF.
1. External resistors are not needed for having better stability when supply @ Vcc down to 3V. The
Fig. 89 : Signal to Noise Ratio vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
100
90
RL=16
80
SNR (dB)
70
60
50
2.2
2.53.03.54.04.55.0
20/32
Ω
Frequency (Hz)
RL=8
Ω
Vcc (V)
RL=4
Ω
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
Fig. 90 :Signal to Noise Ratio Vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
TS4890
2.53.03.54.04.55.0
60
70
80
90
100
RL=8
Ω
RL=4
Ω
RL=16
Ω
Gv = 10
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
2.2
SNR (dB)
Vcc (V)
012345
0
1
2
3
4
5
6
7
Vstandby = Vcc
Tamb = 25°C
Icc (mA)
Vcc (V)
0.00.51.01.52.02.53.0
0
1
2
3
4
5
6
Vcc = 3.3V
Tamb = 25°C
Icc (mA)
Vstandby (V)
Fig. 91 : Signal to Noise Ratio vs Power Supply
with Weig h t e d Filt e r t y p e A
110
100
RL=4
Ω
Ω
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
90
SNR (dB)
80
70
60
2.2
RL=16
2.53.03.54.04.55.0
RL=8
Ω
Vcc (V)
Fig. 93 : Frequency Response Gain vs Cin, &
Cfeed
10
5
0
-5
-10
Gain (dB)
-15
-20
-25
10100100010000
Cin = 22nF
Cin = 82nF
Cfeed = 330pF
Cin = 470nF
Frequency (Hz)
Cfeed = 680pF
Cfeed = 2.2nF
Rin = Rfeed = 22kΩ
Tamb = 25°C
Fig. 92 : Signal to Noise Ratio vs Power Supply
with Weighted Filter Type A
Fig. 94 : Current Consumption vs Power
Supply Voltage (no load)
Fig. 95 : C urrent Con sumption v s Standby
Voltage @ Vcc = 5V
7
6
5
4
3
Icc (mA)
2
1
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Vstandby (V)
Vcc = 5V
Tamb = 25°C
Fig. 96 : C urrent Con sumption v s Standby
Voltage @ Vcc = 3.3V
21/32
TS4890
2.53.03.54.04.55.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RL = 16Ω
RL = 4Ω
RL = 8Ω
Tamb = 25°C
2.2
Vout1 & Vout2
Clipping Voltage Low side (V)
Power supply Voltage (V)
Fig. 97 : C urrent Con sumption v s Standby
Voltage @ Vcc = 2.6V
6
5
4
3
Icc (mA)
2
1
0
0.00.51.01.52.02.5
Vstandby (V)
Vcc = 2.6V
Tamb = 25°C
Fig. 99 : Clipping Voltage vs Power Supply
Voltage and Load Resistor
1.0
Tamb = 25°C
0.9
0.8
0.7
0.6
0.5
0.4
Vout1 & Vout2
0.3
0.2
Clipping Voltage High side (V)
0.1
0.0
RL = 8Ω
2.2
2.53.03.54.04.55.0
Power supply Voltage (V)
RL = 4Ω
RL = 16Ω
Fig. 98 : C urrent Con sumption v s Standby
Voltage @ Vcc = 2.2V
5
4
3
Icc (mA)
2
1
0
0.00.51.01.52.0
Vstandby (V)
Vcc = 2.2V
Tamb = 25°C
Fig. 100 :Clipping Voltage vs Power Supply
Voltage and Load Resistor
Fig. 101 : Vout1+V out2 Unweighted Noise Floor
120
Vcc = 2.2V to 5V, Tamb = 25 C
Cb = Cin = 1 F
100
Input Grounded
BW = 20Hz to 20kHz (Unweighted)
80
60
40
Output Noise Voltage ( V)
20
0
22/32
20
Standby mode
100100010000
Frequency (Hz)
Av = 10
Av = 2
Fig. 102 : Vout1+Vout2 A-weighted Noise Floor
120
Vcc = 2.2V to 5V, Tamb = 25 C
Cb = Cin = 1 F
100
Input Grounded
BW = 20Hz to 20kHz (A-Weighted)
80
60
40
20
Standby mode
100100010000
Frequency (Hz)
Output Noise Voltage ( V)
20
0
Av = 10
Av = 2
APPLICA TI ON INFORMATION
Fig. 103 : Demoboard Schematic
TS4890
C1
R2
C2
R1
Vcc
C6
100µ
6
4
Vin-
Vin+
3
R6
Bypass
2
Standby
1
+
C8
C12
1u
Vcc
-
+
Bias
GND
7
Vcc
GND
Neg. input
P1
Pos input
P2
R7
1.5k
Vcc
S1
S2
C3
R3
C5
+
C11
R8
10k
Vcc
R4
C4R5
S5
PositiveInput mode
S8
Standby
D1
PW ON
Fig. 104 : SO8 & MiniSO8 Demoboard Components Side
C7
+
100n
S6
OUT1
S3
GND
S4
GND
S7
Av=-1
+
Vout1
Vout2
TS4890
5
8
C9
+
470µ
C10
+
470µ
23/32
TS4890
Fig. 105 : SO8 & MiniSO8 Demoboard Top
Solder Layer
Fig. 106 :
Solder Layer
SO8 & MiniSO8 Demoboard Bottom
The output power is :
2
)Vout2(
Pout
=
RMS
R
L
)W(
For the same power supply voltage, the output
power in BTL configuration is four times higher
than the output power in single ended
configuration.
■Gain In Typical Application Schematic
(cf. page 1)
In flat region (no effect of Cin), the output voltage
of the first stage is :
Rfeed
Vin1Vout−=
Rin
For the second stage : Vout2 = -Vout1 (V)
The differential output voltage is
Vin21Vout2Vout=−
Rfeed
Rin
)V(
)V(
■BTL Configuration Principle
The TS4890 is a monolithic power amplifier with a
BTL output type. BTL (Bridge Tied Load) means
that each end of the load are connected to two
single ended output amplifiers. Thus, we have :
Single ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
And Vout1 - Vout2 = 2Vout (V)
The differential gain named gain (Gv) for more
convenient usage is :
Gv=
=
−
Vin
2
Rin
Rfeed
1Vout2Vout
Remark : Vout2 is in phase with Vin and Vout1 is
180 phased with Vin. It means that the positive
terminal of the l oudspeaker should be connected
to Vout2 and the negative to Vout1.
■Low and high frequency response
In low frequency region, the effect of Cin starts.
Cin with Rin forms a high pass filter with a -3dB cut
off frequency .
1
=
F
CL
π
RinCin2
In high frequency region, you can limit the
bandwidth by adding a capacitor (Cfeed) in
parallel on Rfeed. Its form a l ow pass filter with a
-3dB cut off frequency .
F
=
CH
1
π
(Hz)
CfeedRfeed2
)Hz(
24/32
TS4890
)V(tsinVV
PEAKOUT
ω=
)A(
R
V
I
L
OUT
OUT
=
)W(
R2
V
P
L
2
PEAK
OUT
=
)A(
R
V
2Icc
L
PEAK
AVG
π
=
)W(
R
Vcc2
maxPdiss
L
2
2
π
=
Vcc4
V
plysupP
P
PEAKOUT
π
==η
■Power dissipation and efficiency
Hypothesis :
• Voltage and current in the load are sinusoidal
(Vout and Iout)
• Supply voltage is a pure DC source (Vcc)
Regarding the load we have :
and
and
Then, the average current delivered by the supply
voltage is
The power delivered by the supply voltage is
Psupply = Vcc Icc
Then, the po wer dissip ated by the amplifier is
Pdiss = Psupply - Pout (W)
Pdiss
=
and the maximum value is obtained when
and its value is
π
AVG
R
(W)
Vcc22
L
Pdiss
∂
P
∂
OUT
−
OUTOUT
0
=
)W(PP
The maximum theoret ical value is reached when
Vpeak = V c c, so
π
%5.784=
■Decoupl i ng of the ci rc u it
Two capacitors are needed to bypass properly the
TS4890. A power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has especially an influence on the THD+N in
high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 100µF, you can expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 100µF, in high frequency
increase THD+N and disturbances on the power
supply rail are less fil tered.
To the contrary, if Cs is higher than 100µF, those
disturbances on the power supply rail are more
filtered.
Cb has an influence on THD+N in lower frequency,
but its function is critical on the final result of PSRR
with input grounded in lower frequency.
If Cb is lower than 1µF, THD+N increase in lower
frequency (see THD+N vs frequency curves) and
the PSRR worsens up
If Cb is higher than 1µF, the benefit on THD+N in
lower frequency is small but the ben efit on PSRR
is substantial (see PSRR vs. Cb curves).
Note that Cin has a non-negligible effect on PSRR
in lower frequency. Lower is its value, higher is the
PSRR (see fig. 13).
■Pop and Click performance
In order to have the best performances with the
pop and click circuitry, the formula below must be
follow :
τ≤τ
bin
Remark : This maximum valu e is only depending
on power supply voltage and load values.
The efficiency is the ratio between the output
power and the power supply
With
and
×+=τ
)s(C)RR(
infeedinin
)s(Ck50bb×Ω=τ
25/32
TS4890
)W(
R
Vcc2
maxPdiss
L
2
2
π
=
nF795
FRin2
1
C
CL
IN
=
π
=
■Power amplifier design examples
Given :
• Load impedance : 8Ω
• Output power @ 1% THD+N : 0.5W
• Input impedance : 10kΩ min.
• Input voltage peak to peak : 1Vpp
• Bandwidth frequency : 20Hz to 20kHz (0, -3dB)
• THD+N in 20Hz to 20kHz < 0.5% @Pout=0.45W
• Ambient temperature max = 50°C
• SO8 package
First of all, we must cal culate t he m inimum p ower
supply voltage to obtain 0.5W into 8Ω. See curves
in fig. 15, we can read 3.5V. Thus, the power
supply voltage value min. will be 3.5V.
Following the maximum power dissipation
equation :
with 3.5V we have Pdissmax=0.31W.
Refer to power derating curves (fig. 24), with
0.31W the maxim um ambien t temperature will be
100°C. This last value could be higher if you follow
the example layout shows on the demoboard
(better dissipation).
The gain of the amplifier in flat region will be :
The first amplifier has a gain of
Rfeed
Rin
3
=
and the theoretical val ue of t he -3dB cut of hig her
frequency is 2MHz/3 = 660kHz.
We can keep this value or limiting the bandwidth
by adding a capacitor Cfeed, in paralle l on Rfeed.
Then
C
FEED
=
1
π
FR2
CHFEED
pF265
=
So, we could use for Cfeed a 220pF capacitor
value that gives 24kHz.
Now, we can choose the value of Cb with the
constraint THD+N in 20Hz to 20kHz < 0.5% @
Pout=0.45W. If you refer to the closest THD+N vs
frequency measurement : fig. 71 (Vcc=3.3V,
Gv=10), with Cb = 1µF, the THD+N vs frequency
is always below 0.4%. As the behaviour is the
same with Vcc = 5V (fig. 67), V cc = 2.6V (fig. 67).
As the gain for these measurements is higher
(worst case), we can consider with Cb = 1µF, Vcc
= 3.5V and G v = 6, that the THD+N in 20Hz to
20kHz range with Pout = 0.45W will be lower than
0.4%.
In the following tables, you could find three
another examples with values required for the
demoboard.
V
INPP
PR22
OUTL
65.5
===
V
G
OUTPP
V
V
INPP
We have Rin > 10kΩ. Let's take Rin = 10kΩ, then
Rfeed = 28.25kΩ. We could use for Rfeed = 30kΩ
in normalized value and the gain w ill be Gv = 6.
In lower frequency we want 20 Hz (-3dB cut off
frequency). Then
So, we could use for Cin a 1µF capacitor value that
gives 16Hz.
In Higher frequency we want 20k Hz (-3dB cut off
frequency). The Gain Bandwidth Product of the
TS4890 is 2MHz typical and doesn't change when
the amplifier delivers power into the load.
26/32
Remark : components with (*) marking are
optional.
Application n°1 : 20Hz to 20kHz bandwidth and
6dB gain BTL power amplifier.
We have finished a design and we have chosen for
the components :
• Rin=Rfeed=22kΩ
• Cin=100nF
• Cb=1µF
Now, on fig. 16, we can see the PSRR (input
grounded) vs frequency curves. At 217Hz, we
have a PSRR value of -36dB.
In reality we want a value about -70dB. So, we
need a gain of 34dB !
Now, on fig. 15 we can see the effect of Cb on the
PSRR (input grounded) vs. frequency. With
Cb=100µF, we can reach the -70dB value.
The process to obtain the final curve (Cb=100µF,
Cin=100nF, Rin=Rfeed=22kΩ) is a simple transfer
point by point on each frequency of the curve on
fig. 16 to the curve on fig. 15.
The measurement result is shown on the next
figure.
• We fixed the AC sinusoidal ripple voltage
(Vripple)
• No bypass capacitor Cs is used
The PSRR value for each frequency is :
)V(Rms
×=
Log20)dB(PSRR
10
ripple
Remark : The measure of the Rms voltage is not a
Rms selective measure but a full range (2 Hz to
125 kHz) Rms measure. It means that we
measure the effective Rms signal + the noise.
−
)VsVs(Rms
−+
-70
10100100010000100000
Frequency (Hz)
■Note on PSRR measurement
What is the PSRR ?
The PSRR is the Power Suppl y Rejection Ratio.
It's a kind of SVR in a determined frequency range.
The PSRR of a device, is the ratio between a
power supply disturbance and the result on the
output. We can say that the PSRR is the ability of
a device to m inimize the impact o f power supply
disturbances to the output.
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