SGS Thomson Microelectronics TEA5040S Datasheet

DIGITAL CONTROL OF BRIGHTNESS, SATURATION AND CONTRAST ON TV SIGNALS AND R, G, B INTERNAL OR EXTERNALSOURCES

BUS DRIVE OF SWITCHINGFUNCTIONS

DEMATRIXING OF R, G, B SIGNALS FROM Y, R-Y, B-Y,TV MODE INPUTS

MATRIXING OF R, G, B SOURCES INTO Y, R-Y, B-Y SIGNALS

AUTOMATIC DRIVE AND CUT-OFF CONTROLS BY DIGITAL PROCESSING DURING FRAMERETRACE

PEAK ANDAVERAGEBEAM CURRENT LIMITATION

ON-CHIP SWITCHING FOR R, G, B INPUT SELECTION

ON-CHIP INSERTION OF INTERNAL OR EXTERNAL R, G, B SOURCES

TEA5040S

WIDE BAND VIDEO PROCESSOR

DESCRIPTION

The TEA5040S is a serial bus-controlled videoprocessingdevice which integrates a complexarchitecturefulfilling multiplefunctions.

SDIP42

(Plastic Package)

ORDER CODE : TEA5040S

PINCONNECTIONS

SWITCHABLEVIDEO OUTPUT

R INTERNAL INPUT

R EXTERNAL INPUT

G INTERNAL INPUT

G EXTERNAL INPUT

B INTERNALINPUT

B EXTERNAL INPUT

FB EXTERNALINPUT

FB INTERNALINPUT

B-YINPUT R-YINPUT

Y INPUT

CLOCK

DATA

ENABLE

VOLTAGE REFERENCE

R CLAMPMEMORY

G CLAMP MEMORY

B CLAMPMEMORY

GROUND

NOT TO BE CONNECTED NOT TO BE CONNECTED

2 340 4 5 6 7 8 9 10 11 12 31 13 14 15 16 17 18 19 20 21

42 41

SYNCHRO INPUT INTERNAL VIDEO OUTPUT INTERNAL VIDEO INPUT

AVERAGE BEAM LIMIT. REF

EXTERNAL VIDEO INPUT

AVERAGEBEAMCURRENTFILTER

LEAKAGE CURRENT FILTER

CATHODE CURRENTINPUT

SWITCHCUT-OFFRESISTANCE

SUPER SANDCASTLE INPUT

B OUTPUT

CUT-OFFMEMORY(BCHANNEL)

DRIVE MEMORY (B CHANNEL)

G OUTPUT

CUT-OFFMEMORY (G CHANNEL)

DRIVEMEMORY (G CHANNEL)

R OUTPUT

CUT-OFFMEMORY (RCHANNEL)

DRIVEMEMORY (R CHANNEL)

23 22

5040S-01.EPS

April 1993

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TEA5040S

BLOCK DIAGRAM

VIDEO

OUTEXTINT EN CLKDATA

4037

14 1315 36

REF

INT SYNC.

DELAY

TIME

(R - Y) (B - Y)

VIDEO

SWITCH

12 11

R’

G’

B’

SUPER

SAND CAS TLE

DETECTOR

(R - Y)

MATRIX

(B - Y)

+ 12V

BUS

DECODER

GENERALDESCRIPTION Brief Description

This integrated circuit incorporates the following features :

- a synchro and two video inputs

- a fixed video output

- a switchablevideo output

- normalY, R-Y,B-YTV mode inputs

- doubleset of R, G, B inputs

- brightness, contrast and saturation controls as wellon aR,G,B pictureasonanormalTVpicture

- digitalcontrol inputs by means of serialbus

- peakbeam currentlimitation

- averagebeam current limitation

- automaticdrive and cut-offcontrols

Block Diagram Description

BUSDECODER A3 lines bus(clock,data, enable) delivered by the

BEAM

CURRENT

LIMIT

LOGIC

(R - Y)

(B - Y)

MATRIX

DRIVE

MEMORIES

CONTROL

BLACK LEVEL

X3X3

CUTOFF

MEMORIES

CATHODE

CURRENTS

CONTRAST

SAT.

BRIGHTNESS

microcontrollerof the TV-setentersthe videoprocessor integrated circuit (pins 13-14-15). A control systemacts insuch a way that only a 9-bit word is takenintoaccountbythevideoprocessor.Sixofthe bits carry the data, the remaining three carry the address of the subsystem.

Function Address

Brightness Control 0 5 Contrast Control 1 5 Colour on/off Selection 2 1 Insertion Allowed 3 1 Sync/Async Mode 4 1 Int/Ext Video Switching 5 1 B-Y Saturation Control 6 6 R-Y Saturation Control 7 6

Number of

3423 24 33

Bits

OUT

5040S-02.EPS

2/12

Table belowdepicts9-bit wordsrequired for various functions.

Subsystem’s Configuration

BRIGHTNESS CONTRAST COLOUR ON/OFF

INSERTION SYNC/ASYNC MODE VIDEO INT/EXT

SATURATION B-Y

SATURATION R-Y

Min. Max.

Min. max.

Off On

Allowed Not Allow.

Sync. Async.

Ext. Int.

Min. Max.

Data Bits

LSB....MSB

X00000 X11111

XXXXX0 XXXXX1

XXXX0X XXXX1X

XXXXX0 XXXXX1

000000 111111

000000

1111

TEA5040S

Add. Bits

LSB....MSB

000 100 010

110 001 101

011

111

A demultiplexer directs the data towards latches which drive the appropriatecontrol. More detailed information about serial bus operation is given in the following chapter.

VideoSwitch

The video switch has three inputs :

- an internal video input (pin 39),

- an external video input (pin 37),

- a synchro input (pin 41),

and twooutputs :

- an internal video output (pin40),

- a switchablevideo output (pin 42)

The 1Vpp composite video signal applied to the internal video input is multiplied by two and then appears as a 2Vpp low impedance composite video signal at the output. This signal is used to deliver a 1Vpp/75Ω composite video signal to the peri-TV plug.

Theswitchablevideooutputcanbe any ofthethree inputs.Whenthe Int/Ext one active bitword is high (address number 5), the internal video input is selected.If not,eitheraregeneratedsynchropulse or the externalvideo signal is directed towardsthis output depending on the level of the Sync/Async one active bit word (address number 4). As this outputisto be connectedto the synchrointegrated circuit, RGB information derived from an external sourceviathePeri-TV plug canbedisplayedon the screen, the synchronization of the TV-set being then made with an external videosignal.

When RGB information is derived from a source integrated in the TV-set, a teletext decoder for example, the synchronization can be made either on the internalvideo input(in case ofsynchronous data) or on the synchroinput (incaseof asynchro-

nous data).

R, G, BInputs

There are two sets of R, G, B inputs : oneis to be connected to the peri-TV plug (Ext R, G, B), the secondonetoreceivethe informationderivedfrom the TV-set itself (Int R, G, B).

In order to have a saturation control on a picture coming from the R, G, B inputstoo, it is necessary to getR-Y, B-Yand Y signalsfrom R, G,B information : this is performed on the first matrix that receives the three 0.9Vp (100% white) R, G, B signalsand delivers the corresponding Y, R-Y, B-Y signals. These ones are multiplied by 1.4 in order to make the R-Y and B-Y signals compatible with the R-Y and B-Y TV mode inputs. The desiredR, G, B inputs are selected by means of 3 switches controlledby thetwo fast blankingsignal inputs. A high level on FB external pin selects the external RGB sources. The three selected inputs are clamped in orderto give the required DC level at the outputofthisfirstmatrix.Thethree notselected inputs areclamped on a fixedDC level.

Y,R-Y, B-YInputs

The 2Vppcompositevideo signal appearingat the switchable output of the video switch (pin 42) is driven through the subcarrier trap and the luminance delay line with a 6 dB attenuationto the Y input (1Vpp ; pin 12). In order to make this 1Vpp (synchro to white) Y signal compatible with the 1Vpp (blackto white)Ysignaldeliveredbythe first matrix,it is necessaryto multiply it by a coefficient of 1.4.

R, G, BInsertion Pulse (fast blanking)

A R, G, B source has also to provide an insertion

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TEA5040S

pulse. Since this integrated circuit can be directly connectedto twodifferentsources,it is necessary then to have two separate insertion pulse inputs (pin 8-9). Fast blanking can be inhibitedby a one active bit word. The two fast blankinginputs carry out an OR function to insert R, G, B sources into TV picture. The external fast blanking (FB ext.) selectsthe appropriateR, G, B source.

Controls

Thefourbrightness,contrastandsaturationcontrol functions are direct digitally controlledwithout using digital-to-analogconverters.

The contrast control of the Y channel is obtained by means of a digital potentiometer which is an attenuator including several switchable cells directly controlled by a 5 active bit word (address number1). The brightnesscontrol is alsomade by a digitalpotentiometer (5 active bit word,address number 0). Since a + 3dB contrast capability is required,the Y signal value couldbe upto 0.7Vpp nominal. For both functions, the control characteristicsare quasi-linear.

In each R-Y and B-Y channel, a six-cell digital attenuator is directly controlled by a 6 active bit word (address number 6 and 7). The tracking needed to keep the saturation constant when changingthe contrasthasto be done externallyby the microcontroller. Furthermore, colour can be disabledbyblankingR-Y andB-Ysignalsusingone active bit word (address number 2) to drive the one-chipcolour ON/OFF switch.

Second Matrix,Clamp, PeakClipping, Blanking

The second matrix receives the Y, R-Y and B-Y signals and delivers the corresponding R, G, B signals.As itis requiredto have the capabilityof + 6dB saturation, an internal gain of 2 is applied on bothR-Y and B-Y signals.

Alow clippinglevel is included in orderto ensurea correctblankingduringtheline andframeretraces. Ahighclippinglevelensuresthepeakbeamcurrent limitation. These limitations are correct only if the DC bias of the three R, G, B signals are precise enough. Therefore a clamp has been added in eachchannel in order to compensatefor the inaccuracyof the matrix.

SandcastleDetectorAnd Counter

The three level supersandcastle is used in the circuitto deliverthe burst pulse(CLP),thehorizontal pulse (HP), and the composite vertical and horizontal blanking pulse (BLI). This last one is regenerated in the counter which delivers a new

compositepulse (BL)in whichtheverticalpartlasts 23 lines when the vertical part of the supersandcastlelasts more than 11 lines.

The TEA5040S cannot work properly if this minimum durationof 11lines is not ensured.

The counterdeliversdifferentpulsesneededcircuit and especiallythe line pulses 17 to23 used in the automaticdrive andcut-off control system.

Automatic Drive And Cut-off Control System

Cut-off and drive adjustments are no longer requiredwiththis integratedcircuitasit has a sample and hold feedback loop incorporating the final stages of the TV-set. This system works in a sequentialmode.Forthispurpose,specialpulsesare inserted in G, R and B channels. During the lines 17, 18 and 19, a ”drive pulse” is inserted respectivelyin thegreen,red and bluechannels.Theline 20 is blanked on the three channels. During the lines 21, 22 and 23, a ”quasi cut-off pulse” is inserted respectively in the green, red and blue guns.

The resulting signal is then applied to the input of a voltagecontrolledamplifier. In the finalstages of the TV-set, the current flowing in each green, red and blue cathode is measured and sent to the videoprocessorby a currentsource.

The threecurrentsare added togetherin a resistor matrix which can be programmed to set the ratio between the three currents in order to get the appropriate colour temperature.The output of the matrix forms a high impedance voltage source whichis connectedtotheintegratedcircuit (pin34). Samemeasurement rangebetweendriveand cutoff is achieved by internallygrounding an external low impedanceresistor during lines 17,18 and 19.

This is due to the fact that the drive currents are about one hundred times higher than the cut-off and leakagecurrents.

Each voltage appearing sequentially on the wire pin 34 is then a function of specific cathode current :

- When a current due to a drivepulse occurs, the voltage appearing on the pin 34 is compared within the IC with an internal reference, and the result of the comparison charges or discharges an external appropriate drive capacitor which storesthe valueduring the frame. This voltageis applied to a voltage controlled amplifier and the systemworksin suchawaythat thepulsecurrent drive derivedfrom the cathodeis kept constant.

- During the line 20, the three guns of the picture tube areblanked.Theleakagecurrentflowingout of the final stages is transformed into a voltage

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