SGS Thomson Microelectronics TDA9115 Datasheet
TDA9115
LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR
FOR MULTISYNC MONITOR
FEATURES
General
2
■ I
C-BUS-CONTROLLED
DEFLECTION PROCESSOR DEDICATED
FOR LOW-END CRT MONITORS
■ SINGLE SUPPLY VOLTAGE 12V
■ VERY LOW JITTER
■ DC/DC CONVERTER CONTROLLER
■ ADVANCED EW DRIVE
■ AUTOMATIC MULTISTANDARD
SYNCHRONIZATION
■ DYNAMIC CORRECTION WAVEFORM
OUTPUT
■ X-RAY PROTECTION AND SOFT-START &
STOP ON HORIZONTAL AND DC/DC DRIVE
OUTPUTS
Horizontal section
■ 150 kHz maximum frequency
■ Corrections of geometric asymmetry:
Pin cushion asymmetry, Parallelogram
■ Tracking of asymmetrycorrections with vertical
size and position
■ Horizontal moiré cancellation output
Vertical section
■ 200 Hz maximum frequency
■ Vertical ramp for DC-coupled output stage with
adjustments of: C-correction, S-correction for
super-flat CRT, Vertical size, Vertical position
■ Vertical moiré cancellation through vertical
ramp waveform
■ Compensation of vertical breathing with EHT
variation
EW section
■ Symmetricalgeometrycorrections:Pin cushion,
Keystone
■ Horizontal size adjustment
■ Tracking of EW waveform with Vertical sizeand
position and adaptation to frequency
■ Compensation of horizontal breathing through
EW waveform
Dynamic correction section
■ Vertical dynamic correction waveformoutput for
dynamic corrections like focus, brightness
uniformity, ...
■ Fixed on screen by means of tracking system
DC/DC controller section
■ Step-up and step-down conversion modes
■ External sawtooth configuration
■ Synchronization on hor. frequency with phase
selection
■ Selectable polarity of drive signal
DESCRIPTION
The TDA9115 is a monolithic integrated circuit assembled in a 32-pin shrink dual-in-line plastic
package. This IC controls all the functions related
to horizontal and vertical deflection in multimode
or multi-frequency computer display monitors.
The deviceonly requiresvery fewexternal components.
Combined with other ST components dedicated
for CRTmonitors (microcontroller, video preamplifier, video amplifier, OSD controller) the TDA9115
allows fully I2C bus-controlled computer display
monitors to be built with a reduced number of external components.
SHRINK 32 (Plastic Package)
ORDER CODE: TDA9115
Version 4.0
August 2001 1/45
1
TABLE OF CONTENTS
1 -PIN CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 -BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 -PIN FUNCTION REFERENCE . . . . . . . . . . . . . . . . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 -QUICK REFERENCE DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 -ABSOLUTE MAXIMUM RATINGS . . . . . . . ........................................ 7
6 -ELECTRICAL PARAMETERS AND OPERATING CONDITIONS . . . . . . ................. 8
6.1 THERMAL DATA . . . . . . .. . . . . . . . . . . . . . . . . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.2 SUPPLY AND REFERENCE VOLTAGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.3 SYNCHRONIZATION INPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.4 HORIZONTAL SECTION . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . .. . 9
6.5 VERTICAL SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.6 EW DRIVE SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.7 DYNAMIC CORRECTION OUTPUTS SECTION . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . 14
6.8 DC/DC CONTROLLER SECTION . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . 15
6.9 MISCELLANEOUS . . . . .. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . ................... 16
7 -TYPICAL OUTPUT WAVEFORMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8-I2C BUS CONTROL REGISTER MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 20
9 -OPERATING DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.1 SUPPLY AND CONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . 23
9.1.1 Power supply and voltage references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.1.2 I2C Bus Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.2 SYNC. PROCESSOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.2.1 Synchronization signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . 23
9.2.2 Automatic sync. selection mode ....................................... 24
9.3 HORIZONTAL SECTION . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . .. 24
9.3.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9.3.2 PLL1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9.3.3 Voltage controlled oscillator . . . . . . . . . . . ................................ 26
9.3.4 PLL2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
9.3.5 Dynamic PLL2 phase control . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . 26
9.3.6 Output section . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . .. . . . . . . . 27
9.3.7 Soft-start and soft-stop on H-drive . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . .. . . 27
9.3.8 Horizontal moiré cancellation . . . ....................................... 27
9.4 VERTICAL SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.4.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.4.2 Vertical moiré . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ................29
9.5 EW DRIVE SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9.6 DYNAMIC CORRECTION OUTPUT SECTION . ................................ 31
9.6.1 Vertical Dynamic Correction output VDyCor . . . . . . . .......................31
9.7 DC/DC CONTROLLER SECTION . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . 31
9.8 MISCELLANEOUS . . . . .. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . ................... 33
9.8.1 Safety functions . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . 33
9.8.2 Soft start and soft stop functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 33
9.8.3 X-ray protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....... 33
9.8.4 Composite output HLckVBk . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . 35
10 -INTERNAL SCHEMATICS . . . . . . . . . . . . . ....................................... 37
11 -PACKAGE MECHANICAL DATA . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
12 -GLOSSARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2
2/45
1 - PIN CONFIGURATION
TDA9115
H/HVSyn
VSyn
HLckVBk
HOscF
HPLL2C
CO
HGND
RO
HPLL1F
HPosF
HMoiré
HFly
RefOut
BComp
BRegIn
BISense
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
VDyCor
SDA
SCL
Vcc
BOut
GND
HOut
XRay
EWOut
VOut
VCap
VGND
VAGCCap
VOscF
VEHTIn
HEHTIn
3/45
4/45
2 - BLOCK DIAGRAM
TDA9115
H/HVSyn
HLckVBk
SDA
SCL
Vcc
RefOut
GND
HGND
7
HPosF
10
HPLL1F
9
R0
HOscF
C0
4
6
8
HFly
12
H-sync
1
detection
Polarity
handling
Phase/frequency
comparator
Horizontal position
Lock detection
3
V-blank
H-lock
31
30
29
13
27
I2C Bus
interface
Supply
supervision
Reference
generation
Internal
ref.
V-sync detection
Input selection
Polarity handling
V-sync
extraction
& detection
Vertical oscillator
2
C Bus registers
I
: Functions controlled via I2C Bus
V-dynamic
correction
(focus, bright.)
VDyCor amplitude
with AGC
S-correction
C-correction
Horizontal
VCO
PLL1
H-moiré controller
H-moiré amplitude
V-ramp control
Tracking EHT
Vertical size
Vertical position
Vertical moiré
Phase comparator
Phase shifter
H duty controller
Pin cushion asymm.
Parallelogram
Geometry
tracking
HPLL2C
5
PLL2
H-drive
buffer
Safety
processor
B+
DC/DC
converter
controller
EW generator
H size
Pin cushion
Keystone
26
25
28
16
15
14
11
24
HOut
XRay
BOut
BISense
BRegIn
BComp
HMoiré
EWOut
2
VSyn
21
VGND
19
VOscF
20 22
VAGCCap
VCap
32
VDyCor
23
VOut
18
VEHTIn
17
HEHTIn
TDA9115
TDA9115
3 - PIN FUNCTION REFERENCE
Pin Name Function
1 H/HVSyn TTL compatible Horizontal /Horizontal and Vertical Sync. input
2 VSyn TTL compatible Vertical Sync. input
3 HLckVBk Horizontal PLL1 Lock detection andVertical early Blanking composite output
4 HOscF High Horizontal Oscillator sawtooth threshold level Filter input
5 HPLL2C Horizontal PLL2 loop Capacitive filter input
6 CO Horizontal Oscillator Capacitor input
7 HGND Horizontal section GrouND
8 RO Horizontal Oscillator Resistor input
9 HPLL1F Horizontal PLL1 loop Filter input
10 HPosF Horizontal Position Filter and soft-start time constant capacitor input
11 HMoiré Horizontal Moiré cancellation output
12 HFly Horizontal Flyback input
13 RefOut Reference voltage Output
14 BComp B+ DC/DC error amplifier (Comparator) output
15 BRegIn Regulation feedback Input of the B+ DC/DC converter controller
16 BISense B+ DC/DC converter current (I) Sense input
17 HEHTIn Input for compensation of Horizontal amplitude versus EHT variation
18 VEHTIn Input for compensation of Vertical amplitude versus EHT variation
19 VOscF Vertical Oscillator sawtooth low threshold Filter (capacitor to be connected to VGND)
20 VAGCCap Input for storage Capacitor for Automatic Gain Control loop in Vertical oscillator
21 VGND Vertical section GrouND
22 VCap Vertical sawtooth generator Capacitor
23 VOut Vertical deflection drive Output for a DC-coupled output stage
24 EWOut E/WOutput
25 XRay X-Ray protection input
26 HOut Horizontal drive Output
27 GND Main GrouND
28 BOut B+ DC/DC converter controller Output
29 Vcc Supply voltage
30 SCL I
31 SDA I
32 VDyCor Vertical Dynamic Correction output
2
C bus Serial CLock Input
2
C bus Serial DAta input/output
5/45
TDA9115
4 - QUICK REFERENCE DATA
Characteristic Value Unit
General
Package SDIP 32
Supply voltage 12 V
Supply current 55 mA
Application category Low-end
Means of control/Maximum clock frequency I
EW drive Yes
DC/DC convertor controller Yes
Horizontal section
Frequency range 15 to 150 kHz
Autosync frequency ratio (can be enlarged in application) 4.28
Positive/Negative polarity of horizontal sync signal/Automatic adaptation Yes/Yes/Yes
Duty cycle of the drive signal 48 %
Position adjustment range with respect toH period ±11 %
Soft start/Soft stop feature Yes/Yes
Hardware/Software PLL lock indication Yes/No
Parallelogram Yes
Pin cushion asymmetry correction (also called Side pin balance) Yes
Top/Bottom/Common corner asymmetry correction No/No/No
Tracking of asymmetry corrections with vertical size & position Yes
Horizontal moiré cancellation (ext.) for Combined/Separated architecture Yes/Yes
Vertical section
Frequency range 35 to 200 Hz
Autosync frequency range (150nF at VCap and 470nF at VAGCCap) 50 to 180 Hz
Positive/Negative polarity of vertical sync signal/Automatic adaptation Yes/Yes/Yes
S-correction/C-correction/Super-flat tube characteristic Yes/Yes/Yes
Vertical size/Vertical position adjustment Yes/Yes
Vertical moiré cancellation (internal) Yes
Vertical breathing compensation Yes
EW section
Pin cushion correction Yes
Keystone correction Yes
Top/Bottom/Common corner correction No/No/No
Horizontal size adjustment Yes
Tracking of EW waveform with Frequency/Vertical size & position Yes/Yes
Breathing compensation on EW waveform Yes
Dynamic correction section (dyn. focus, dyn. brightness,...)
Vertical dynamic correction output VDyCor Yes
Horizontal dynamic correction output No
Composite HV dynamic correction output No
Tracking of horizontal waveform with Horizontal size/EHT No/No
Tracking of vertical waveform with V. size & position Yes
DC/DC controller section
Step-up/Step-down conversion mode Yes/Yes
Internal/External sawtooth configuration No/Yes
Bus-controlled output voltage No
Soft start/Soft stop feature Yes/Yes
Positive(N-MOS)/Negative(P-MOS) polarity of BOut signal Yes/Yes
2
C Bus/400 kHz
6/45
TDA9115
5 - ABSOLUTE MAXIMUM RATINGS
All voltages are given with respect to ground.
Currents flowing from the device (sourced)are signed negative. Currents flowing tothe device aresigned
positive.
Symbol Parameter
V
CC
Supply voltage (pin Vcc) -0.4 13.5 V
Pins HEHTIn, VEHTIn, XRay, HOut, BOut
Pins H/HVSyn, VSyn, SCL, SDA
V
(pin)
Pins HLckVBk, CO, RO, HPLL1F, HPosF, HMoiré, BRegIn, BISense, VAGCCap, VCap, VDyCor, HOscF, VOscF
Pin HPLL2C
Pin HFly
V
T
ESD
stg
T
j
ESD susceptibility
(human body model: discharge of 100pF through 1.5kΩ) -2000 2000 V
Storage temperature -40 150 °C
Junction temperature 150 °C
Value
Min Max
V
V
5.5
V
RefO
RefO
V
RefO
CC
-0.4
-0.4
-0.4
-0.4
-0.4
Unit
V
V
V
/2
V
V
7/45
TDA9115
6 - ELECTRICAL PARAMETERS AND OPERATING CONDITIONS
Medium (middle) value of an I2C Bus control or adjustment register composed of bits D0, D1,...,Dn isthe
one having Dn at ”1” and all other bits at ”0”. Minimum value is the one with all bits at 0, maximum value
is the one with all at ”1”.
Currents flowing from the device (sourced)are signed negative. Currents flowing tothe device aresigned
positive.
THis period of horizontal deflection.
6.1 THERMAL DATA
Symbol Parameter
T
R
amb
th(j-a)
Operating ambient temperature 0 70 °C
Junction-ambience thermal resistance 65 °C/W
6.2 SUPPLY AND REFERENCE VOLTAGES
T
=25°C
amb
Symbol Parameter Test Conditions
V
V
I
RefO
CC
I
CC
RefO
Supply voltage at Vcc pin 10.8 12 13.2 V
Supply current to Vcc pin VCC=12V 55 mA
Reference output voltage at RefOut pin VCC=12V,I
Current sourced by RefOutoutput -5 0 mA
6.3 SYNCHRONIZATION INPUTS
Vcc = 12V, T
Symbol Parameter Test Conditions
V
LoH/HVSyn
V
HiH/HVSyn
V
LoVSyn
V
HiVSyn
R
PdSyn
t
PulseHSyn
t
PulseHSyn/TH
t
PulseVSyn
t
PulseVSyn/TV
t
extrV/TH
t
HPolDet
=25°C
amb
LOW level voltage on H/HVSyn 0 0.8 V
HIGH level voltage on H/HVSyn 2.2 5 V
LOW level voltage on VSyn 0 0.8 V
HIGH level voltage on VSyn 2.2 5 V
Internal pull-down on H/HVSyn, VSyn 100 175 250 kΩ
H sync. pulse duration on H/HVSyn pin 0.5 µs
Proportion of H sync pulse to H period Pin H/HVSyn 0.2
V sync. pulse duration Pins H/HVSyn, VSyn 0.5 750 µs
Proportion of V sync pulse to V period Pins H/HVSyn, VSyn 0.15
Proportion ofsync pulse length to H peri-
od for extraction as V sync pulse
Pin H/HVSyn,
cap. on pin CO = 820pF
Polarity detection time (after change) Pin H/HVSyn 0.75 ms
Value
Value
Min. Typ. Max.
= -2mA 7.4 8 8.6 V
RefO
Value
Min. Typ. Max.
0.21 0.3
Unit
Units
Units
8/45
6.4 HORIZONTAL SECTION
TDA9115
Vcc = 12V, T
amb
=25°C
Symbol Parameter Test Conditions
PLL1
I
RO
C
CO
f
HO
f
HO(0)
f
HOCapt
∆
f
HO 0()
-----------------------------
f
HO 0()
∆f
/∆V
HO
V
HO
V
HOThrfr
V
HPosF
Current load on RO pin 1.5 mA
Capacitance on CO pin 390 pF
Frequency of hor. oscillator 150 kHz
Free-running frequency of hor. oscill.
Hor. PLL1 capture frequency
(4)
Temperature drift of free-running freq.
(1)
RRO=5.23kΩ,CCO=820pF 27 28.5 29.9 kHz
f
= 28.5kHz 29 122 kHz
HO(0)
(3)
T∆⋅
Average horizontal oscillator sensitivity f
HO
H. oscill. control voltage on pin HPLL1F V
Threshold on H. oscill. control voltage on
HPLL1F pin for tracking of EW with freq.
Control voltage on HPosF pin
= 28.5kHz 19.6 kHz/V
HO(0)
=8V 1.4 6.0 V
RefO
V
=8V 5.0 V
RefO
HPOS
(Sad01):
11111111b
10000000b
00000000b
V
HOThrLo
V
HOThrHi
Bottom of hor. oscillator sawtooth
Top of hor. oscillator sawtooth
(6)
(6)
PLL2
(6)
(2)
V
(HFly)>VThrHFly
No PLL2 phase modulation
(5)
(5)
Null asym. correction 0 %
Null asym. correction 44 %
R
In(HFly)
I
InHFly
V
ThrHFly
V
S(0)
V
BotHPLL2C
V
TopHPLL2C
(min)/T
t
ph
(max)/T
t
ph
Input impedance on HFly input
Current into HFly input At top of H flyback pulse 5 mA
Voltage threshold on HFly input 0.6 0.7 V
H flyback lock middle point
Low clamping voltage on HPLL2C pin
High clamping voltage on HPLL2C pin
Min. advance of H-drive OFF before
H
middle of H flyback
Max. advance of H-drive OFF before
H
middle of H flyback
(7)
(8)
H-drive output on pin HOut
I
HOut
t
Hoff/TH
Current into HOut output Output driven LOW 30 mA
Duty cycle of H-drive signal
Soft-start/Soft-stopvalue
Picture geometry corrections through PLL1 & PLL2
HPOS
(Sad01):
11111111b
00000000b
t
Hph/TH
H-flyback (center) static phase vs. sync
signal (via PLL1), see Figure 7
Value
Units
Min. Typ. Max.
-150 ppm/°C
2.60
3.30
3.85
2.8
3.4
4.0
3.05
3.55
4.15
1.6 V
6.4 V
300 500 700 Ω
4.0 V
1.6 V
3.75 4.0 4.25 V
48
85
+11
-11
V
V
V
%
%
%
%
9/45
TDA9115
Symbol Parameter Test Conditions
Value
Units
Min. Typ. Max.
PCAC
(Sad11h) full span
t
PCAC/TH
t
ParalC/TH
Contribution of pin cushion asymmetry
correction to phase of H-drive vs. static
phase (via PLL2), measured in corners
Contribution of parallelogram correction
to phase of H-drive vs. static phase (via
PLL2), measured in corners
(9)
(9
VPOS
VSIZE
VSIZE
VSIZE
PARAL
VPOS
VSIZE
VSIZE
VSIZE
VPOS
VSIZE
at medium
at minimum
at medium
at maximum
(Sad12h) fullspan
at medium
at minimum
at medium
at maximum
at max. or min.
at minimum
±1.0
±1.8
±2.8
±1.75
±2.2
±2.8
±1.75
%
%
%
%
%
%
%
Note 1: Frequency at no sync signal condition. For correct operation, the frequency of the sync signal applied must
always be higher than the free-running frequency. The application must consider the spread of values of real
electrical components in R
the free-running frequency is f
and CCOpositions so as to always meet this condition. Theformula to calculate
RO
=0.12125/(RROCCO)
HO(0)
Note 2: Base of NPN transistor with emitter to ground is internally connected on pin HFly through a series resistance of
about 500Ω and a resistance to ground of about 20kΩ.
Note 3: Evaluated and figured out during the device qualification phase. Informative. Not tested on every single unit.
Note 4: This capture range can be enlarged by external circuitry.
Note 5: The voltage on HPLL2C pin corresponds to immediate phase of leading edge of H-drive signal on HOut pin with
respect to internal horizontal oscillator sawtooth. It must be between the two clamping levels given. Voltage
equal to one of the clamping values indicates a marginal operation of PLL2 or non-locked state.
Note 6: Internal threshold. See Figure 7.
Note 7: Thet
(min)/THparameter is fixed by the application. For correct operation of asymmetry corrections through
ph
dynamic phase modulation, this minimum must be increased bymaximum of the total dynamic phase required
in the direction leading to bending of corners to the left. Marginal situation is indicated by reach of V
TopHPLL2C
high clamping level by waveform on pin HPLL2C. Also refer to Note 5 and Figure 7.
Note 8: Thet
(max)/THparameter is fixed by the application. For correct operation of asymmetry corrections through
ph
dynamic phase modulation, this maximum must be reduced by maximum of thetotal dynamic phase required in
the direction leading to bending of corners to the right. Marginal situation is indicated by reach of V
BotHPLL2C
low clamping level by waveform on pin HPLL2C. Also refer to Note 5 and Figure 7 .
Note 9: All other dynamic phase corrections of picture asymmetry set to their neutral (medium) positions.
10/45
6.5 VERTICAL SECTION
TDA9115
VCC= 12V,T
Symbol Parameter Test Conditions
amb
=25°C
Value
Units
Min. Typ. Max.
AGC-controlled vertical oscillator sawtooth; V
R
L(VAGCCap)
V
VOB
V
VOT
t
VODis
f
VO(0)
f
VOCapt
V
∆
VOdev
---------------------------------
V
VOamp
V
∆
--------------------------------
∆
V
--------------------------------
-----------------------------------------
V
VOampfVO
VOS cor–
V
VOamp
VOC cor–
V
VOamp
V
∆
16()
VOamp
∆⋅
Ext. load resistance on
VAGCCap pin
Sawtooth bottom voltage on
VCap pin
(10)
(11)
Sawtooth top voltage on VCap
pin
Sawtooth Discharge time C
Free-running frequency C
AGC loop capture frequency C
Sawtooth non-linearity
(12)
S-correction range
C-correction range
Frequency drift of sawtooth
amplitude
(17)(18)
Vertical output drive signal (on pin VOut);V
V
mid(VOut)
V
amp
V
offVOut
I
VOut
V
VEHT
V
∆
amp
----------------------------------------- -
∆⋅
V
ampVVEHT
Middle point on VOut sawtooth
Amplitude of VOut sawtooth
(peak-to-peak voltage)
Level on VOutpin at V-drive ”off” I2Cbit VOutEn at 0 3.8 V
Current delivered by VOut out-
put
Control input voltage range on
VEHTIn pin
Breathing compensation
RefO
=8V
RefO
∆V
amp/Vamp
No load on VOscF pin
AGC loop stabilized
V sync present
No V sync
VCap
VCap
VCap
AGC loop stabilized,
AGC loop stabilized,
tVR=1/4 T
tVR=3/4 T
AGC loop stabilized,
tVR=1/2 T
CCOR
x0000000b
x1000000b
x1111111b
AGC loop stabilized
f
VOCapt
=8V
VPOS
x0000000b
x1000000b
x1111111b 3.65
VSIZE
x0000000b
x1000000b
x1111111b 3.5
V
VEHT>VRefO
V
VEHT
(R=∞) ≤1% 65 MΩ
(11)
1.8 1.9 2.0 V
5
4.9
V
V
=150nF 80 µs
=150nF 100 Hz
=150nF 50 185 Hz
(15)
VR
VR
(15)
VR
(Sad0A):
(min)≤f
VO≤fVOCapt
(12)
(13)
(14)
(max)
0.5 %
-5
+5
-3
0
+3
200
ppm/Hz
%
%
%
%
%
(Sad08):
3.2
3.5
3.8
3.3 V
V
V
(Sad07):
2.25
3.0
3.75
2.5 V
V
V
-5 5 mA
(min)≤V
VEHT≤VRefO
1 V
0
2.5
RefO
V
%/V
%/V
Note 10: Value of acceptable cumulated parasitic load resistance due tohumidity, AGC storage capacitor leakage, etc.,
for less than 1% of V
amp
change.
11/45
TDA9115
Note 11: The threshold for V
influence the value of V
is generated internally and routed to VOscF pin. Any DC current on this pin will
VOB
VOB
.
Note 12: Maximum of deviation from an ideally linear sawtooth ramp at null
CCOR
(Sad0A at x1000000b). The same rate applies to V-drive signal on VOut pin.
SCOR
Note 13: Maximum
Note 14: Null
Note 15:”t
SCOR
” istime from thebeginning of vertical ramp of V-drive signal on VOut pin.”TVR” isduration of this ramp, see
VR
(Sad09 at x1111111b), null
(Sad09 at x0000000b).
CCOR
(Sad0A at x1000000b).
chapter TYPICAL OUTPUT WAVEFORMSand Figure 19.
Note 16: V
VOamp
= V
VOT-VVOB
Note 17: The same rate applies to V-drive signal on VOut pin.
Note 18: Informative, not tested on each unit.
6.6 EW DRIVE SECTION
VCC= 12V, T
Symbol Parameter Test Conditions
V
EW
I
EWOut
V
HEHT
V
EW-DC
V
∆
EW DC–
-----------------------------
∆
V
HEH T
V
∆
EW DC–
-------------------------------------
V
EW DC–
V
EW-PCC
V
EW PCC–
--------------------------------------------------------
EW PC C–
tvrTVR=[]
=25°C
amb
Output voltage on EWOut pin 1.8 6.5 V
Current sourced by EWOut out-
put
Control voltage range on HEH-
TIn pin
DC component of the EW-drive
signal on EWOut pin
Breathing compensation on
V
Temperature drift of DC component of the EW-drive signal on
T∆⋅
EWOut pin
Pin cushion correction component of the EW-drive signal on
EWOut pin
tvr0=[]
Tracking of PCC component of
the EW-drive signalwith vertical
position adjustment
EW-DC
(19)(20)(21)(28)
tVR=1/2 T
HSIZE
VR
(Sad10h):
00000000b
10000000b
11111111b
(19)((20)
tVR=1/2 T
V
HEHT>VRefO
V
HEHT
(18)(19)(21)(28)
tVR=1/2T
(19)(21)(22)(23)(24)(28)
VSIZE
PCC
VR
(min)≤V
VR
at maximum
(Sad0C):
x0000000b
x1000000b
x1111111b
Tracking with
PCC
at x1000000b
VSIZE
(Sad07):
x0000000b
x1000000b
(19)(22)(25)(27)(28)
PCC
at x1111111b
VPOS
(Sad08):
x0000000b
x1111111b
SCOR
(15)
(15)
HEHT≤VRefO
(15)
VSIZE
(Sad09 at x0000000b) and null
Value
Min. Typ. Max.
-1.5 0 mA
1 V
2
3.25
4.5
0
-0.125
100 ppm/°C
0
0.7
1.5
:
0.25
0.5
0.52
1.92
RefO
Units
V
V
V
V
V/V
V/V
V
V
V
V
V
12/45
TDA9115
Symbol Parameter Test Conditions
Value
Units
Min. Typ. Max.
Keystone correction component
V
EW-Key
V
∆
-------------------------------------------------------- -
VEWf
-----------------------------------------------------
V
EW AC–
Note 19:
Note 20:
Note 21:
Note 22:
EW
⋅
[]
max
V
∆
EW AC–
V
∆⋅
KEYST
PCC
VPOS
HSIZE
∆
HEHT
at minimum value.
of the EW-drive signal on
EWOut pin
Tracking of EW-drive signal with
horizontal frequency
V
HO
Breathing compensation on
(29)
V
EW-AC
at medium (neutral) value.
at medium (neutral) value.
at minimum value.
Note 23: Defined as difference of (voltage at t
Note 24: Defined as difference of (voltage at t
Note 25:
Note 26: Difference: (voltage at t
VSIZE
at maximum value.
=0) minus (voltage at tVR=TVR).
VR
(30)
=0) minus (voltage at tVR=1/2 TVR).
VR
VR=TVR
(20)(21)(22)(25)(26)(28)
KEYST
(Sad0D):
x0000000b
x1111111b
VHO>V
HOThrfr
VHO(min)≤VHO≤V
(23)(24)
V
HEHT>VRefO
V
(min)
HEHT
HOThrfr
V
≤
HEHT≤VRefO
) minus (voltage at tVR=1/2 TVR).
0.4
-0.4
0
20
0
1.75
Note 27: Ratio ”A/B”of parabola component voltage at tVR=0 versus parabola component voltage at tVR=TVR.
See Figure 2.
Note 28: V
Note 29: V
HEHT>VRefO
EW-AC
, V
VEHT>VRefO
is the sum ofall components other than V
(contribution of PCC and keystone correction).
EW-DC
Note 30: More precisely tracking with voltage on HPLL1F pin which itself depends on frequency at a rate given by
external components on PLL1 pins. V
[fmax] is the value at condition VHO>V
EW
HOThrfr
.
V
V
%/V
%/V
%/V
%/V
13/45
TDA9115
6.7 DYNAMIC CORRECTION OUTPUTS SECTION
VCC= 12V, T
Symbol Parameter Test Conditions
Vertical Dynamic Correction output VDyCor
I
VDyCor
V
VD-DC
IV
VD-V
V
VD V–tvr
------------------------------------------------- -
V
VD V–tvrTVR
Note 31: Ratio ”A/B”of vertical parabola component voltage at tVR=0 versus vertical parabola component voltage at
t
VR=TVR
=25°C
amb
Current sunk from VDyCor output -1.5 -0.1 mA
DC component of the drive signal
on VDyCor output
I
=[]
Amplitude ofV-parabola on VDyCor output
0=[]
Tracking of V-parabola on VDyCor
output with vertical position
.
(21)
(31)
R
L(VDyCor)
VSIZE
at medium
VDC-AMP
xxxxxx00
xxxxxx01
xxxxxx10
xxxxxx11
VDC-AMP
VSIZE
(Sad07):
x0000000b
x1111111b
VDC-AMP
VPOS
(Sad08):
x0000000b
x1111111b
Value
Min. Typ. Max.
=10kΩ 4V
(Sad15h):
0.25
0.50
0.75
1.00
at maximum
0.6
1.6
at maximum
0.52
1.92
Units
V
V
V
V
V
V
14/45
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