SGS Thomson Microelectronics TDA9111 Datasheet
TDA9111
LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR
FOR MULTISYNC MONITOR
FEATURES
General
■ SYNC PROCESSOR (separate or composite)
■ 12V SUPPLY VOLTAGE
■ 8V REFERENCE VOLTAGE
■ HOR. LOCK/UNLOCK OUTPUT
■ HOR. & VERT. LOCK/UNLOCK INDICATION
■ READ/WRITE I
■ HORIZONTAL AND VERTICAL MOIRE
■ B+ REGULATOR
2
C INTERFACE
- Internal PWM generator for B+ current mode
step-up converter
- Switchable to step-down converter
-I2C adjustable B+ reference voltage
- Output pulses synchronized on horizontal
frequency
- Internal maximum current limitation.
Horizontal
■ Self-adaptative
■ Dual PLL concept
■ 150kHz maximum frequency
■ X-Ray protection input
2
■ I
C controls: Horizontal duty-cycle, H-position,
horizontal size amplitude
Vertical
■ Vertical ramp generator
■ 50 to 185Hz AGC loop
■ Geometry tracking with VPOS & VAMP
2
■ I
C controls:
VAMP, VPOS, S-CORR, C-CORR
■ DC breathing compensation
I2C Geometry corrections
■ Vertical parabolagenerator (Pin Cushion - E/W,
Keystone, Corner Correction)
■ Horizontal dynamic phase (Side Pin Balance &
Parallelogram)
■ Horizontal and vertical dynamic focus
(Horizontal Focus Amplitude, Horizontal Focus
Symmetry, Vertical Focus Amplitude)
DESCRIPTION
The TDA9111 is a monolithic integrated circuit assembled in a 32-pin shrink dual-in-line plastic
package. This IC controls all the functions related
to horizontal and vertical deflection in multimode
or multi-frequency computer display monitors.
The internal sync processor, combined with the
powerful geometry correction block, makes the
TDA9111 suitable for very high performance monitors, using few external components.
The horizontal jitter level is very low. It is particularly well-suited to high-end 15” and 17” monitors.
Combined with the ST7275 Microcontroller family,
TDA9206 (Video preamplifier) and STV942x (OnScreen Display controller), the TDA9111 allows
fully-I2C bus-controlled computer display monitors
to be built witha reduced number of external components.
SHRINK32 (Plastic Package)
ORDER CODE: TDA9111
PIN CONNECTIONS
H/HVIN
VSYNCIN
HMOIRE/HLOCK
PLL2C
C0
R0
PLL1F
HPOSITION
HFOCUSCAP
FOCUS-OUT
HGND
HFLY
HREF
COMP
REGIN
I
SENSE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
5V
SDA
SCL
V
CC
BOUT
GND
HOUT
XRAY
EWOUT
VOUT
VCAP
V
REF
VAGCCAP
VGND
VBREATH
B + GND
Version 4.2
June 2000 1/43
1
TABLE OF CONTENTS
PIN CONNECTIONS ......................................................................3
QUICK REFERENCE DATA ......................................................................4
BLOCK DIAGRAM ......................................................................5
ABSOLUTE MAXIMUM RATINGS ......................................................................6
THERMAL DATA ......................................................................6
SUPPLY AND REFERENCE VOLTAGES ......................................................................6
I2C READ/WRITE ......................................................................7
SYNC PROCESSOR ......................................................................7
HORIZONTAL SECTION ......................................................................8
VERTICAL SECTION ......................................................................10
DYNAMIC FOCUS SECTION ......................................................................11
GEOMETRY CONTROL SECTION ......................................................................12
MOIRE CANCELLATION SECTION ......................................................................13
B+ SECTION ......................................................................14
TYPICAL OUTPUTWAVEFORMS ......................................................................16
I2C BUS ADDRESS TABLE ......................................................................20
OPERATING DESCRIPTION ......................................................................23
1 GENERAL CONSIDERATIONS . . . . . . . . . . . . . . . .............................. 23
1.1 Power Supply . . . . . . . ............................................... 23
1.2 I2C Control . . .. . . . . . . . . . . . . . . . . . . . ................................. 23
1.3 Write Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ........ 23
1.4 Read Mode ....................................................... 23
1.5 Sync Processor . . . . . ...............................................23
1.6 Sync Identification Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . 23
1.7 IC status . . . . . . . . . . . . . . . . . . . . . . . . . . . . .............................. 24
1.8 Sync Inputs . . . .................................................... 24
1.9 Sync Processor Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . 24
2 HORIZONTAL PART . . . . . . ...............................................24
2.1 Internal Input Conditions . . ...........................................24
2.2 PLL1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . ................................. 25
2.3 PLL2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . ................................. 27
2.4 Output Section . . . . . . . . . . . . . ........................................27
2.5 X-RAY Protection . . . . . . . . . . . . . . . . . ..................................27
2.6 Horizontal and Vertical Dynamic Focus . . . . . . . . . . . . . . . . . . . . . . . ...........28
2.7 Horizontal Moiré Output . . . . . . . . . . . . .................................. 29
3 VERTICAL PART . . . . . . . . . . . . . ...........................................30
3.1 Function . . . . . . .................................................... 30
3.2 I2C Control Adjustments . . . . . . . . . .................................... 30
3.3 Vertical Moiré . . . . . . . ............................................... 30
3.4 Basic Equations .................................................... 31
3.5 Geometric Corrections . . . . ........................................... 31
3.6 E/W ............................................................. 32
3.7 Dynamic Horizontal Phase Control . . . . . ................................ 33
4 DC/DC CONVERTER PART . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.1 Step-up Mode . . . . . . . . . . . . . . . . . . .. . . . . . . ........................... 33
4.2 Step-down Mode . . . . . . . . . . . . . . . . . . . ................................ 33
4.3 Step-up and Step-down Mode Comparison . . . . . . . . . . . .................... 33
INTERNAL SCHEMATICS ......................................................................35
PACKAGE MECHANICAL DATA ......................................................................42
2
2/43
PIN CONNECTIONS
Pin Name Function
1 H/HVIN TTL compatible Horizontal sync Input (separate or composite)
2 VSYNCIN TTL compatible Vertical sync Input (for separated H&V)
3 HMOIRE/
HLOCK
4 PLL2C Second PLL Loop Filter
5 C0 Horizontal Oscillator Capacitor
6 R0 Horizontal Oscillator Resistor
7 PLL1F First PLL Loop Filter
8 HPOSITION Horizontal Position Filter (capacitor to be connected to HGND)
9
HFOCUS-
CAP
10 FOCUS OUT Mixed Horizontal and Vertical Dynamic Focus Output
11 HGND Horizontal Section Ground
12 HFLY Horizontal Flyback Input (positive polarity)
13 HREF Horizontal Section Reference Voltage (to be filtered)
14 COMP B+ Error Amplifier Output for frequency compensation and gain setting
15 REGIN Feedback Input of B+ control loop
16 I
SENSE
17 B+GND Ground (related to B+reference)
18 VBREATH V Breathing Input Control (compensation of vertical amplitude against EHV variation)
19 VGND Vertical Section Ground
20 VAGCCAP Memory Capacitor for Automatic Gain Control in Vertical Ramp Generator
21 V
REF
22 VCAP Vertical Sawtooth Generator Capacitor
23 VOUT Vertical Ramp Output (with frequency-independent amplitude and S or C Corrections
24 EWOUT Pin Cushion (E/W)Correction Parabola Output
25 XRAY X-RAY protection input (with internal latch function)
26 HOUT Horizontal Drive Output(open collector)
27 GND General Ground
28 BOUT B+ PWM Regulator Output
29 V
CC
30 SCL I
31 SDA I
32 5V 5V Supply Voltage
Horizontal Moiré Output (to be connected to PLL2C through a resistor divider), HLock
Output
Horizontal Dynamic Focus Oscillator Capacitor
Sensing of external B+ switching transistor current, or switch for step-down converter
Vertical Section Reference Voltage (to be filtered)
if any). It is mixed with vertical position voltage and vertical moiré.
Supply Voltage(12V typ) (referenced to Pin 27)
2
C Clock Input
2
C Data Input
TDA9111
3/43
TDA9111
QUICK REFERENCE DATA
Parameter Value Unit
Any polarity on H Sync & V Sync inputs YES
TTL or composite Syncs YES
Sync on Green NO
Horizontal Frequency 15 to 150 kHz
Horizontal Autosync Range (for given R0 and C0. Can be easily increased by application) 1 to 4.5 f0
Control of free-running frequency NO
Frequency Generator for Burn-in NO
2
Control of H-Position through I
Control for H-Duty Cycle through I
PLL1 Inhibition Possibility NO
Output for Horizontal Lock/Unlock YES
Dual Polarity H-Drive Outputs NO
Vertical Frequency 35 to 200 Hz
Vertical Autosync Range (for 150nF on Pin 22 and 470nF on Pin 20) 50 to 185 Hz
Vertical S-Correction (adapted to normal or super flat tube), controlled through I
Vertical C-Correction, controlled through I
Control of Vertical Amplitude through I
Control of Vertical Position through I
Input for Vertical Amplitude compensation versus EHV YES
E/W Correction Output (also known as Pin Cushion Output) YES
Horizontal Size Adjustment through I
Control of E/W (Pincushion) Adjustment through I
Control of Keystone (Trapezoïd) Adjustment through I
Control of Corner Adjustment through I
Fully integrated Dynamic Horizontal Phase Control YES
Control of Side Pin Balance through I
Control of Parallelogram through I
H/V composite Dynamic Focus Output YES
Control of Horizontal Dynamic Focus Amplitude through I
Control of Horizontal Dynamic Focus Symmetry through I
Control of Vertical Dynamic Focus Amplitude through I
Tracking ofGeometricCorrections andof Vertical focus with Vertical Amplitude and Position YES
Control of Horizontal and Vertical Moiré cancellations through I
Optimisation of HMoiré frequency through I
B+ Regulation, adjustable through I
Stand-by function, disabling H and V scanning and B+ YES
X-Ray protection, disabling H scanning and B+ YES
Blanking Outputs NO
2
C Read/Write 400 kHz
Fast I
2
C indication of the presence of Syncs (biased from 5V alone) YES
I
2
C indication of the polarity and Type of Syncs YES
I
2
C indication of Lock/Unlock, for both Horizontal and Vertical sections YES
I
C YES
2
C30to65%
2
C YES
2
C YES
2
C YES
2
C YES
2
C control of E/W Output DC level YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
2
C YES
4/43
H/HVIN
V
SYNCIN
HMOIRE
/HLOCK
SDA
SCL
GND
5V
SyncInput
1
2
VSYNC HFLY
HorizontalMoire
3
7 bits+ON/OFF
31
30
27
32
Select
(1bit)
Generator
+Frequency
2
C Interface
I
PLL1F POSITION R0 C0 HFLY PLL2C HOUT
7 8 6 5 12 4 26
Phase/Frequency
Comparator
H-Phase(7bits)
Sync
Processor
VCO
Lock/Unlock
Identification
Phase
Comparator
SPinbal
7bits
2
x
Phase
Shifter
H-Duty
(7bits)
Processor
B+
Controller
x
Parallelogram
7bits
VDFAMP
7bits
2
4
2
x
x
Amp,
Symmetry
2x7bits
7 bits
SandC
Correction
7 bits
Vertical
Oscillator
RampGenerator
VAMP
7bits
Geometry
Tracking
E/Wpcc
7bits
Keyst.
7 bits
Corner
7bits
x
x
Hout
Buffer
Safety
reference
+
5V
Internal
(7bits)
2
x
HSize
DC
7 bits
11
19
17
29
25
28
16
14
15
10
9
24
BLOCK DIAGRAM
HGND
VGND
GND
VCC
XRAY
B+OUT
ISENSE
COMP
REGIN
FOCUS
HFOCUSCAP
EWOUT
5/43
HREF
VREF
13
21
OUT
VerticalMoire
Cancel
7bits+ON/OFF
VSYNC
TDA9111
TDA9111
H
ref
V
ref
VPOS
7bits
23182022
V
CAP
AGCCAP
VBREATHV
V
TDA9111
ABSOLUTE MAXIMUMRATINGS
Symbol Parameter Value Unit
V
CC
V
DD
V
IN
VESD
T
stg
T
j
T
oper
Supply Voltage (Pin 29) 13.5 V
Supply Voltage (Pin 32) 5.7 V
Max Voltage on Pin 4
Pin 9
Pin 5
Pins 6, 7, 8, 14, 15, 16, 20, 22
Pins 3, 10, 18, 23, 24, 25, 26, 28
Pins 1, 2
Pins 30, 31
ESD susceptibility Human Body Model, 100pF Discharge
through 1.5kΩ
EIAJ Norm, 200pF Discharge through 0Ω
4.0
5.5
6.4
8.0
V
V
300
CC
DD
5
2
Storage Temperature -40, +150 °C
Junction Temperature +150 °C
Operating Temperature 0, +70 °C
THERMAL DATA
Symbol Parameter Value Unit
R
th(j-a)
Max. Junction-Ambient Thermal Resistance 65 °C/W
V
V
V
V
V
V
V
kV
V
SUPPLY AND REFERENCE VOLTAGES
Electrical Characteristics (VCC= 12V,T
Symbol Parameter Test Conditions Min. Typ. Max. Units
V
V
I
I
V
REF-H
V
REF-V
I
REF-H
I
REF-V
CC
DD
CC
DD
Supply Voltage Pin 29 10.8 12 13.2 V
Supply Voltage Pin 32 4.5 5 5.5 V
Supply Current Pin 29 50 mA
Supply Current Pin 32 5 mA
Horizontal Reference Voltage Pin 13, I = -2mA 7.6 8.2 8.8 V
Vertical Reference Voltage Pin 21, I = -2mA 7.6 8.2 8.8 V
Max. Sourced Current on V
Max. Sourced Current on V
amb
REF-H
REF-V
=25°C
Pin 13 5 mA
Pin 21 5 mA
6/43
I2C READ/WRITE
TDA9111
Electrical Characteristics (VDD= 5V, T
Symbol Parameter Test Conditions Min. Typ. Max. Units
2
C PROCESSOR
I
Fscl Maximum Clock Frequency Pin 30 400 kHz
Tlow Low period of the SCL Clock Pin 30 1.3 µs
Thigh High period of the SCL Clock Pin 30 0.6 µs
Vinth SDA and SCL Input Threshold Pins 30, 31 2.2 V
VACK
2
C leak
I
Note: 1 See also I2C Sub Address Table.
(1)
Acknowledged Output Voltage on SDA
input with 3mA
Leakage current into SDA and SCL with
no logic supply
amb
=25°C)
Pin 31 0.4 V
V
=0
DD
Pins 30, 31 = 5 V
20 µA
SYNC PROCESSOR
Operating Conditions (VDD= 5V, VCC= 12V, T
Symbol Parameter Test Conditions Min. Typ. Max. Units
HSVR Voltage on H/HVIN Input Pin 1 0 5 V
MinD
Mduty
VSVR Voltage on VSYNCIN Pin 2 0 5 V
VSW Minimum Vertical Sync Pulse Width Pin 2 5 µs
VSmD Maximum Vertical Sync Input Duty Cycle Pin 2 15 %
VextM
Minimum Horizontal Input Pulses Duration
Maximum Horizontal Input Signal Duty
Cycle
Maximum Vertical Sync Width on TTL H/
Vcomposite
Electrical Characteristics (VDD= 5V, VCC= 12V, T
Symbol Parameter Test Conditions Min. Typ. Max. Units
VINTH
RIN Horizontal and Vertical Pull-Up Resistor Pins 1, 2 250 kΩ
VoutT
Note: 2 THis the horizontal period.
Horizontal and Vertical Input Logic Level
(Pins 1, 2)
Extracted Vsync Integration Time (% of
) on H/VComposite
T
H
(2)
=25°C)
amb
Pin 1 0.7 µs
Pin 1 25 %
Pin 1 750 µs
=25°C)
amb
High Level
Low Level
C0 = 820pF 26 35 %
2.2
0.8
V
V
7/43
TDA9111
HORIZONTAL SECTION
Operating Conditions
Symbol Parameter Test Conditions Min. Typ. Max. Units
VCO
I
0max
F(max.) Maximum Oscillator Frequency 150 kHz
OUTPUT SECTION
I12m Maximum Input Peak Current Pin 12 5 mA
HOI
Electrical Characteristics (VCC= 12V,T
Symbol Parameter Test Conditions Min. Typ. Max. Units
1st PLL SECTION
HpoIT
Vvco VCO Control Voltage (Pin 7)
Vcog VCO Gain (Pin 7)
Hph Horizontal Phase Adjustment
Vbmi
Vbtyp
Vbmax
IPII1U
IPII1L
f
o
dfo/dT Free Running Frequency Thermal Drift
CR PLL1 Capture Range
HUnlock
Max Current from Pin 6 Pin 6 1.5 mA
Horizontal Drive Output Maximum Current
amb
Delay Time for detecting polarity
(3)
change
(4)
Horizontal Phase Setting Value (Pin 8)
Minimum Value
Typical Value
Maximum Value
PLL1 Filter Charge Current
Pin 26, Sunk current 30 mA
=25°C)
Pin 1 0.75 ms
= 8.2V
V
REF-H
f
H=f0
fH=fH(Max.)
= 6.49kΩ,
R
0
= 820pF
C
0
% of Horizontal
Period
(4)
Sub-Address 01
Byte x1111111
Byte x1000000
Byte x0000000
PLL1 is Unlocked
PLL1 is Locked
Tbd 15.9 Tbd kHz/V
1.4
6.4
±10 %
2.9
3.5
4.2
±140
±1
Free Running Frequency R0= 6.49kΩ,C0= 820pF Tbd 22.8 Tbd kHz
Not including external
(5)
componant drift
fH(Min.)
fH(Max.)
(6)
-150 ppm/C
fo+0.5
4.5f
o
Sub-address 02
DC level pin 3 when PLL1 is
unlocked
1xxx xxxx
0000 0000
0111 1111
(7)
6
0.3
2.75 3
V
V
V
V
V
µA
mA
kHz
kHz
V
V
V
8/43
TDA9111
Symbol Parameter Test Conditions Min. Typ. Max. Units
2nd PLL SECTION AND HORIZONTAL OUTPUT SECTION
FBth Flyback Input Threshold Voltage (Pin 12) 0.65 0.75 V
Hjit Horizontal Jitter
HDmin
HDmax
XRAYth
Vphi2
Horizontal Drive Output Duty-Cycle (Pin
(9)
26)
X-RAY Protection Input Threshold Volt-
age,
Internal Clamping Levels on 2nd PLL
Loop Filter (Pin 4)
(8)
Inhibition threshold (The condition V
VSCinh
VSCinh willstop H-Out, V-Out, B-Out and
reset X-RAY)
HDvd Horizontal Drive Output (low level) Pin 26, I
Note: 3 This delay is necessary to avoid a wrong detection of polarity change in the case of a composite sync.
4 See Figure 10 for explanation of reference phase.
5 These parameters are not tested on each unit. They are measured during our internal qualification.
6 A larger range may be obtained by application.
7 When at 0xxx xxxx, (HMoiré/HLock not selected), Pin 3 is a DAC with 0.3...2.75V range. When at 1xxx xxxx
(HMoiré/HLock selected) and PLL1 is locked, Pin 3 provides the waveform for HMoiré. See also Moiré
section.
8 Hjit = 10
6
x(Standard deviation/Horizontal period).
9 Duty Cycle is the ratio between the output transistor OFF time and the period. The scanning transistor is
controlled OFF when the output transistor is OFF.
10 Initial Condition for Safe Start Up.
At 31.4kHz 70 ppm
Sub-Address 00
Byte x1111111
Byte x0000000
(10)
30
65
Pin 25, (see fig. 14) 7.6 8.2 8.8 V
CC
Low Level
High Level
<
1.6
4.2
Pin 29 7.5 V
= 30mA 0.4 V
OUT
%
%
V
V
9/43
TDA9111
VERTICAL SECTION
OperatingConditions
Symbol Parameter Test Conditions Min. Typ. Max. Units
R
LOAD
Electrical Characteristics (VCC= 12V,T
Symbol Parameter Test Conditions Min. Typ. Max. Units
VRB Voltage at Ramp Bottom Point Pin 22 2.1 V
VRT Voltage at Ramp Top Point (with Sync) Pin 22 5.1 V
VRTF
VSTD Vertical Sawtooth Discharge Time Pin 22, C
VFRF Vertical FreeRunning Frequency
ASFR AUTO-SYNC Frequency
RAFD
Rlin Ramp Linearity on Pin 22
VPOS
VOR
VOI
dVS
Ccorr
BRRANG DC Breathing Control Range
BRADj
Note: 11 These parameters are not tested on each unit. They are measured during our internal qualification procedure.
Note: 12 Set Register 07 at Byte 0xxxxxxx (S correction inhibited) and Register 08 at Byte 0xxxxxxx (C correction
Note: 13 This is the frequency range for which the vertical oscillator will automatically synchronize, using a single
Note: 14 When not used, the DC breathing control pin must be connected to 12V.
Minimum Load for less than 1% Vertical
Amplitude Drift
amb
Voltage at Ramp Top Point (without
Sync)
(12)
(13)
Ramp Amplitude Drift Versus Frequency
at Maximum Vertical Amplitude
(11)
(12)
Pin 20 65 MΩ
=25°C)
Pin 22
= 150nF 70 µs
22
Pin 22, C22= 150nF 100 Hz
C22= 150nF ±5% 50 185 Hz
C22= 150nF
50Hz< f < 185Hz
2.5V < V27< 4.5V 0.5 %
Sub Address 06
Vertical Position Adjustment Voltage (Pin
23 - VOUT mean value)
Byte 00000000
Byte 01000000
Byte 01111111 Tbd
Sub Address 05
Vertical Output Voltage
(peak-to-peak on Pin 23)
Byte 10000000
Byte 11000000
Byte 11111111 Tbd
Vertical Output Maximum Current
(Pin 23)
Max Vertical S-Correction Amplitude (TV
is the vertical period)
(0xxxxxxx inhibits S-CORR
11111111 gives max S-CORR)
Sub Address 07
Byte 11111111
∆V/V
∆V/V
at TV/4
PP
at 3TV/4
PP
Sub Address 08
Vertical C-Corr Amplitude
(0xxxxxxx inhibits C-CORR)
∆V/V
Byte 10000000
Byte 11000000
PP
at TV/2
Byte 11111111
(14)
Vertical Output Variation versus DC
Breathing Control (Pin 23)
V
18
V
18>VREF-V
1V<V18< V
REF-V
inhibited), to obtain a vertical sawtooth with linear shape.
capacitor value on Pin22 and Pin 20, and with a constant ramp amplitude.
VRT-
0.1
200
3.2
3.6
4.0
2.15
3.0
3.9
Tbd V
Tbd V
V
ppm/
Hz
V
V
V
V
±5mA
-3.5
+3.5
-3
0
+3
%
%
%
%
%
112V
0
-2.5
%/V
%/V
10/43
DYNAMIC FOCUS SECTION
TDA9111
Electrical Characteristics (VCC= 12V, T
amb
=25°C)
Symbol Parameter Test Conditions Min. Typ. Max. Units
HORIZONTAL DYNAMIC FOCUS FUNCTION (seeFigure 15 on page 29)
HDFst
HDFdis
Horizontal Dynamic Focus Sawtooth
Minimum Level
Maximum Level
Horizontal Dynamic Focus Sawtooth Discharge Width
Pin 9, capacitor on HFOCUSCAP and
C0 = 820pF, T
=20µs
H
2.2
4.9
Triggered by HDFstart 400 ns
Internal Phase Advance versus HFLY
HDFstart
middle
1 µs
(Independent of frequency)
HDFDC Bottom DC Output Level
TDFHD DC Output Voltage Thermal Drift
Horizontal Dynamic Focus
Amplitude
HDFamp
Max Byte
Typ Byte
Max Byte
Horizontal Dynamic FocusSymmetry
HDFKeyst
(For time reference, see Figure 15 )
Advance for Byte
Delay for Byte
LOAD
Pin 10
(11)
Sub-Address 03,
Pin 10, fH = 50kHz,
Symmetric Wave Form
x1111111
x1000000
x0000000
Subaddress 04
x1111111 (decimal 127)
x0000000 (decimal 0)
2.1 V
200 ppm/C
1
1.5
3.5
16
16
= 10kΩ,
R
VERTICAL DYNAMIC FOCUS FUNCTION (see Figure 1)
Sub-Address 0F
Min Byte x0000000
Typ Byte x1000000
Max Byte x1111111
Sub-Address 05
Byte x0000000
Byte x1000000
Byte x1111111
Sub-Address 06
0
0.5
1
0.6
1
1.5
AMPVDF
VDFAMP
Vertical Dynamic Focus Parabola (added
to horizontal) Amplitude with VAMP and
VPOS Typical
Parabola Amplitude Function of VAMP
(tracking between VAMP and VDF) with
VPOS Typ. (seeFigure 1 on page 15 and
(15)
)
Parabola Asymmetry Function of VPOS
Control (tracking between VPOSand
VHDFKeyt
VDF) with VAMP Max.
B/A Ratio
A/B Ratio
Byte x0000000
Byte x1111111
0.52
0.52
Note: 15 S and C correction are inhibited to obtain a linear vertical sawtooth.
V
V
V
PP
V
PP
V
PP
%
%
V
PP
V
PP
V
PP
V
PP
V
PP
V
PP
11/43
TDA9111
GEOMETRY CONTROL SECTION
Electrical Characteristics (VCC= 12V,T
amb
=25°C)
Symbol Parameter Test Conditions Min. Typ. Max. Units
SYMMETRIC CONTROL THROUGH E/W OUTPUT (see Figure 2 on page 15 and Figure 4 on page 15)
VEWM Maximum E/W Output Voltage Pin 24 6.5 V
VEWm Minimum E/W Output Voltage Pin 24 1.8 V
EW
DC
TDEW
DC
EWpara
EWtrack
KeyAdj
EW Corner
For control of Horizontal size. DC Output
Voltage with E/W, corner and Keystone
inhibited
DC Output Voltage Thermal Drift See
Parabola Amplitude with Max. VAMP,
Typ. VPOS, Keystone and Corner inhibited
Parabola Amplitude Function of VAMP
Control (tracking between VAMP and E/
W) with Typ.VPOS, Typ. E/WAmplitude,
corner and Keystone inhibited
(17)
Keystone Adjustment Capability with
Typ. VPOS, E/Winhibited, Corner inhibited and Max. Vert. Amplitude (see
(17)
Figure 4)
Corner Adjustment Capability with Typ.
VPOS, E/Winhibited, Keystone inhibited
and Max. Vertical Amplitude
Intrinsic Keystone Function of VPOS
Pin 24, see Figure 2
Subaddress 11
Byte x0000000
Byte x1000000
Byte x1111111
(16)
Subaddress 0A
Byte 11111111
Byte 11000000
Byte 10000000
Subaddress 05
Byte 10000000
Byte 11000000
Byte 11111111
Subaddress 09
Byte 10000000
and
Byte 11111111
Subaddress 10
Byte 11111111
Byte 11000000
Byte 10000000
Subaddress 06
2
3.25
4.2
V
V
V
100 ppm/C
1.4
0.7
0
0.2
0.4
0.7
0.4
0.4
+1.25
0
−1.25
V
V
V
V
V
V
V
V
V
V
V
Control (tracking between VPOS and E/
KeyTrack
W) with Max. E/W Amplitude and Max.
Vertical Amplitude, Corner inhibited
B/A Ratio
A/B Ratio
Byte 00000000
Byte 01111111
0.52
0.52
ASYMMETRIC CONTROL THROUGH INTERNAL DYNAMIC HORIZONTAL PHASE MODULATION (see Figure 3)
Subaddress 0D
Byte 11111111
Byte 10000000
Subaddress 05
Byte 10000000
Byte 11000000
Byte 11111111
Subaddress 0E
Byte 11111111
Byte 11000000
Subaddress 06
+2.8
-2.8
1
1.8
2.8
+2.8
-2.8
%T
%T
%T
%T
%T
%T
%T
SPBpara
SPBtrack
ParAdj
Side Pin Balance Parabola Amplitude
(Figure 3) with Max. VAMP, Typ. VPOS
and Parallelogram inhibited
(17 & 18)
Side Pin Balance Parabola Amplitude
function of VAMP Control (tracking between VAMP and SPB) with Max. SPB,
Typ. VPOS and Parallelogram inhibited
(17 & 18)
Parallelogram Adjustment Capability with
Max. VAMP, Typ. VPOS andSPB inhibit-
(17 & 18)
ed
Intrinsic Parallelogram Function ofVPOS
Control (tracking between VPOS and
Partrack
DHPC) with Max. VAMP, Max. SPB and
Parallelogram inhibited
(17 & 18)
B/A Ratio
A/B Ratio
Byte x0000000
Byte x1111111
0.52
0.52
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
H
H
H
H
H
H
H
12/43
TDA9111
Note: 16 These parameters arenot tested on each unit. They are measured during our internal qualification procedure.
Note: 17 With Register 07 at Byte 0xxxxxxx (S correction inhibited) and Register 08 at Byte0xxxxxxx (C correction
inhibited), the sawtooth has a linear shape.
MOIRE CANCELLATION SECTION
Electrical Characteristics (VCC= 12V, T
Symbol Parameter Test Conditions Min. Typ. Max. Units
HORIZONTAL AND VERTICAL MOIRE
R
MOIRE
DacOut
HMOIRE
T
HMOIRE
VMOIRE
Note: 18 THis the horizontal period.
Minimum Output Resistor to GND Pin 3 4.7 kΩ
DC Voltage pin 3
DAC configuration
Moiré pulse (See also Hunlock in 1st PLL
section)
H Frequency: Locked
HMoiré pulse period pin 3
H Frequency: Locked
Vertical Moiré
(measured on VOUT: Pin 23)
amb
=25°C)
R
sub-address 02
Byte 00000000
Byte 01000000
Byte 01111111
R
Sub-address 02
Byte 10000000
Byte 11000000
Byte 11111111
Sub-address II:
0xxx xxxx
1xxx xxxx
Sub-address 0C
Byte 11111111 6 mV
MOIRE
MOIRE
=4.7kΩ
0.3
1.1
2.75 3
=4.7kΩ
0
0.8
2.2
4.T
2.T
V
V
V
V
PP
V
PP
V
PP
H
H
13/43
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