SGS Thomson Microelectronics TDA9110 Datasheet

TDA9110

LOW-COST DEFLECTIONPROCESSOR

FOR MULTISYNC MONITORS

PRODUCT PREVIEW

HORIZONTAL

EXTREMELY LOWJITTERLEVEL

SELF-ADAPTATIVE

DUALPLL CONCEPT

150kHzMAXIMUM FREQUENCY

X-RAYPROTECTION INPUT

I2C CONTROLS : HORIZONTAL DUTY-CYCLE, H-POSITION

VERTICAL

VERTICALRAMPGENERATOR

50 TO 165Hz AGC LOOP

GEOMETRYTRACKING WITH V-POS & AMP

I2C CONTROLS: V-AMP,V-POS, S-CORR, C-CORR

DC BREATHINGCOMPENSATION

C GEOMETRYCORRECTIONS

VERTICALPARABOLAGENERATOR (Pincushion,Keystone)

HORIZONTALSIZE CONTROL (Amplitude)

HORIZONTALDYNAMICPHASE (SidePin Balance & Parallelogram)

HORIZONTALAND VERTICALDYNAMIC FOCUS (Horizontal Focus Amplitude, Horizontal FocusSymmetry, VerticalFocus Amplitude)

GENERAL

SYNCHROPROCESSOR

12V SUPPLYVOLTAGE

8V REFERENCE VOLTAGE

HOR.& VERT. LOCKUNLOCK OUTPUTS

READ/WRITE I2C INTERFACE

HORIZONTALAND VERTICALMOIRE

DESCRIPTION

The TDA9110 is a monolithicintegrated circuit assembledin 32-pin shrunkdual in line plasticpackage.This IC controlsall thefunctionsrelatedto the horizontal and vertical deflection in multimode or multi-frequencycomputerdisplaymonitors.

Theinternalsynchroprocessor, combinedwith the very powerful geometrycorrectionblock make the TDA9110suitablefor very high performancemonitorswith very few externalcomponents.

Thehorizontal jitter level is extremelylow.(Typical standarddeviation : 300ps @ 31kHz).

Itisparticularlywellsuitedforhigh-end15” and 17” monitors.

Combined with ST7275 Microcontroller family, TDA9206 (Video preamplifier) and STV942x (On-Screen Display controller) the TDA9110 allows to built fully I display monitors, with a reduce number of external components.

ORDER CODE :

PIN CONNECTIONS

H/HVIN

VSYNC-IN

HMOIRE

HLOCKOUT

PLL2C

FC1

C0 R0

PLL1F

HPOS

HGND

HFLY

HREF

HLOCKCAP

HVFOCUS

HFOCUSCAP

C bus controlled computer

SHRINK32

(Plastic Package)

TDA9110

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

5V SDA SCL V

HSIZE GND HOUT XRAY EWOUT VOUT VCAP V

REF

VAGCCAP VGND DCBREATH GND

9110-01.EPS

December 1997

This isadvance information on a new product now in development or undergoingevaluation. Detailsare subject to change without notice.

1/29

TDA9110

PIN CONNECTIONS

Pin Name Function

1 H/HVIN TTL compatible Horizontal Synchro Input 2 VSYNCIN TTL compatible Vertical Synchro Input (for separated H&V) 3 HMOIRE Horizontal Moire Output (to be connected to PLL2C through a resistordivider) 4 HLOCKOUT First PLL Lock/Unlock Output (0V unlocked -5V locked) 5 PLL2C Second PLL Loop Filter 6 FC1 High Threshold VCO Decoupling Filter 7 C0 Horizontal Oscillator Capacitor 8 R0 Horizontal Oscillator Resistor

9 PLL1F First PLL Loop Filter 10 HPOS Horizontal Position Decoupling Filter 11 HGND Horizontal Section Ground 12 HFLY Horizontal Flyback Input (positive polarity) 13 HREF Horizontal Section Reference Voltage (to be filtered) 14 HLOCKCAP First PLL Lock/Unlock Time Constant Capacitor 15 FOCUSOUT Mixed Horizontal and VerticalDynamic Focus Output 16 HFOCUSCAP Horizontal Dynamic Focus Oscillator Capacitor 17 GND Ground (related internal reference) 18 BREATH DC Breathing Input Control 19 VGND Vertical Section Ground 20 VAGCCAP Memory Capacitor for Automatic Gain Control Loop in Vertical Ramp Generator 21 V

REF

22 VCAP Vertical Sawtooth Generator Capacitor 23 VOUT Vertical Ramp Output (with frequency independantamplitude andSorC Corrections if any).

24 EWOUT East/West Pincushion Correction Parabola Output 25 XRAY X-RAY protection input (with internal latch function) 26 HOUT Horizontal Drive Output (int. trans. open collector) 27 GND General Ground (referenced to V 28 HSIZE DC HSize Control Output 29 V

30 SCL I 31 SDA I 32 5V Supply Voltage(5V Typ.)

Vertical Section Reference Voltage (to be filtered)

It is mixed withvertical position reference voltage output andvertical moire.

)

Supply Voltage (12V Typ)

C Clock Input

C Data Input

9110-01.TBL

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TDA9110

QUICK REFERENCEDATA

Parameter Value Unit

Horizontal Frequency 15 to 150 kHz Autosynch Frequency (forgiven R0 and C0) 1 to 4.5 F0 ± Horizontal Synchro Polarity Input YES Polarity Detection (on both Horizontal and Vertical Sections) YES TTL Composite Synchro YES Lock/Unlock Identification (on both Horizontal 1st PLL and Vertical Section) YES

C Control for H-Position ± 10 %

I XRay Protection YES

C Horizontal Duty Adjust 30 to 60 %

C Free Running Adjustment NO

I Stand-by Function YES Two Polarities H-Drive Outputs NO Supply Voltage Monitoring YES PLL1 Inhibition Possibility NO Horizontal Blanking Output YES Vertical Frequency 35 to 200 Hz Vertical Autosync (for 150nF) 50 to 150 Hz Vertical S-Correction YES Vertical C-Correction YES Vertical Amplitude Adjustment YES DC Breathing Control on Vertical Amplitude YES Vertical Position Adjustment YES East/West Parabola Output YES Pin Cushion Correction Amplitude Adjustment YES Keystone Adjustment YES Internal Dynamic HorizontalPhase Control YES Side Pin Balance Amplitude Adjustment YES Parallelogram Adjustment YES Tracking of Geometric Corrections YES Reference Voltage (both on Horizontal and Vertical) YES Dynamic Focus (both Horizontal and Vertical) YES

C Horizontal Dynamic Focus Amplitude Adjustment YES

C Horizontal Dynamic Focus Keystone Adjustment YES

C Vertical Dynamic Focus Amplitude Adjustment YES

I Type of Input Synchro Detection (suppliedby 5VDigital Supply) YES Vertical Moiré Output YES

C Controlled V-Moiré Amplitude YES

I Frequency Generator for Burn-in NO

C Read/Write 400 kHz

Fast I Horizontal Moiré Output YES

C controlled H-Moiré Amplitude YES

I DC HSize OutputAmplitude Control YES

9110-02.TBL

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TDA9110

BLOCKDIAGRAM

HOUT

BUFFER

XRAY

HFOCUSCAP 16

15 HVFOCUS

17 GND

XRAY 25

TDA9110

PLL2C

HFLY

FC1 C0 R0

HLOCKCAP HLOCKOUT

HPOS

PLL1F

5127

8914 26

(5 bits)

H-DUTY

SAFETY

PROCESSOR

PHASE

SHIFTER

PHASE

COMPARATOR

VCO

LOCK/UNLOCK

IDENTIFICATION

COMPARATOR

H-PHASE (7 bits)

PHASE/FREQUENCY

SYNC

6 bits

Spin Bal

PROCESSOR

Amp (7bits)

Kest (5 bits)

Key Bal

6 bits

VFOCUS

PCC

7 bits

TRACKING

GEOMETRY

VAMP

7 bits

VPOS

5 bits

VMOIRE

6 bits 6 bits

7 bits

6 bits

Keyst.

VERTICAL

OSCILLATOR

RAMP GENERATOR

S AND C

CORRECTION

22 23

OUT

CAP

AGCCAP

EWOUT

DCBREATH

4/29

REF

HREF

HGND

REF

VREF

VGND

SELECT

SYNC INPUT

H/HVIN

(1 bit)

VSYNCIN

5 bits

HFLY

VSYNC

HMOIRE

28 7 bitsHSIZE

RESET

GENERATOR

32 5V

SDA

C INTERFACE

SCL

GND

9110-02.EPS

TDA9110

ABSOLUTE MAXIMUMRATINGS

Symbol Parameter Value Unit

VESD ESD susceptibility Human Body Model,100pFDischarge through 1.5kΩ

HSize Cur Max. Sourced Current (Pin 28)

stg

oper

THERMAL DATA

Symbol Parameter Value Unit

th (j-a)

SYNCHROPROCESSOR OperatingConditions

Symbol Parameter Test Conditions Min. Typ. Max. Unit

HsVR Horizontal Synchro Input Voltage Pin 1 0 5 V

MinD Minimum Horizontal Input Pulses Duration Pin 1 0.7 µs

Mduty Maximum Horizontal Input Signal Duty Cycle Pin 1 25 %

VsVR Vertical Synchro Input Voltage Pin 2 0 5 V

VSW Minimum Vertical Synchro Pulse Width Pin 2 5 µs VSmD Maximum Vertical Synchro Input Duty Cycle Pin 2 15 % VextM Maximum Vertical Synchro Width on TTL H/Vcomposite Pin 1 750 µs

Supply Voltage (Pin 29) 13.5 V Supply Voltage (Pin 32) 5.7 V Max Voltage on Pin12

Pin5 Pin16 Pin7 Pins8, 9, 14, 20,22 Pin15, 18, 23, 24, 25, 26, 28 Pins1, 2, 3, 4, 30, 31

EIAJ Norm,200pF Dischargethrough 0Ω

Max. Sunk Current (Pin 28) Storage Temperature -40, +150 Junction Temperature +150

Operating Temperature 0, +70

Junction-ambient Thermal Resistance Max. 65

=5V,T

amb

=25oC)

1.8

4.0

5.5

6.4

8.0

300

2.5

100

µA

o o o

C/W

V V V V V V V

C C C

9110-03.TBL

9110-04.TBL

ElectricalCharacteristics

=5V,T

amb

=25oC)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VINTH Horizontaland Vertical Input Threshold Voltage

(Pins 1, 2)

Low Level High Level 2.2

0.8 V

RIN Horizontaland Vertical Pull-Up Resistor Pins 1, 2 200 kΩ

VOut Output Voltage (Pin 4) Low level

High Level

0 5

TfrOut Falling and Rising Output CMOS Buffer Pin 4, Cout = 20pF 200 ns

VHlock Horizontal 1st PLL Lock Output Status (Pin 4) Locked

Unlocked

VoutT Extracted Vsync Integration Time (% of T

Composite

) on H/V

C0 = 820pF 26 35 %

0 5

I2C READ/WRITE ElectricalCharacteristics

Symbol Parameter Test Conditions Min. Typ. Max. Unit

C PROCESSOR

Fscl Maximum Clock Frequency Pin 30 400 kHz

Tlow Low period of the SCL Clock Pin 30 1.3 µs

Thigh Highperiod of the SCL Clock Pin 30 0.6 µs

Vinth SDA and SCL Input Threshold Pins 30,31 2.2 V

VACK Acknowledge Output Voltage onSDA input with 3mA Pin31 0.4 V

See also I2CTable Control and I2C Sub Address Control

=5V,T

amb

=25oC)

V V

9110-05.TBL

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TDA9110

HORIZONTALSECTION OperatingConditions

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VCO

0(Min.)

(Max.)

OUTPUT SECTION

I12m Maximum Input Peak Current Pin 12 2 mA

HOI Horizontal Drive Output Maximum Current Pin 26, Sunk

Minimum Oscillator Resistor Pin 8 4 kΩ Minimum Oscillator Capacitor Pin 7 390 pF Maximum Oscillator Frequency 150 kHz

30 mA

current

ElectricalCharacteristics

=12V,T

amb

=25oC)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

SUPPLY AND REFERENCE VOLTAGES

V V

I I

REF-H

REF-V

REF-H

REF-V

Supply Voltage Pin 29 10.8 12 13.2 V

Supply Voltage Pin 32 4.5 5 5.5 V

Supply Current Pin 29 50 mA

Supply Current Pin 32 5 mA

Horizontal Reference Voltage Pin13, I = 5mA 7.4 8 8.6 V Vertical Reference Voltage Pin 21, I = 5mA 7.4 8 8.6 V Max. SourcedCurrent on V Max. SourcedCurrent on V

REF-H REF-V

Pin 13 5 mA Pin 21 5 mA

1st PLL SECTION

HpolT Polarity Integration Delay 0.75 ms

VCO ControlVoltage (Pin9) V

VCO

Vcog VCO Gain (Pin 9) R

=8V

REF-H

fH(Max.)

= 5.9kΩ,C0= 820pF,

dF/dV = 1/11R

0C0

REF-H

6.2

18.8 kHz

Hph HorizontalPhase Adjustment % of Horizontal Period ±10 %

Hphmin

Hphtyp

Hphmax

Minimum Value Typical Value Maximum Value

Free Running Frequency R0= 5.9kΩ,C0= 820pF,

dF0/dT FreeRunning FrequencyThermal Drift

Horizontal Phase Setting Value

Sub-Address 01

Byte x1111111 Byte x1000000 Byte x0000000

2.6

3.2

3.8 25 kHz

= 0.97/8R0C

See Note -150 ppm/C

(No drift on external components)

CR PLL1 Capture Range R

Note : This parameter is not tested on eachunit. It is measured during our internalqualification.

= 6.49kΩ,C0= 820pF,

+0.5kHz to 4.5F

from f

fH(Min.)

(Max.)

Component accuracy :

= 2%, R0=1%

28 kHz

100

V V

V V V

kHz

9110-05.TBL

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TDA9110

HORIZONTALSECTION (continued) ElectricalCharacteristics

Symbol Parameter Test Conditions Min. Typ. Max. Unit

2nd PLL SECTION AND HORIZONTAL OUTPUT SECTION

FBth Flyback Input Threshold Voltage (Pin12) 0.65 0.75 V

Hjit Horizontal Jitter Horizontal Freq. = 31kHz 60 ppm

Horizontal Drive Output Duty-Cycle

HDmin

HDmax

XRAYth X-RAY Protection Input Threshold Voltage Pin 25 8 V

Vphi2 Internal Clamping Levels on 2nd PLL Loop

VSCinh Threshold Voltage To Stop H-Out,V-Out

HDvd Horizontal Drive Output (low level) Pin 26I

HORIZONTAL DYNAMIC FOCUS FUNCTION

HDFst Horizontal Dynamic Focus Sawtooth

HDFdis Horizontal Dynamic Focus Sawtooth

HDFstart Internal fixed Phase Advance versus Hfly

HDFDC Bottom DC Output Level R

TDHDF DC Output Voltage Thermal Drift 200 ppm/C

HDFamp Horizontal Dynamic Focus Amplitude

HDFKeyst Horizontal Dynamic Focus Keystone

VERTICAL DYNAMIC FOCUS FUNCTION (positive parabola)

AMPVDF Vertical Dynamic FocusParabola (added

VDFAMP Parabola Amplitude Function of VAMP

VHDFKeyt Parabola Assymetry Function of VPOS

Notes :

(Pin 26) (see Notes 1 & 2)

Low Level High Level

Filter (Pin5)

when V

< VSCinh

Minimum Level Maximum Level

Discharge Width

Middle

Min Byte x1111111 Typ Byte x1000000 Max Byte x0000000

Min A/B Byte xxx11111 Typ Byte xxx10000 Max A/B Byte xxx00000

to horizontal one) Amplitude with VOUT and VPOS Typical

Min. Byte 000000 Typ. Byte 100000 Max. Byte 111111

(tracking between VAMP and VDF) with VPOS Typ. (see Figure 1 and Note 3)

Control (tracking between VPOS and VDF) with VAMP Max.

1. DutyCycle is theratio of power transistor OFF time period. Power transistor is OFF when output transistor is OFF.

2. Initial Conditionfor Safe Operation Start Up

3. S and C correction are inhibitedso the output sawtooth has a linear shape.

=12V,T

=25oC) (continued)

amb

Sub-Address 00

Byte xxx11111 Byte xxx00000

Low Level High Level

Pin 29 7.5 V

HfocusCap = C TH=TBD, Pin 16 2

Start by HDFstart 400 ns

Fixed for each frequency (Pin 16)

LOAD

Sub-Address 03, Pin 15, FH = 50kHz, Keystone Typ 1.1

Sub-Address 04, FH = 50kHz, TypAmp

B/A A/B A/B

Sub-Address 0F

Sub-Address 05

Byte 10000000 Byte 11000000 Byte 11111111

Sub-Address 06

Byte x0000000 Byte x1111111

30 60

1.6

3.7

= 30mA 0.4 V

OUT

= 820pF,

4.7

860 ns

= 10kΩ, Pin 15 2 V

1.7

3.5

2.5

1.0

2.5

0.5 1

0.6 1

1.5

0.52

% %

V V

9110-05.TBL

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TDA9110

VERTICALSECTION OperatingConditions

Symbol Parameter Test Conditions Min. Typ. Max. Unit

OUTPUTS SECTION

VEWM Maximum EW Output Voltage Pin24 6.5 V VEWm MinimumEW Output Voltage Pin24 1.8 V

LOAD

Minimum Load for less than 1% Vertical Amplitude Drift Pin 20 65 MΩ

ElectricalCharacteristics

=12V,T

amb

=25oC)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VERTICAL RAMP SECTION

VRB Voltage at Ramp Bottom Point V

VRT Voltage at Ramp TopPoint(withSynchro)V

REF-V

VRTF Voltage at Ramp Top Point (without Synchro) Pin 22 VRT-

=8V, Pin 22 2 V

REF-V

Pin 22 5 V

0.1

VSTD Vertical Sawtooth Discharge Time Duration (Pin

With 150nF Cap 70 µs

22)

VFRF Vertical FreeRunning Frequency

(see Notes 4 & 5)

ASFR AUTO-SYNC Frequency C

RAFD Ramp Amplitude Drift versus Frequency at

Maximum Vertical Amplitude

Rlin Ramp Linearity on Pin 22 (seeNotes 4 & 5) 2.5 < V

Vpos Vertical Position Adjustment Voltage

(Pin23 - VOUT centering)

VOR Vertical Output Voltage

(peak-to-peak on Pin 23)

OSC (Pin22)

Measured on Pin22

See Note 6 C

50Hz < f and f < 165Hz

= 150nF

= 150nF ±5%

= 150nF

and V22<4.5V 0.5 %

Sub Address 06

Byte x0000000 Byte x1000000 Byte x1111111 3.65

Sub Address 05

Byte x0000000 Byte x1000000 Byte x1111111 3.5

100 Hz

50 165 Hz

200 ppm/Hz

3.2

3.3 V

3.5

3.8

2.25

2.5 V

3.75

V V

VOI Vertical Output Maximum Current (Pin23) ±5mA

dVS Max Vertical S-Correction Amplitude

x0xxxxxx inhibits S-CORR x1111111 gives max S-CORR

Ccorr Vertical C-Corr Amplitude

x0xxxxxx inhibits C-CORR

Notes : 4. With Register07 at Byte x0xxxxxx (VerticalS-Correction Control) then the S correction is inhibited, consequentlythe sawtooth has

a linear shape.

5. WithRegister 08 at Byte x0xxxxxx (VerticalC - Correction Control) then the C correction is inhibited, consequently the sawtooth has a linear shape.

6. It is the frequency range for which the VERTICAL OSCILLATOR will automaticallysynchronize, using a single capacitor value on Pin 22 and with a constant ramp amplitude.

Subaddress 07

PP PP

at T/4 at 3T/4

∆V/V ∆V/V

SubAddress 08

Byte x1000000 Byte x1100000 Byte x1111111

-4

-3

% %

% 0 3

9110-05.TBL

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VERTICALSECTION(continued) ElectricalCharacteristics

Symbol Parameter Test Conditions Min. Typ. Max. Unit

EAST/WEST FUNCTION

TDEW

EWpara Parabola Amplitude with Vamp Max,

EWtrack ParabolaAmplitude Function of V-AMP Control

KeyAdj KeystoneAdjustment Capabilitywith Typ Vpos,

KeyTrack Intrinsic Keystone Function of V-POS Control

DC HSIZE OUTPUTCONTROL

HSize out DC HSize Output Level (Pin28) Subaddress 0B

INTERNAL HORIZONTAL DYNAMIC PHASE CONTROL FUNCTION

SPBpara SidePin Balance ParabolaAmplitude(Figure 3)

SPBtrack Side Pin Balance Parabola Amplitude function

ParAdj ParallelogramAdjustmentCapability with Vamp

Partrack IntrinsicParallelogram FunctionofVposControl

VERTICAL MOIRE

VMOIRE Vertical Moire (measuredon VOUTDC) (Pin23) Subaddress 0C

BREATHING COMPENSATION

BRADj Vertical Output Variation versus DC Breathing

Notes :

7. These parameters are not tested on each unit. They are measured during our internalqualification

8. Refersto Notes 4 & 5 from last section.

9. TH is the Horizontal PLL Period Duration.

DC Output Voltage with Typ Vpos,Keystone, Corner and Corner Balance Inhibited

DC Output Voltage Thermal Drift See Note 7 100 ppm/C

V-Pos Typ, Keystone Inhibited

(tracking between V-AMP and E/W) with Typ Vpos, Keystone, EW Typ Amplitude (see Note 8)

EW Inhibited and Vertical Amplitude Max. (see Note 8 and Figure 4)

(tracking between V-POS and EW) with EW Max Amplitude and Vertical Amplitude Max. (see Note 8)

A/B Ratio B/A Ratio

with Vamp Max, V-POS Typand Parallelogram Inhibited (see Notes 8 & 9)

of Vamp Control (tracking between Vamp and SPB) w ith SPB Max, V-POS Typ and Parallelogram Inhibited (see Notes 8 & 9)

Max, V-POS Typ and SPB Max (see Notes 8 & 9)

(trackingbetween V-Pos andDHPC)withVamp Max, SPB Max and Parallelogram Inhibited (see Notes 8 & 9)

A/B Ratio B/A Ratio

Control (Pin 23)

=12V,T

=25oC) (continued)

amb

Pin 24, see Figure 2 2.5 V

Subaddress 0A

Byte 11111111 Byte 10100000 Byte 10000000

2.5

1.25 0

Subaddress 05

Byte 10000000 Byte 11000000 Byte 11111111

0.45

0.8

1.25

Subaddress 09

Byte 1x000000 Byte 1x111111

0.9

Subaddress 06

Byte x0000000 Byte x1111111

Byte 00000000 Byte 01000000 Byte 01111111

0.52

0.5

2.5

4.5

Subaddress 0D

Byte x1111111 Byte x1000000

+1.4

-1.4

Subaddress 05

Byte 10000000 Byte 11000000 Byte 11111111

0.5

0.9

1.4

Subaddress 0E

Byte x1111111 Byte x1000000

+1.4

-1.4

Subaddress 06

Byte x0000000 Byte x1111111

0.52

Byte 01x11111 6 mV

18>VREF-V

V18=V V18=V

REF-V REF-V

-4V

0 0

-10

TDA9110

V V V

%TH %TH

%TH %TH %TH

%TH %TH

% % %

9110-05.TBL

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