![](/html/a0/a047/a047daf1cafa508d6a829e581295a1325d8ee7cbf4f82bf68ed53321c6966f49/bg1.png)
HORIZO NTAL SECTION
.
SYNCHRONIZATION INPUT : TTL COMPATIBLE, NEGA TIVE EDGE TRIGGERED
.
SYNCHRONIZATION INDEPENDENT FROM
DUTY CYCLE TIME
.
OSCILLATOR : FREQUENCY RANGE FROM
15kHz to 100kHz
.
HORIZONTAL OUTPUT PULSE SHAPER
AND SHIFTER
.
PHASE COMPARATOR BETWEEN SYNCHRO AND OSC ILLAT OR ( PLL1)
.
PHASE C OMPARATOR BETWEEN FLYBACK
AND OSCILLATOR (PLL2)
.
INTERNAL VOLTAGE REGULAT O R
.
DC COMPATIBLE CONTROLS FOR PHASE
AND FREQUENCY
.HORIZONT AL OUTP UT DUTY CYCLE : 48%
TDA9102F
H/V PROCESSOR FOR TTL V.D.U
POWERDIP20 (0.4)
(Plastic package)
ORDER CODES : TDA9102F
VERTICAL SECTION
.
SYNCHRONIZATION INPUT : TTL COMPATIBLE, NEGA TIVE EDGE TRIGGERED
.
SYNCHRONIZATION INDEPENDENT FROM
DUTY CYCLE TIME
.
OSCILLATOR : FREQUENCY RANGE FROM
30Hz to 120Hz
.
RAMP GENERATOR WITH VARIABLE GAIN
STAGE
.
VERTICAL RAMP VOLTAGE REFERENCE
.
INTERNAL VOLTAGE REGULAT O R
.
DC COMPATIBLE CONTROLS FOR FREQUENCY, AMPLITUDE AND LINEARITY
DESCRIPTIO N
The TDA9102F is a monolit hic integrated c ircuit for
horizontal and vertical sync processing in monochrome and color video displays driven by input
TTL compatible signals.
The TDA9102F is supplied in a 20 pin dual in line
package with pin 1 1 connected to ground and used
for heatsinking.
PIN CONNECTIONS
Substrate Ground
Vertical Frequency Preset
Vertical TTL Input
Vertical Ramp Output
Vertical Amplitude Adjust
Vertical Linearity Adjust
Linearity Output
Vertical Reference Voltage
C13
11
12
13
14
15
16
17
18
19
V
20
S
Horizontal Phase Adjust
10
Phase Comparator 2 Output
9
Horizontal Flyback Input
8
Horizontal Output
7
Horizontal Power Ground
6
C5
5
Horizontal TTL Input
4
Phase Comparator 1 Output
3
C2
2
R1
1
9102F-01.EPS
May 1994
1/7
![](/html/a0/a047/a047daf1cafa508d6a829e581295a1325d8ee7cbf4f82bf68ed53321c6966f49/bg3.png)
TDA9102F
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
SYNC
I
I
I
P
T
stg
THERMAL D ATA
Symbol Parameter Value Unit
R
th(j-c)
R
th(j-a)
ELECTRICAL CHARACT E RIS TICS
(T
amb
Symbol Parameter Test conditions Min. Typ. Max. Unit
HORIZONTAL SECTION
V
V
V
K
V
3
I
K
V
T
V
V
7
I
FLY
V
I
Supply Voltage 18 V
S
OH
15
19
Sync Input Peak Voltage + V
Output Sinking Peak Current (Pin 7 ; t < 3µs) 2 A
Output Current (Pin 15) - 10 mA
Output Current (Pin 19) - 10 mA
Total power dissipation
tot
● T
● T
amb
< 90oC
pin
< 70oC
S
1.4
1.5
, TjStorage and Junction Temperature - 40 to 150
Junction-case Thermal Resistance 40
Junction-ambient Thermal Resistance 55
= 25oC, VS = 12V, refer to the test circ uits, unles s otherwise sp ecified)
Supply Voltage Range 10.5 12 15.5 V
S
I
Supply Current 40 70 mA
S
Voltage Reference at Pin 1 I1 = 0.5mA 3.2 3.5 3.8 V
1
Current at Pin 1 - 1 mA
I
1
Voltage Swing at Pin 2 3.7 4 4.3 V
2
Free Running Frequency Constant fo = 1/(K0 x R1 x C2) 3.7 4 4.3
0
- V1 Control Voltage Range (See technical note 1) 1.6 2.5 V
Peak Control Current 3 mA
3
Gain Phase Comparator φ1
3
K3 = 2 x I3 / 360
Sync Threshold Input (neg. edge) ● Sync high
4
Current at Pin 4 ● Input high
I
4
Input Pulse Duration T = 1/f
4
Monostable Threshold 5.6 6 6.4 V
5
Internal Pulse Width (t5 = C5 x V5 /I5) C5 = 220 pF
t
5
t
Output Pulse Duration (low) - T = 1/f
7
H
H
● Sync low
● Input low - 10
@ fH = 27.64kHz 1 0.9T µs
(see technical note 2)
fH = 27kHz
fH = 70kHz
0.44T
0.41T
sat Output Saturation Voltage I7 = 600 mA 1.2 2.5 V
t
Permissible delay between output pulse
D
leading edge and flyback pulse leading edge
(for keeping a constant duty cycle) ; T =
See technical note 4
@ fH = 27kHz
1
f
H
Flyback Input Current at Pin 8 ● Flyback On
● Flyback Off
Clamp voltage at Pin 8 ● I
8
I
Current for switching low the output pulse 0.7 2 mA
8
Peak control current 0.9 mA
9
● I
8 =
8
1mA
= - 1mA
17
28
0.8
10 µA
3.6 µs
0.48T
0.52T
0.45T
0.49Tµsµs
0.48 T - t
0.7
FLY
2mA
-1
0.6
- 0.6
V
W
W
o
C
o
C/W
o
C/W
PP
µA
degree
V
V
µA
s
mA
V
V
9102F-01.TBL
9102F-02.TBL
9102F-03.TBL
3/7