SGS Thomson Microelectronics TDA7403D Datasheet



DEVICE INCLUDES AUDIO PROCESSOR,
STEREODECODER AND NOISEBLANKER

HIGH PERFORMANCE SIGNAL PROCES­SOR WITH BASIC FUNCTIONS

AM, FM, MPX AND CASSETTEINPUTS
NO EXTERNAL COMPONENTS REQUIRED
FULLY PROGRAMMABLEVIA I

2

C BUS

LOW DISTORTIONANDNOISE

DESCRIPTION

The TDA7403 is a high performancesignal proc­essor specifically designed for car radio applica­tions focused on the low-end market.

The device includes a complete audioprocessor
and a stereodecoder withnoiseblanker.

Switched-capacitors design technique allows to
obtain all these features without external compo­nents or adjustments. Using TDA7403 results is
in a very performant low-cost signal processing

TDA7403

BASIC SIGNAL PROCESSOR

PRELIMINARY DATA

SO20

ORDERING NUMBER: TDA7403D

application
The device is fully programmable by I

terface allowing to customize key device parame­ters and especiallyfilter characteristics.

The BICMOS process combined with the opti­mized signal processing assure low noise and
low distortionperformances.

2

C bus in-

BLOCK DIAGRAM

8

AM

MPX

1

INPUT

2

MULTIPLEXER

+

AUTO ZERO

9

80KHz

LP

15

V

S

SUPPLY

GND

14 20

CREF

CASS R

CASS L

FM R
FM L

PILOT

CANCELLATION

PLL

SM

11 17

VOLUME BASSTREBLE

DEMODULATOR

+ STEREOADJUST

+ STEREO BLEND

PIL

DET

SOFT
MUTE

DIGITAL CONTROL

25KHz

LP

NOISE

BLANKER

S&H

PULSE

FORMER

2

I

HIGH

CUT

CONTROL

D

A

10

LEVEL

OUT LR
OUT LF
OUT RR
OUT RF

C BUS

19
16
18

12
13

D98AU918

OUT LR
OUT LF
OUT RR
OUT RF

SCL
SDA

October 1998

1/26

This is preliminary information on a new product now in developmentor undergoing evaluation.Details are subject to change withoutnotice.

TDA7403

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

S

amb Operating Ambient Temperature Range -40 to 80 °C

T

stg Operating Storage Temperature Range -55 to 150 °C

T

SUPPLY

Symbol Parameter Test Condition Min. Typ. Max. Unit

S Supply Voltage 7.5 9 10 V

V

S Supply Current V

I

SVRR Ripple Rejection @ 1KHz Audioprocessor (all filters flat) 60 dB

ESD

All pins are protectedagainstESD according to the MIL883 standard.

PIN CONNECTION

Operating Supply Voltage 10.5 V

=9V 253035mA

S

Stereodecoder + Audioprocessor 55 dB

CASS R

CASS L

N.C.
N.C.
N.C.
N.C.
N.C.

AM

MPX SCL

LEVEL SM

2
3
4
5
6
7
8
9
10

D98AU919

20
19
18
17
16
15
14
13
12
11

CREF1
OUT LF
OUT RF
OUT LR
OUT RR
V

S

GND
SDA

THERMAL DATA

Symbol Parameter Value Unit

R

th-j pins

Thermal Resistance Junction-pins Max 85 °C/W

2/26

TDA7403

PIN DESCRIPTION

N. Name Function Type

1 CASSR Cassette Input Right I
2 CASSL Cassette Input Left I
3 n.c. not connected
4 n.c. not connected
5 n.c. not connected
6 n.c. not connected
7 n.c. not connected
8 AM AM Input I

9 MPX FM Input (MPX) I
10 LEVEL Level Input Stereodecoder I
11 SM Soft Mute Drive I
12 SCL I
13 SDA I
14 GND Supply Ground S
15 VS Supply Voltage S
16 OUTRR Right Rear Speaker Output O
17 OUTLR Left Rear Speaker Output O
18 OUTRF Right Front Spaeaker Output O
19 OUTLF Left Front Speaker Output O
20 CREF Reference CapacitorPin S

2

C Clock Line I/O

2

C Data Line I/O

(1) See input configuration tree and databyte specification”configuration”
Pin type legenda:
I = Input
O = Output
I/O = Input/Output
S = Supply

3/26

TDA7403

AUDIO PROCESSORPART

Input Multiplexer

MPX input
Cassettestereoinput
AM mono or stereo input
Internalbeep with 2 frequencies(selectable)
Mixablephone and beep signals

Loudness

Firstor secondorder frequencyresponse
Program mablecenterfrequencyand qualityfactor
15 x 1dB steps
Selectableflat-mode(constantattenuation)

Volume control

1dB attenuator
Max. gain 20dB
Max. attenuation79dB

Soft-stepgain control

Bass Control

2nd orderfrequencyresponse
Center frequencyprogrammablein 4(5)steps
DC gain programmable
7 x 2dBsteps

Treble Control

2nd orderfrequencyresponse
Center frequencyprogrammablein 4 steps
7 x 2dBsteps

Speaker Control

4 independentspeaker controls (1dB steps
controlrange 50dB)

Mute Functions

Direct mute drivenby pin SM
Digitally controlled softmute with 4 program-

mabletime constants

ELECTRICALCHARACTERISTICS (V

S = 9V; Tamb =25°C; RL = 10KΩ;all gains= 0dB; f = 1KHz;

unless otherwise specified).

Symbol Parameter Test Condition Min. Typ. Max. Unit

INPUTSELECTOR

R

in

V

CL

S

IN

IN MIN Min. Input Gain -1 0 1 dB

G

IN MAX Max. Input Gain 14 dB

G

G

STEP

V

DC

Input Resistance all inputs exceptPhone 70 100 130 K
Clipping Level 2.2 2.6 V
Input Separation 80 100 dB

Step Resolution 2 dB
DC Steps AdjacentGain Step 0 mV

to G

G

MIN

MAX

1mV

BEEPCONTROL

VRMS Beep Level 350 mV

f

BMIN

f

BMAX

Lower Beep Frequency 600 Hz
Higher BeepFrequency 1.2 KHz

MIXINGCONTROL

MLEVEL Mixing Level Source 0 dB

Source -6 dB
Source -12 dB
Beep/Phone 0 dB

Ω

RMS

4/26

TDA7403

ELECTRICALCHARACTERISTICS

(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

VOLUMECONTROL

GMAX Max Gain 20 dB

MAX Max Attenuation 79 dB

A

A

STEP

E

A

Step Resolution 1 dB
Attenuation Set Error G = -20 to 20dB -1.25 0 1.25 dB

G = -60 to 20dB -4 0 3 dB

E

T

V

DC

Tracking Error 2dB
DC Steps AdjacentAttenuation Steps 0.1 3 mV

From 0dB to G

MIN

0.5 5 mV

LOUDNESSCONTROL

ASTEP Step Resolution 1 dB

MAX Max. Attenuation 15 dB

A
f

CMIN

f

CMAX

Lower Center Frequency 200 Hz
Higher Center Frequency 400 Hz

SOFTMUTE

AMUTE Mute Attenuation 70 100 dB

D Delay Time T1 0.48 ms

T

T2 0.96 ms
T3 40.4 ms
T4 324 ms

1V

V

THlow

V

THhigh

R

PU

V

PU

Low Threshold for SM Pin

(1)

High Threshold for SM Pin 2.5 V
Internal Pull-up Resistor 70 100 130 K
Pull-up Voltage 4.7 V

Ω

SOFTSTEP

TSW Switch Time 10 ms

BASSCONTROL

C

RANGE

A

STEP

C Center Frequency fC1 60 Hz

f

BASS Quality Factor Q1 1

Q

DC

GAIN

1) SM pin is active low (mute condition)

2) See description of Audioprocessor Part - Bass & Treble filtercharacteristicsprogramming

Control Range

14 dB

±

Step Resolution 2 dB

C2 70 Hz

f

C3 80 Hz

f

C4 100

f

2 1.25

Q
Q

3

Q

4

(2)

1.5
2

Bass-Dc-Gain DC = off 0 dB

DC = on 4.4 dB

Hz

5/26

TDA7403

ELECTRICALCHARACTERISTICS

(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

TREBLECONTROL

CRANGE Control Range ±14 dB

A

STEP Step Resolution 2 dB

f

C

Center Frequency f

C1

f

C2

f

C3

f

C4

10 KHz

12.5 KHz
15 KHz

17.5 KHz

SPEAKERATTENUATORS

C

RANGE

A

STEP

A

MUTE Output Mute Attenuation 80 90 dB

E

E Attenuation Set Error 2 dB

V

DC

Control Range 50 dB
Step Resolution 1 dB

DC Steps Adjacent Attenuation Steps 0.1 5 mV

AUDIO OUTPUTS

VCLIP Clipping Level d= 0.3% 2.2 2.6 VRMS

RL Output Load Resistance 2 KΩ
C

L

R

OUT

V

DC

Output Load Capacitance 10 nF
Output Impedance 30 120
DC Voltage Level 3.8 V

GENERAL

e

NO

S/N Signal to Noise Ratio all gain = 0dB flat; V

d Distortion V

S

C

E

T

Output Noise BW = 20 Hz to 20 KHz

3

output muted
BW = 20 Hz to 20 KHz

6.5

all gain = 0dB

O =2VRMS 110 dB

bass treble at 12dB; V

2.6V

RMS

=1V

IN

V

=1V

IN

; all stages 0dB 0.002 %

RMS

;Bass&Treble= 12dB 0.05 %

RMS

=

O

100 dB

Channel separation Left/Right 80 100 dB
Total Tracking Error AV= 0 to -20dB 0 1 dB

A

V = -20 to -60dB 0 2 dB

Ω

V

µ

V

µ

6/26

DESCRIPTION OF THE AUDIOPROCESSOR
Figure 1. Input stages

TDA7403

CASSETTE

100K

AM

100K

MPX

100K

STEREODECODER

Input stages

The input circuits are the same as in preceeding
ST audioprocessors with exception of the CD in­puts (see figure 1).
The typicalinput impedance is 100kΩ.

AutoZero

In order to reduce the number of pins there is no
AC coupling between the In-Gain and the follow­ing stage, so that any offset generated by or be­fore the In-Gain stage would be transferred or
even amplifiedto the output.

To avoid that effect a special offset cancellation
stage called AutoZerois implemented.
To avoid audible clicks the audioprocessor is
muted before the loudness stage during this time.
In some cases, for exampleif the µP is executing
a refresh cycle of the I

2

C bus programming, it is
not useful to start a new AutoZeroactionbecause
no new source is selectedand an undesiredmute
would appear at the outputs. For such applica­tions the TDA7403 could be switched in the ”Auto
Zero Remain” mode (Bit 6 of the subaddress
byte). If this bit is set to high, the DATABYTE 0
could be loaded without invoking the AutoZero
and the old adjustmentvalueremains.

Mixing Stage

This stage offersthe possibility to mix the internal
beep or the phone signal to any other source.
Due to the fact that the mixing stage is also lo­cated behind the In-Gain stage fine adjustments
of the mainsource level can be donein thisway.

Loudness

There are four parameters programmable in the
loudnessstage (see fig. 2, 3,4):

IN GAIN

D98AU951

Figure 2. LoudnessAttenuation @ fc = 400Hz

(secondorder)

0.0

-5.0

-10.0

-15.0

-20.0

10.0 100.0 1.0K 10.0K

Figure 3. LoudnessCenterfrequency @ Attn.

= 15dB(secondorder)

0.0

-5.0

-10.0

-15.0

-20.0

10.0 100.0 1.0K 10.0K

- Attenuation

- CenterFrequency

- LoudnessQ

- FlatMode:inthismodethe loudnessstageworks
asa0 -15dBattenuator.

7/26

TDA7403

Figure 4. Loudness@ Attn.= 15dB,fc = 400Hz

(dB)

-5

-10

-15

-20
10 100 1,000 Hz

D98AU844

Softmute

The digitally controlled softmute stage allows
muting/demuting the signal with a I
grammable slope. The mute process can either
be activated by the softmute pin or by the I

2

C bus pro-

2

C
bus. The slope is realized in a special S shaped
curve to mute slow in the critical regions (see fig­ure 5).

2

For timing purposes the Bit 3 of the I

C bus out­put register is set to 1 from the start of muting un­til the end of demuting.

Figure 5. Softmute Timing

1

EXT.

MUTE

+SIGNAL

REF

-SIGNAL

1

2

I

C

BUS

OUT

D97AU634

Note: Please notice that a started Mute action is always terminated
and could not be interruptedby a change ofthemute signal.

Time

Figure 6. Soft Step Timing

VOUT

2dB

1dB

Softstep Volume

When volume level is changed often an audible
click appears at the output. The root cause of
those clicks could be either a DC offset before
the volume stage or the sudden change of the
envelope of the audio signal. With the Softstep
feature both kinds of clicks could be reduced to a
minimum and are no more audible (see figure 6).

Bass

There are three parameters programmable in the
bass stage(see figs 7, 8, 9, 10):

- Attenuation

- Center Frequency (60, 70, 80 and 100Hz)

- QualityFactors(1, 1.25, 1.5 and 2)

DC Mode

In this mode the DC gain is increased by 4.4dB.
In addition the programmed center frequencyand
quality factor is decreased by 25% which can be
used to reach alternative center frequencies or
quality factors.

10ms

-1dB

-2dB

Note: For steps more than 1dB the softstep mode should be
deactivated because it could generate a 1dB error during the
blend-time

Time

D97AU635

Treble

There are two parameters programmable in the
treble stage (see figs 11, 12):

- Attenuation

- CenterFrequency(10, 12.5, 15 and 17.5kHz).

Speaker Attenuator

Due to practical aspects the steps in the speaker
attenuators are not linear over the full range. At
attenuations more than 24dB the steps increase
from 1.5dB to 10dB (please see data byte specifi­cation).

8/26

TDA7403

Figure 7. Bass Control @ fc = 80Hz, Q = 1

15.0

10.0

5.0

0.0

-5.0

-10.0

-15.0

10.0 100.0 1.0K 10.0K

Figure 9. Bass Quality factors@ Gain = 14dB,

fc = 80Hz

15.0

12.5

10.0

7.5

5.0

Figure 8. Bass Center @ Gain= 14dB, Q = 1

15.0

12.5

10.0

7.5

5.0

2.5

0.0

10.0 100.0 1.0K 10.0K

Figure 10. Bass normal and DC Mode

@ Gain = 14dB, fc = 80Hz

15.0

12.5

10.0

7.5

5.0

2.5

2.5

0.0

10.0 100.0 1.0K 10.0K

Figure 11. Treble Control@ fc = 17.5KHz

15.0

10.0

5.0

0.0

-5. 0

-10.0

-15.0

10.0 100.0 1.0K 10.0K

0.0

10.0 100.0 1.0K 10.0K

Note: In general the center frequency, Q and DC-mode can be set
independently. The exceptionfromthis ruleisthe mode(5/xx1111xx)
where the center frequency is set to 150Hz instead of 100Hz.

Figure 12. Treble CenterFrequencies

@ Gain= 14dB

15.0

12.5

10.0

7.5

5.0

2.5

0.0

10.0 100.0 1.0K 10.0K

9/26

TDA7403

STEREODECODERPART

No externalcomponents necessary
PLL with adjustmentfree fully integratedVCO
Automatic pilot dependent MONO/STEREO

switching
Very high suppression of intermodulation and

interference
ProgrammableRoll-Off compensation

Dedicated RDS Softmute
Highcut and Stereoblend characterisctics pro-

grammablein a widerange
Internal Noiseblankerwith threshold controls
Multipath detector with programmable inter-

nal/external influence

2

C bus control of all necessary functions

I

ELECTRICAL CHARACTERISTICS

75KHz deviation, f = 1KHz. G

I = 6dB,Tamb =25°C; unlessotherwisespecified).

= 9V; deemphasis time constant = 50µs, V

(V

S

MPX

= 500mV,

Symbol Parameter Test Condition Min. Typ. Max. Unit

IN MPX Input Level Input Gain = 3.5dB 0.5 1.25 VRMS

V
R

in

min Minimum Input Gain 3.5 dB

G

G

max

G

STEP

SVRR Supply Voltage Ripple Rejection V

α

Input Resistance 100 K

Max Input Gain 11 dB
Step Resolution 2.5 dB

= 100mv, f = 1khz 60 dB

ripple

Max Channel Separation 50 dB

THD Total Harmonic Distortion 0.02 0.3 %

S+N

Signal plus Noise to Noise Ratio S = 2V

rms

91 dB

N

MONO/STEREOSWITCH

V

PTHST1

V

PTHST0

V

PTHMO1

V

PTHMO0

Pilot Threshold Voltage forStereo, PTH = 1 15 mV
Pilot Threshold Voltage forStereo, PTH = 0 25 mV
Pilot Threshold Voltage forMono, PTH = 1 12 mV
Pilot Threshold Voltage forStereo, PTH = 0 19 mV

PLL

∆f/f Capture Range 0.5 %

DEEMPHASISandHIGHCUT

τHC50

τ

HC75

τ

HC50

τ

HC75

Deemphasis Time Constant Bit = 7, Subadr. 10 = 0

V

LEVEL >> VHCH

Deemphasis Time Constant Bit = 7, Subadr. 10 = 1

VLEVEL >> V

HCH

Highcut Time Constant Bit= 7, Subadr. 10 = 0

VLEVEL >> V

HCL

Highcut Time Constant Bit= 7, Subadr. 10 = 1

VLEVEL >> V

HCL

50

75

150

225

Ω

s

µ

s

µ

s

µ

s

µ

STEREOBLENDandHIGHCUT-CONTROL

REF5V Internal Reference Voltage 5 V

TC

REF5V

L

Gmin

Gmax Max. LEVEL Gain 10 dB

L
L

Gstep

VSBL
VSBL
VSBL

10/26

Temperature Coefficient 3300 ppm
Min. LEVEL Gain 0 dB

LEVEL Gain Step Resolution 0.67 dB

min Min.Voltage for Mono 33 %REF5V

Max. Voltage for Mono 58 %REF5V

max

Step Resolution 8.4 %REF5V

step

TDA7403

ELECTRICALCHARACTERISTICS

(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

STEREOBLENDandHIGHCUT CONTROL

VHCH
VHCH
VHCH

VHCL

VHCL

Min.Voltage for NO Highcut 42 %REF5V

min

Max. Voltage for NO Highcut 66 %REF5V

max
step Step Resolution 8.4 %REF5V

Min. Voltage for FULL High cut 17 %VHCH

min

max Max.VoltageforFULL Highcut 33 %VHCH

Carrierand harmonicsuppressionat the output

19 Pilot Signal f = 19KHz 50 dB

α

38 Subcarrier f = 38KHz 75 dB

α

57 Subcarrier f = 57KHz 62 dB

α

76 Subcarrier f = 76KHz 90 dB

α

Intermodulation(Note1)

α2 Pilot Signal f

3f

α

= 10KHz; f

mod

= 13KHz; f

mod

= 1KHz; 65 dB

spur

= 1KHz; 75 dB

spur

Traffic Radio (Note 2)

57 Signal f = 57KHz 70 dB

α

SCA - SubsidiaryCommunicationsAuthorization(Note 3)

α67 Signal f = 67KHz 75 dB

ACI - Adjacent Channel Interference(Note 4)

114 Signal f = 114KHz 95 dB

α

190 Signal f = 190KHz 84 dB

α

Notes to the characteristics:

1. Intermodulation Suppression: measured with:91%pilotsignal; fm = 10kHz or 13kHz.

2. Traffic Radio (V.F.) Suppression: measured with:91% stereo signal;9% pilotsignal; fm=1kHz;5% subcarrier (f = 57kHz,
fm = 23Hz AM,m = 60%)

3. SCA ( Subsidiary Communications Authorization ) measured with: 81% mono signal;9%pilotsignal; fm = 1kHz; 10%SCA - subcarrier
( fs = 67kHz, unmodulated).

4. ACI ( Adjacent Channel Interference) measured with:90% mono signal; 9% pilotsignal; fm =1kHz; 1% spurious signal

( fs = 110kHz or 186kHz, unmodulated).

11/26

TDA7403

NOISE BLANKER PART

additional circuits for trigger adjustment (devia­internal 2nd order 140kHz high pass filter
programmabletriggerthreshold

tion, field-strenght)

very low offset current during hold time

four selectable pulse suppression times

ELECTRICALCHARACTERISTICS (continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

V

TR Trigger Threshold

V

TRNOISE

Noise Controlled Trigger
Threshold

VRECT Rectifier Voltage VMPX = 0mV 0.9 V

V

RECT DEV

deviation dependent
rectifier Voltage

VRECT FS Fieldstrength Controlled

Rectifier Voltage

0) All thresholds are measured using a pulse with TR=2µs, T

1) NBT represents the Noiseblanker-Byte bits D2; D0 for the noise blanker trigger threshold

2) NAT represents the Noiseblanker-Byte bit pair D4,D3 for the noise controlled trigger adjustment

3) OVD represents the Noiseblanker-Byte bit pair D7,D6 for the over deviationdetector

4) FSC represents the Fieldstrength-Byte bitpair D1,D0 for the fieldstrengthcontrol

0) 1)

meas. with VPEAK = 0.9V NBT = 111 30 mVOP

NBT = 110 35 mVOP
NBT = 101 40 mV
NBT = 100 45 mV
NBT = 011 50 mV
NBT = 010 55 mV
NBT = 001 60 mVOP
NBT = 000 65 mVOP

2)

meas. with V

= 1.5V NCT = 00 260 mV

PEAK

NCT = 01 220 mV
NCT = 10 180 mV
NCT = 11 140 mV

V

MPX = 50mV; f = 150KHz 1.7 V

V

MPX = 100mV; f = 150KHz 2.5 V

3)

means. with
V

MPX = 800mV

(75KHz dev.)

OVD = 11 0.9(off) V
OVD = 10 1.2 V
OVD = 01 2.0 V
OVD = 00 2.8 V

4)

means. with
V

= 0mV

MPX

V

<< V

LEVEL

SBL

(fully mono)

=2µs and TF=10µs.

HIGH

FSC = 11 0.9(off) V
FSC = 10 1.3 V
FSC = 01 1.8 V
FSC = 00 2.3 V

OP
OP
OP
OP

OP
OP
OP
OP

OP
OP
OP
OP

12/26

V

IN

DC

D97AU636

V

OP

TRT

HIGH

T

F

Time

Figure 13. TriggerThresholdvs. VPEAK

VTH

TDA7403

260mV(00)
220mV(01)
180mV(10)
140mV(11)

MIN. TRIG. THRESHOLD

65mV

8 STEPS

30mV

0.9V

Figure 14. DeviationControlled Trigger

Adjustment

V

PEAK

)

(V

OP

00

2.8

2.0

1.2

0.9

D97AU649

20

32.5 45 75

01

10

DETECTOR OFF(11)

DEVIATION(KHz)

Figure 16. Block diagram of the stereo decoder

NOISE

CONTROLLED

TRIG. THRESHOLD

V

D97AU648

1.5V

PEAK(V)

Figure 15. FieldstrengthControlled Trigger

Adjustment

V

PEAK

MONO STEREO

»3V

2.3V(00)

1.8V(01)

1.3V(10)

NOISE

noisy signal good signal

ATC_SB OFF (11)

D98AU863

0.9V

E’

MPX

100K

D98AU952

INGAIN

3.5 ... 11dB
STEP 2.5dB

INFILTER

LP

80KHz

4.th ORDER

PLL

+

PILOT-DET.

F19
F38

STEREO

NOISE BLANKER

HOLDN

DEMODULATOR

- PLOT

CANC

- ROLL-OFF

- LP25KHz

COMP.

SB CONTROL

DEEMPHASIS

+ HIGHCUT

t=50 or75µs

CONTROL

REF 5V
VSBL

LEVEL INTERN

FM_L

FM_R

HC

LEVEL INPUT

LP 2.2KHZ

1.th ORDER
GAIN 0..10dB

VHCCH
VHCCL

LEVEL

D

A

13/26

TDA7403

DESCRIPTIONOFSTEREODECODER

The stereodecoderpart of the TDA7403 (see Fig.

16) contains all functions necessary to demodu­late the MPX signal like pilot tone dependent
MONO/STEREO switching as well as
”stereoblend”and ”highcut”functions.

Adaptations like programmable input gain, roll-off
compensation, selectable deemphasis time con­stant and a programmable fieldstrength input al­low to usedifferentIF devices.

StereodecoderMute

The TDA7403has a fastand easy to control RDS
mute function which is a combination of the
audioprocessor softmute and the high-ohmic
mute of the stereodecoder. If the stereodecoder
is selected and a softmute command is sent (or
activated through the SM pin) the stereodecoder
will be set automatically to the high-ohmic mute
condition after the audio signal has been soft­muted.

Hence a checking of alternate frequencies could
be performed. To release the system from the
mute condition simply the unmutecommandmust
be sent: the stereodecoder is unmuted immedi­ately and the audioprocessor is softly unmuted.
Fig. 17 shows the output signal V

as well as the

O

internal stereodecoder mute signal. This influ­ence of Softmuteon the stereodecoder mute can
be switched off by setting bit 3 of the Softmute
byte to ”0”. A stereodecoder mute command (bit
0, stereodecoder byte set to ”1”) will set the
stereodecoder in any case independently to the
high-ohmicmute state.

If any other source than the stereodecoderis se­lected the decoder remains muted and the MPX
pin is connectedto Vref to avoid any discharge of
the coupling capacitor through leakage currents.

Input Stages

The Ingain stage allows to adjust the MPX signal
to a magnitudeof about 1Vrms internally which is
the recommended value. The 4.th order input fil­ter has a corner frequency of 80kHz and is used
to attenuatespikes and noise and acts as an anti­aliasing filter for the following switch capacitor fil­ters.

Figure 17. Signalsduring stereodecoder’s

softmute

SOFTMUTE

COMMAND

t

STD MUTE

t

V

O

D97AU638

t

pass behaviour of the tuner section. If the tuner
attenuation at 38kHz is in a range from 20.2% to
31% the TDA7403needs no external network be­fore the MPX pin. Within this range an adjustment
to obtain at least 40dB channel separationis pos­sible.

The bits for this adjustment are located together
with the fieldstrength adjustment in one byte. This
gives the possibility to perform an optimization
step during the production of the carradio where
the channelseparation and the fieldstrengthcon­trol are trimmed.

Deemphasisand Highcut

The lowpass filter for the deemphasis allows to
choose between a time constant of 50µs and
75µs (bit D7, Stereodecoderbyte).

The highcut control range will be in both cases
t

HC

=2⋅t

. Inside the highcut control range

Deemp

(between VHCH and VHCL) the LEVEL signal
is converted into a 5 bit word which controls the
lowpasstime constantbetweent

Deemp

...3⋅t

Deemp

There by the resolution will remain always 5 bits
independently of the absolute voltage range be­tween the VHCH and VHCL values.

The highcut function can be switched off by I2C
bus (bit D7, Fieldstrengthbyte set to ”0”).

.

Demodulator

In the demodulator block the left and the right
channel are separated from the MPX signal. In
this stage also the 19 kHz pilot tone is cancelled.
For reaching a high channel separation the
TDA7403 offers an I2C bus programmable roll-off
adjustment which is able to compensate the low-

14/26

PLL and Pilot Tone Detector

The PLL has the task to lock on the 19kHz pilo­tone during a stereo transmission to allow a cor­rect demodulation.The included detector enables
the demodulation if the pilot tone reaches the se­lected pilottone threshold VPTHST. Two different
thresholdsare available. The detector output (sig­nal STEREO,seeblock diagram)can be checked

TDA7403

by reading the status byte of the TDA7403 via
I2C bus.

FieldstrengthControl

The fieldstrength input is used to control the high
cut and the stereoblend function. In addition the
signal can be also used to control the noise­blanker thresholds.

LEVEL Input and Gain

To suppress undesired high frequency modula­tion on the highcut and stereoblend function the
LEVEL signal is lowpass filtered firstly. The filter
is a combination of a 1st order RC lowpass at
53kHz (working as anti-aliasing filter) and a 1st­order switched capacitor lowpass at 2.2kHz. The
second stage is a programmable gain stage to
adapt the LEVEL signal internally to different IF.

The gain is widely programmable in 16 steps
from 0dB to 10dB (step = 0.67dB). These 4 bits
are located together with the Roll-Off bits in the
”Stereodecoder Adjustment” byte to simplify a
possible adaptation during the production of the
carradio.

StereoblendControl

The stereoblend control block converts the inter­nal LEVEL voltage (LEVEL INTERN) into an de­modulatorcompatible analog signal which is used
to control the channel separation between 0dB
and the maximum separation. Internally this con­trol range has a fixed upper limit which is the in­ternal reference voltage REF5V. The lower limit
can be programmed to be 33%, 42%, 50% or
58% of REF5V (see fig. 19).

To adjust the external LEVEL voltage to the inter­nal range two valuesmust be defined: the LEVEL

Figure 18. Internalstereoblendcharacteristics

gain L

and VSBL. To adjust the voltage where

G

the full channel separation is reached (VST) the
LEVEL gain L

has to be defined. The following

G

equation can be used to estimate the gain:

=

L

G

Field strength voltage

REF5V

[STEREO]

The gain can be programmed through 4 bits in
the ”Stereodecoder-Adjustment”byte.

The MONO voltage VMO (0dB channel separa­tion) can be choosen selecting 33, 42,50 or 58%
of REF5V.
All necessary internal reference voltages like
REF5V are derived from a bandgap circuit.
Therefore they have a temperature coefficient
near zero. This is useful if the fieldstrengthsignal
is alsotemperaturecompensated.

But mostIF devicesapplya LEVELvoltagewith a
TC of 3300ppm. The TDA7403 offers this TC for
the reference voltages, too. The TC is selectable
with bit D7 of the ”stereodecoder adjustment”
byte.

Figure 19. Relationbetweeninternaland external LEVEL voltage and setup of Stereoblend

INTERNAL

VOLTAGES

REF 5V

VSBL

SETUP OF VST

LEVEL INTERN

LEVEL

VSTVMO

t

FIELDSTRENGHT VOLTAGE

INTERNAL

VOLTAGES

REF 5V

VSBL

58%
50%
42%
33%

D97AU639

SETUP OF VMO

VMO FIELDSTRENGHT VOLTAGE

LEVEL INTERN

VST

t

15/26

TDA7403

Highcut Control

The highcut control setup is similar to the
stereoblend control setup : the starting point
VHCH can be set with 2 bits to be 42, 50, 58 or
66% of REF5V whereas the range can be set to
be 17 or 33% of VHCH (see fig. 20).

Figure 20. Highcut characteristics

LOWPASS

TIME CONSTANT

3•τ

Deemp

τ

Deemp

D97AU640

FIELDSTRENGHTVHCHVHCL

FUNCTIONAL DESCRIPTION OF THE NOISE­BLANKER

In the automotive environment the MPX signal is
disturbed by spikes produced by the ignition and
for example the wiper motor. The aim of the
noiseblanker part is to cancel the audible influ­ence of the spikes. Therefore the output of the
stereodecoder is held at the actual voltage for
40µs.

In a first stage the spikes must be detected but to
avoid a wrong triggering on high frequency
(white) noise a complex trigger control is imple­mented. Behind the triggerstage a pulse former
generates the ”blanking” pulse. To avoid any
crosstalk to the signalpath the noiseblanker is

suppliedby his own biasing circuit.

TriggerPath

The incoming MPX signal is highpass filtered,
amplified and rectified. This second order high­pass-filter has a corner frequency of 140kHz. The
rectified signal, RECT, is lowpass filtered to gen­erate a signal called PEAK. Also noise with a fre­quency 140kHz increases the PEAK voltage. The
PEAK voltage is fed to a threshold generator,
which adds to the PEAK voltage a DC depend­ent threshold VTH. Both signals, RECT and
PEAK+VTH are fed to a comparator which trig­gers a re-triggerable monoflop. The monoflop’s
output activates the sample-and-hold circuits in
the signalpathfor 40µs.

The block diagram of the noiseblanker is given in
fig.20.

Automatic Noise Controlled Threshold Adjust­ment (ATC)

There are mainly two independentpossibilities for
programmingthe trigger threshold:

a the low threshold in 8 steps(bits D0 to D2 of

the noiseblankerbyte)

b the noise adjustedthresholdin 4 steps

(bits D3 andD4 of the noiseblankerbyte,
see fig. 13).

The low threshold is active in combination with a
good MPX signal without any noise; the PEAK
voltage is less than 1V. The sensitivity in this op­eration is high.

If the MPX signal is noisy the PEAK voltage in­creases due to the higher noise, which is also
rectified. With increasing of the PEAK voltage the
trigger threshold increases, too. This particular
gain isprogrammablein 4 steps (see fig. 13).

Figure 21. Block diagram of the noiseblanker

RECTIFIER

LOWPASS

D98AU861

16/26

MPX

HIGH PASS

RECT

+

-

VTH

+

PEAK

+

MONOFLOP HOLDN

THRESHOLD

GENERATOR

ADDITIONAL
THRESHOLD

CONTROL

TDA7403

Automatic Threshold Control

Besides the noise controlled threshold adjust­ment there is an additionalpossibility for influenc­ing the trigger threshold. It is depending on the
stereoblendcontrol.

The point where the MPX signal starts to become
noisy is fixed by the RF part. Therefore also the
starting point of the normal noise-controlled trig­ger adjustment is fixed (fig. 15). In some cases
the behaviour of the noiseblanker can be im­proved by increasing the threshold even in a re­gion of higher fieldstrength. Sometimes a wrong
triggering occures for the MPXsignal often shows
distortion in this range which can be avoided
even if using a low threshold.

Because of the overlap of this range and the
range of the stereo/monotransitionit can be con­trolled by stereoblend. This threshold increase is
programmable in 3 steps or switched off with bits
D0 and D1 of the fieldstrengthcontrolbyte.

Figure 23. ApplicationExample.

V

S

CASS R

+V

CC

=

9V

100nF

100nF

CASS R

Over Deviation Detector

If the system is tuned to stations with a high de­viation the noiseblanker can trigger on the higher
frequencies of the modulation. To avoid this
wrong behaviour, which causes noise in the out­put signal, the noiseblankeroffers a deviationde­pendent threshold adjustment.

By rectifying the MPX signal a further signal rep­resenting the actual deviation is obtained. It is
used to increase the PEAK voltage. Offset and
gain of this circuit are programmable in 3 steps
with the bits D6 and D7 of thestereodecoderbyte
(the first stepturns off thedetector,see fig. 15).

TEST MODE

During the test mode which can be activated by
setting bit D0 of the testing byte and bit D5 of the
subaddress byte to ”1” several internal signals
are available at the CASSR pin. During this
mode the input resistance of 100kOhmis discon­nected from the pin. The internalsignalsavailable
are shown in the software specification.

10µF

OUTLF

OUTRF

OUTLR

CREF

OUTLF

OUTRF

OUTLR

CASS L

MPX

AM

100nF

220nF

220nF

CASS L

MPX

AM

OUTRR

SDA

SCL

SMUTE

LEVEL

GND

D98AUxx5

OUTRR

SDA

SCL

SMUTE

LEVEL

17/26

TDA7403

I2C BUS INTERFACE DESCRIPTION
Interface Protocol

The interfaceprotocolcomprises:

-a startcondition (S)

/ write transmission)

-a subaddressbyte

-a sequenceof data (N-bytes+ acknowledge)

-a stop condition (P)

-a chip address byte (the LSB bit determinesread

CHIP ADDRESS

MSB LSB MSB LSB MSB LSB

S1000110R/WACK ACK ACKP

D97AU627

S = Start
ACK = Acknowledge
AZ = AutoZero-Remain

SUBADDRESS DATA 1 to DATA n

XI

AZ T A3 A2 A1 A0 DATA

Auto increment

If bit I in the subaddress byte is set to ”1”, the
autoincrementof the subaddressis enabled.

T = Testing
I = Autoincrement
P = Stop
MAX CLOCK SPEED500kbits/s

The transmitted data is automatically updated af­ter each ACK.

Transmission can be repeated without new chip

TRANSMITTED DATA

MSB LSB

XXXXSTSMXX

SM = Soft mute activated
ST = Stereo
X = Not Used

(sendmode)

address.

SUBADDRESS (receive mode)

MSB LSB FUNCTION

X AZ T I A3A2A1A0

Not allowed

0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

0

Loudness / Auto-Zero

1

Volume

0

Softmute / Beep

1

Bass / Treble Attenuator

0

Bass / Treble Configuration

1

Speaker attenuator LF

0

Speaker attenuator LR

1

Speaker attenuator RF

0

Speaker attenuator RR / Blanktime adjust

1

Stereodecoder

0

Noiseblanker

1

Fieldstrength Control

0

Configuration

1

Stereodecoder Adjustment

0

Testing

1

T = Testmode
I = Autoincrement
AZ = Auto Zero Remain
X = not used

18/26

DATA BYTE SPECIFICATION
Input Selector

MSB LSB FUNCTION

D7 D6 D5 D4 D3 D2 D1 D0

Source Selector

don’t use

0
0
0
0
1
1
1
1

0
1

1
0
0
1

0
0

:
1
1

For example to select the CD input in quasi-differential mode with gain of 8dB the Data Byte is:0/01111000

0
0

:
1
1

0
1

:
0
1

0
0
1
1

0
0
1
1
0
0
1
1

1
1
0
0

0

Cassette

1

don’t use

0

AM

1

Stereo Decoder

0

Input FM

1

Mute

0

don’t use

1

CD Mode

CD Full-differential
CD Quasi-diff

AM/FM Mode

AM mono

1

AM stereo

1

AM through Stereo/Decoder

0

FM- Stereo/Decoder

0

In-Gain

14dB
12dB
:
2dB
0dB

TDA7403

Loudness

MSB LSB LOUDNESS

D7 D6 D5 D4 D3 D2 D1 D0

Attenuation

0dB

0
0

:
1
1

0
1

0
1

0
1

1 must be ”1”

Note: The attenuation is specified at highfrequencies.Around thecenterfrequency the value is different dependingon theprogrammed

attenuation(see Loudness frequency response).

0
0

:
1
1

0
0

:
1
1

0

-1dB

1

:

:

-14dB

0

-15dB

1

Filter

on
off (flat)

Center Frequency

200Hz
400Hz

LoudnessQ

low (1
normal (2

st

order)

nd

order)

19/26

TDA7403

Mute, Beep and Mixing

MSB LSB MUTE/BEEP/MIXING

D7 D6 D5 D4 D3 D2 D1 D0

Mute

Enable Softmute

0

Disable Softmute

1
0
0
1

0
1

0
1

0

0
0
1
1

Note: for more information tothe Stereodecoder-Softmute-Influence please refer to the stereodecoder description.

0
1
0
1

1

1

0
1
0
1

Mute time =0.48 ms
Mute time =0.96 ms
Mute time =40.4 ms
Mute time =324 ms
Stereo Decoder Softmute Influence = off
Stereo Decoder Softmute Influence = on

Beep

Beep Frequency = 600Hz
Beep Frequency = 1.2KHz

Mixing

Mix-Source = Beep
Mix-Source = Phone
Full Mix Signal
Source -12dB + Mix-Signal -2.5dB
Source -6dB + Mix-Signal -6dB
Full Source

Volume

MSB LSB ATTENUATION

D7 D6 D5 D4 D3 D2 D1 D0

Gain/Attenuation

+32dB

0
0

:
0
0
0

:
0
0
0

:
1
1

0
1

Note: It is not recommended to use a gain more than20dB for system performancereason. Ingeneral, the max. gain should be limitedby

softwareto themaximum value,which is needed for the system.

0
0

:
0
0
0

:
0
1
1

:
1
1

0
0

:
0
0
0

:
1
0
0

:
0
0

0
0

:
1
1
1

:
1
0
0

:
1
1

0
0

:
1
1
1

:
1
0
0

:
1
1

0
0

:
0
0
1

:
1
0
0

:
1
1

0

+31dB

1

:

:

+20dB

0

+19dB

1

+18dB

0

:

:

+1dB

1

0dB

0

- 1dB

1

:

:

-78dB

0

-79dB

1

Softstep

Softstep Volume = off
Softstep Volume = on

20/26

TDA7403

Bass & Treble Attenuation

MSB LSB BASS & TREBLE ATTENUATION

D7 D6 D5 D4 D3 D2 D1 D0

Treble Steps

-14dB

0
0

:
0
0
1
1

:
1
1

0
0

:
0
0
1
1

:
1
1

For example 12dB Trebleand -8dB Bass give the followingDATABYTE : 0 0 1 1 1 001.

0
0

:
1
1
1
1

:
0
0

0
0

:
1
1
1
1

:
0
0

0
1

:
0
1
1
0

:
1
0

0
0

:
1
1
1
1

:
0
0

0
0

:
1
1
1
1

:
0
0

0
1

:
0
1
1
0

:
1
0

-12dB
:

-2dB
0dB
0dB

+2dB
:
+12dB
+14dB

Bass Steps

-14dB

-12dB

:

-2dB
0dB
0dB

+2dB
:
+12dB
+14dB

Bass & Treble Filter Characteristics

MSB LSB BASS& TREBLEFILTER

D7 D6 D5 D4 D3 D2 D1 D0

Treble

Center Frequency = 10 KHz

0
0
1
1

0
0
1

1
1
0
0
1
1

0
1

1 must be ”1”

For example Treble center frequency = 15kHz, Bass center frequency = 100Hz, Bass Q = 1 and DC = 0dB give the following DATA BYTE: 1
0001110

1
0
1
0
1

1

0
1
0
1
1

0

Center Frequency = 12.5 KHz

1

Center Frequency = 15 KHz

0

Center Frequency = 17.5 KHz

1

Bass

Center Frequency = 60 Hz
Center Frequency = 70 Hz
Center Frequency = 80 Hz
Center Frequency = 100Hz
Center Frequency = 150Hz
Quality factor = 1
Quality factor = 1.25
Quality factor = 1.5
Quality factor = 2
DC-Gain = 0dB
DC-Gain =±4.4dB

21/26

TDA7403

Speaker Attenuation (LF, LR, RF, RR)

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

0
0

:
1
0
0
1
1
0
0
1
1

11

0
0
1
1

0
1
0
1

0
0

:
0
0
0
0
0
0
0
0
0
1

0
0

:
1
1
1
1
1
1
1
1
1

0
0

:
0
1
1
1
1
1
1
1
1

0
0

:
1
0
0
0
0
1
1
1
1

Attenuation

0dB

0

-1dB

1

:

:

-23dB

1

-24.5dB

0

-26dB

1

-28dB

0

-30

1

-32dB

0

-35dB

1

-40dB

0

-50dB

1

Speaker Mute
Must be ”1” (except RR speaker; see below)

Blank Time adj.

38µs

25.5µs
32µs
22µs

(only at RR speaker)

Stereodecoder

MSB LSB FUNCTION

D7 D6 D5 D4 D3 D2 D1 D0

0

STD Unmuted

1

STD Muted

0
0
1
1

1 must be ”1”

1
1

0
1

0
1

0
1

0
1
0
1

IN-Gain 11dB
IN-Gain 8.5dB
IN-Gain 6dB
IN-Gain 3.5dB

Forced MONO
MONO/STEREO switch automatically

Pilot Threshold HIGH
Pilot Threshold LOW

Deemphasis 50µs
Deemphasis 75µs

22/26

Noiseblanker

MSB LSB FUNCTION

D7 D6 D5 D4 D3 D2 D1 D0

Low Threshold 65mV

0
0
0
0
1
1
1
1

0
0
1
1

0
1

0
0
1
1

0
1
0
1

0
1
0
1

0
0
1
1
0
0
1
1

0

Low Threshold 60mV

1

Low Threshold 55mV

0

Low Threshold 50mV

1

Low Threshold 45mV

0

Low Threshold 40mV

1

Low Threshold 35mV

0

Low Threshold 30mV

1

Noise Controlled Threshold 320mV
Noise Controlled Threshold 260mV
Noise Controlled Threshold 200mV
Noise Controlled Threshold 140mV

Noise blanker OFF
Noise blanker ON

Over deviation Adjust 2.8V
Over deviation Adjust 2.0V
Over deviation Adjust 1.2V
Over deviation Detector OFF

TDA7403

FieldstrengthControl

MSB LSB FUNCTION

D7 D6 D5 D4 D3 D2 D1 D0

Noiseblanker Field strength Adj 2.3V

0
0
1
1

0
0
1
1

0
0
1
1

1
0

0
1

0
1
0
1

0
1
0
1

0

Noiseblanker Field strength Adj 1.8V

1

Noiseblanker Field strength Adj 1.3V

0

Noiseblanker Field strength Adj OFF

1

VSBL at 33% REF5V
VSBL at 42% REF5V
VSBL at 50% REF5V
VSBL at 58% REF5V

VHCH at 42% REF 5V
VHCH at 50% REF 5V
VHCH at 58% REF 5V
VHCH at 66% REF 5V

VHCL at 17% VHCH
VHCL at 33% VHCH

High cut OFF
High cut ON

23/26

TDA7403

StereodecoderAdjustment

MSB LSB FUNCTION

D7 D6 D5 D4 D3 D2 D1 D0

Roll-Off Compensation

not allowed

0

20.2%

1

21.9%

0

:

:

25.5%

0

:

:

31.0%

1

LEVEL Gain

0dB

0.66dB

1.33dB
:
10dB

Temperature compensation atLEVEL input

TC = 0
TC = 16.7mV/K (3300ppm)

0
1

Testing

0
0
0

:
1

:
1

0
0
0

:

1

0
0
0

:

1

0
0
1

:

1

0
1
0

:

1

0
0
1

:

0

:

1

MSB LSB FUNCTION

D7 D6 D5 D4 D3 D2 D1 D0

Stereodecoder test signals

OFF

0

Test signals enabled if bit D5 of the subaddress

1

(test mode bit) is set to ”1”, too

0
1

0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

0
1

0
1

0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

External Clock
Internal Clock

Testsignals at CASS_R

VHCCH
Level intern
Pilot magnitude
VCOCON; VCO Control Voltage
Pilot threshold
HOLDN
NB threshold
F228
VHCCL
VSBL
not used
not used
PEAK
not used
REF5V
not used

VCO

OFF
ON

Audioprocessor test mode

only if bit D5 of the subaddress
(test mode bit) is set to ”1”
OFF

Note :This byteis usedfortestingorevaluation purposesonly andmust notbeset toothervaluesthanthedefault”11111110”in theapplication!

24/26

TDA7403

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 2.35 2.65 0.093 0.104

A1 0.1 0.3 0.004 0.012

B 0.33 0.51 0.013 0.020

C 0.23 0.32 0.009

D 12.6 13 0.496 0.512

E 7.4 7.6 0.291 0.299

e 1.27 0.050

H 10 10.65 0.394 0.419

h 0.25 0.75 0.010 0.030

L 0.4 1.27 0.016 0.050

K0°(min.)8°(max.)

mm inch

0.013

OUTLINE AND

MECHANICAL DATA

SO20

B

e

D

1120

110

L

hx45°

A

K

A1

C

H

E

SO20MEC

25/26

TDA7403

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval ofSTMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

 1999 STMicroelectronics – Printedin Italy–All RightsReserved

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26/26