– INDEPENDENTMUTE FUNCTION
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIAL BUS
DESCRIPTION
The TDA7345 is a volume tone (bass and treble)
balance (Left/Right) processor for quality audio
applicationsin car radio and Hi-Fi systems.
It reproduces surround sound by using phase
shifters and a signal matrix. Control of all the
functionsis accomplishedby serial bus.
The AC signal setting is obtained by resistor net-
TDA7345
SO28
ORDERING NUMBER:
works and switches combined with operational
amplifiers.
Thanks to the usedBIPOLAR/CMOSTechnology,
Low Distortion, Low Noise and DC stepping are
obtained.
Operating Ambient Temperature-10 to 85°C
Storage Temperature Range-55 to +150°C
stg
QUICK REFERENCE DATA
SymbolParameterMin.Typ.Max.Unit
V
V
CL
THDTotal Harmonic Distortion V = 1Vrms f = 1KHz0.020.1%
S/NSignal to Noise Ratio V
S
Supply Voltage7910.5V
S
Max. input signal handling2Vrms
out = 1Vrms (made = OFF)106dB
Channel Separation f= 1KHz70dB
C
Volume Control 1.25dB step-78.750dB
Treble Control (2db step)-14+14dB
Bass Control (2db step)-14+14dB
Balance Control 1.25dB step REC-OUT L & R-38.750dB
Balance Control 1.25dB step (L
OUT,ROUT
)-78.750dB
Mute Attenuation90dB
C/W
°
3/18
TDA7345
ELECTRICALCHARACTERISTICS
R
= 600Ω, all controls flat (G = 0),Effect Ctrl = -6dB, MODE= OFF; f = 1KHz
G
(refer to the testcircuit T
=25°C, VS= 9V, RL= 10KΩ,
amb
unless otherwisespecified)
SymbolParameterTest ConditionMin.Typ.Max.Unit
SUPPLY
V
S
I
S
SVRRipple RejectionL
Supply Voltage7910.5V
Supply Current202535mA
CH /RCH out, Mode = OFF6080dB
INPUT STAGE
C
RANGE
A
A
A
V
R
II
V
CL
VMIN
VMAX
STEP
DC
Input Resistance355065KΩ
Clipping LevelTHD = 0.3%; Lin or Rin22.5Vrms
THD = 0.3%; Rin + Lin (2)3.0Vrms
Control Range19.68dB
Min. Attenuation-101dB
Max. Attenuation18.6819.6820.68dB
Step Resolution0.110.310.51dB
DC Stepsadjacent att. step-303mV
VOLUMECONTROL
C
RANGE
A
VMIN
A
VMAX
A
STEP
E
A
E
T
V
DC
Control Range7075dB
Min. Attenuation-101dB
Max. Attenuation7075dB
Step ResolutionAv = 0to -40dB0.51.251.75dB
Attenuation Set ErrorAv = 0to -20dB
Av = -20to -60dB
-1.5
-3
01.5
2
Tracking Error2dB
DC Stepsadjacent attenuation steps-303mV
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
(Rin→ R
)–(Lin→ L
out
Input signal of 1kHz, 1.4 V
(Rin→ R
)–(Lin→ L
out
Input signal of 1kHz, 1.4 V
Rin→ R
out,Lin
→ L
out
out
out
p-p
)
p-p
)
p-p
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
R
(R
in
→
out
)–(L
→
in
p-p
L
)
out
Input signal of 250Hz,
1.4 V
p-p,Rin
and L
L
→
in
out
Input signal of 1kHz,
1.4 V
p-p,Rin
and Lin→ L
out
Input signal of 3.6kHz,
1.4 V
p-p,Rin
and Lin→ L
out
Input signal of 250Hz,
1.4 V
p-p,Rin
and Lin→R
out
Input signal of 1kHz,
1.4 V
p-p,Rin
and L
R
→
in
out
Input signal of 3.6kHz,
1.4 V
p-p,Rin
and Lin→ R
out
-1.501.5dB
-1.501.5dB
7dB
8dB
0dB
6dB
7.5dB
0dB
4.5dB
– 4.0dB
7.0dB
– 4.5dB
3.8dB
–20dB
Ω
Ω
Ω
5/18
TDA7345
ELECTRICALCHARACTERISTICS(continued)
SymbolParameterTest ConditionMin.Typ.Max.Unit
SPEAKERATTENUATORS (REC_OUT_L, REC_OUT_R)
C
S
A
range
STEP
E
MUTE
V
DC
A
Control Range3537.540dB
Step Resolution0.51.251.75dB
Attenuation set error-1.51.5dB
Output Mute Attenuation8090dB
DC Stepsadjacent att. steps-303mV
SPEAKERATTENUATORS (LOUT,ROUT)
C
S
A
range
STEP
E
V
DC
MUTE
A
Control Range7075dB
Step ResolutionAv = 0 to -40dB0.51.251.75dB
Attenuation set errorAv = 0 to 20dB-1.501.5dB
Av = -20 to -60dB-302dB
DC Stepsadjacent att. steps-303mV
Output Mute Attenuation8090dB
AUDIO OUTPUTS (LOUT,ROUT, REC_OUT_L, REC_OUT_R)
V
OCL
R
OUT
V
OUT
Clipping Leveld =0.3%22.5Vrms
Output resistance100200300Ω
DC Voltage Level4.24.54.8V
GENERAL
N
O(OFF)
N
O(MOV)
N
O(MUS)
N
O(MON)
dDistorsionAv = 0 ; V
S
C
Output Noise(OFF)BW= 20Hzto 20KHz
Output LOUT, ROUT,
Output: REC-OUT-L,
REC-OUT-R
Output Noise(Movie)Mode =Movie ,
B
= 20Hzto 20KHz
W
R
out
and L
measurement
out
Output Noise(Music)Mode = Music ,
B
= 20Hzto 20KHz,
W
R
out
and L
measurement
out
Output Noise(Simulated)Mode = Simulated,
B
= 20Hzto 20KHz
W
R
out
and L
measurement
out
in = 1Vrms0.020.1%
Channel Separation6070dB
BUS INPUTS
8
8
1515µVrms
Vrms
µ
30µVrms
30µVrms
30
Vrms
µ
V
IL
V
IH
I
IN
V
O
Input Low Voltage1V
Input High Voltage3V
Input Current-5+5µA
Output VoltageSDA
IO= 1.6mA0.40.8V
Acknowledge
Note:
(1) Bass and Treble response: The center frequency and the resonance quality can be choosen by
the external circuitry. A standard first order bass response can be realized by a standard feedback network.
V
(2) The peack voltage of the two input signals must be less then
V
(Lin + Rin)
peak
•
S
<
A
Vin
2
S
:
2
6/18
TDA7345
2
C BUSINTERFACE
I
Data transmission from microprocessor to the
TDA7345 and viceversa takes place through the
2 wires I
2
C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be connected).
Data Validity
As shown in fig. 3, the data on the SDA line must
be stable during the high period of theclock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and StopConditions
As shown in fig.4 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCLis HIGH.
Byte Format
Every byte transferred on the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
Figure 3:
Data Validityon theI
2
CBUS
knowledgebit. The MSBis transferredfirst.
Acknowledge
The master (µP)puts a resistiveHIGHlevel on the
SDA line during the acknowledgeclock pulse (see
fig. 5). The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDAlineisstableLOWduringthis clockpulse.
The audioprocessor which has been addressed
has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can generate the STOP information in order to abort the
transfer.
Transmission withoutAcknowledge
Avoiding to detect the acknowledge of the audio-
processor,the µP can use a simplertransmission:
simply it waits one clock without checking the
slaveacknowledging,and sends the new data.
This approach of course is less protected from
misworkingand decreasesthe noise immunity.
Figure 4:
TimingDiagram of I
2
Figure 5: Acknowledgeon the I
CBUS
2
CBUS
7/18
TDA7345
SOFTWARESPECIFICATION
InterfaceProtocol
The interfaceprotocol comprises:
A startcondition (s)
A chip address byte, containing the TDA7345
address (the 8th bit of the byte must be 0).
The TDA7345 must always acknowledge at
TDA7345 ADDRESS
MSBLSBMSBLSBMSBLSB
S10000010ACKDATAACKDATAACKS
D94AU194
the endof eachtransmittedbyte.
A subaddress(function) bytes (identifiedby the
MSB = 0)
A sequence of dates and subaddresses (N
bytes + achnowledge. The dates are identified
by MSB = 1, subaddressesby MSB = 0)
A stopcondition (P)
Data Transferred (N-bytes + Acknowledge)
ACK = Achnowledge
S = Start
P = Stop
INTERFACEFEATURES
- Due to the fact that the MSB is used to select
if the byte transmitted is a subaddress (function) or a data (value), between a start and
stop condition, is possible to receive, how
manysubaddressesand datas as wanted.
chip address, a subaddresswith the LSB = 0 (no
incremental bus), N-datas (all these datas concern the subaddress selected), a new subaddress,N-data, a stop condition.
So it can receive in a single transmission how
many subaddress are necessary, and for each
subaddresshow manydata are necessary.
- The subaddress (function) is fixed until a new
subaddress is transmitted, so the TDA7345
can receive how many data as wantedfor the
selected subaddress (without the need for a
new startcondition)
- If TDA7345 receives a subaddress with the
LSB = 1 the incremental bus is selected, so it
enters in a loop condition that means that
every acknowledge will increase automatically the subaddress (function) and it receives the data related to the new subaddress.
2) INCREMENTAL BUS
TDA7345 receives a start condition, the correct
chip address a subaddress with the LSB = 1 (incremental bus): now it is in a loop condition with
an autoincreaseof thesubaddress.
The first data that it receives doesn’t concern the
subaddress sended but the next one, the second
one concerns the subaddresssended plus two in
the loop etc, and at the end it receives the stop
condition.
In the pictures there are some examples:
EXAMPLES
S = start
ACK= acknowledge
1) NO INCREMENTAL BUS
TDA7345 receives a start condition, the correct
B = 1 incrementalbus, B = 0 no incrementalbus
P = stop
1) one subaddress,with n dataconcerningthat subaddress(no incrementalbus)
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S10000010ACKA2ACKDATAACK P
D94AU195
8/18
SUBADDRESSDATA 1 ... DATA n
0A0A1A3XX 01
TDA7345
2) one subaddress,(with incrementalbus) , with n data (data1that concerns subaddress+1, data 2
that concernssubaddress+ 2 etc.)
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S10000010ACKA2ACKDATAACK P
D94AU196
SUBADDRESSDATA 1 ... DATA n
0A0A1A3XX 11
3) moresubaddress withmore data
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S10000010ACKA2ACKDATA
D94AU197
SUBADDRESSDATA 1 ... DATA n
0A0A1 A3XX 01
SUBADDRESSDATA 1 ... DATA n
MSBLSBMSBLSB
ACKA2ACKDATAACK 1
0A0A1 A3XX 01
DATA BYTES
FUNCTIONSELECTION
FIRST BYTE(subaddress)
The first byte select the function,it is identifiedby theMSB = 0
MSBLSBSUBADDRESS
A0A1A2A3B
0000XXXBVOLUME ATTENUATION &
LOUDNESS
0100XXXBSURROUND & OUT &
EFFECT CONTROL
0010XXXBBASS
0110XXXBTREBLE
0001XXXBREC-OUT-R
0101XXXBREC-OUT-L
0011XXXBR
01110XXBL
OUT
OUT
01111XXBINPUT STAGE CONTROL
B = 1 yesincremental bus;
B = 0 no incremental bus;
X = indifferent 0,1
9/18
TDA7345
VALUE SELECTION
The secondbyte select the value,it is identifiedby the MSB = 1
VOLUME ATTENUATIONMAX ATTENUATION,
TREBLE-14dB
BASS-14dB
SURROUND + EFFECT CONTROLOFF + MAX ATTENUATION
ATT SPEAKER RMUTE
ATT SPEAKER LMUTE
ATT REC-OUT LMUTE
ATT REC-OUT RMUTE
13/18
TDA7345
PIN:
PIN:
HP1
L
in,Rin
LP1
HP2
PIN:
HP2
V
GND
S
V
20µA
5.5K
60K
5.5K
D94AU199
S
V
S
10K
60K
GND
D94AU198
V
S
HP1
PIN:
BASS- LA, BASS - RA
20µA
20µA
50K
GND
V
REF
PIN: BASS- LB,BASS- RB
V
S
BASS-LA
BASS-RA
D94AU200
48KGND
20µA
D94AU202
BASS-LB
GND
BASS-RB
PIN: TREBLE- L, TREBLE- R
V
S
25K
48K
D94AU201
20µA
D94AU203
14/18
TDA7345
PIN:
PIN:
L
LP
OUT
,
V
, REC-OUT-1REC-OUT-R
R
OUT
S
20µA
PIN:
SCL,SDA
20µA
100Ω
D94AU204
PIN:
PS3, PS2
V
V
S
20µA
S
D94AU205
20µA
PIN:
C
REF
V
S
GND
D94AU206
10K
50K
50K
20µA
D94AU208
PIN:
PS2
PS3A
PS4A
PS2A
D94AU207
V
S
D94AU209
18.08K
20µA
398Ω
15/18
TDA7345
PIN:
PIN:
PS1
PS1A
D94AU210
REAR OUT
V
S
PIN:
LP1
V
S
20µA
V
S
20µA
17.95K
10K
HP1
D94AU211
PIN:
REAR IN
V
S
20µA
D94AU214
20µA
20K
20K
D94AU215
16/18
TDA7345
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.650.104
a10.10.30.0040.012
b0.350.490.0140.019
b10.230.320.0090.013
C0.50.020
c145° (typ.)
D17.718.10.6970.713
E1010.65 0.3940.419
e1.270.050
e316.510.65
F7.47.60.2910.299
L0.41.270.0160.050
S8°(max.)
mminch
OUTLINE AND
MECHANICAL DATA
SO28
17/18
TDA7345
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change withoutnotice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registeredtrademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy– AllRights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
18/18
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