SGS Thomson Microelectronics TDA7343D, TDA7343 Datasheet



DIGITALLY CONTROLLED AUDIO PROCESSOR

INPUTMULTIPLEXER

- TWOSTEREOANDONEMONO INPUTS

- SELECTABLEINPUT GAIN FOR OPTIMAL
ADAPTATIONTO DIFFERENT SOURCES

FULLY PROGRAMMABLE LOUDNESS
FUNCTION

VOLUME CONTROL IN 0.3dB STEPS IN­CLUDING GAINUP TO20dB

ZERO CROSSING MUTE AND DIRECT
MUTE

SOFT MUTE CONTROLLED BY SOFTWARE
OR HARDWARE PIN

BASS AND TREBLE CONTROL
FOURSPEAKERATTENUATORS

- FOURINDEPENDENT SPEAKERS
CONTROLIN 1.25dBSTEPSFOR
BALANCEAND FADER FACILITIES

- INDEPENDENTMUTE FUNCTION

ALL FUNCTIONS PROGRAMMABLE VIA SE-

2

RIAL I

DESCRIPTION

The TDA7343 is an upgrade of the TDA7313
audioprocessor.

Thanks to the used BIPOLAR/CMOStechnology,
very low distortion, low noise and DC-stepping
are obtained.

Due to a highly linear signal processing, using

CBUS

TDA7343

DIP28 SO28

ORDERING NUMBER: TDA7343 (DIP28)

TDA7343D (SO28)

CMOS-switching techniques instead of standard
bipolar multipliers, very low distortion and very
low noise are obtained Several new features like
softmute, zero-crossing mute and pause detector
are implemented.
The Soft Mute function can be activated in two
ways:

1 Via serial bus(bit D0, Mute Byte)
2 Directly on pin 22 through an I/O line of the

microcontroller

Very low DC stepping is obtained by use of a
BICMOStechnology.

November 1999

1/14

TDA7343

BLOCK DIAGRAM

BUSSERIAL BUS DECODER + LATCHES

R2

4.7K

C8 2.2µF

C16

C15

C14

C10

2.7nF

TREBLE(L)

100nF

100nF

BOUT(L) BIN(L)
SM

100nF

LOUD(L)

OUT(L) IN(L)

4

19 18

22

12

17 16

ATT

SPKR

RB

26

OUT

LEFT FRONT

MUTE

SPKR

TREBLE

BASS

VOL

LOUD+

ZERO

CROSS +

ATT

MUTE

24

OUT

LEFT REAR

MUTE

28

SCL

27

SOFT

SDA

MUTE

ATT

SPKR

25

OUT

RIGHT FRONT

ZERO

MUTE

TREBLE

BASS

VOL

LOUD+

MUTE

CROSS +

ATT

SPKR

OUT

RIGHT REAR

23

D93AU062B

MUTE

C13

TREBLE(R)

C12

RB

BOUT(R) BIN(R)

21 20 5

C11

15

CSM

LOUD(R)

C9 47nF

68

7

OUT(R)CREF IN(R)

2.7nF

100nF

100nF

CSM

C7 2.2µF

R1

4.7K

2/14

INPUT

+ GAIN

SELECTOR

L1

14

L1

x
2

1µF

C1

L2

13

L2

LEFT

INPUTS

L3

11

C3

C2

R3

R1

R2

10R1

9

R2

x
2

1µF

C4

RIGHT

INPUTS

SUPPLY

2

S

V

C5

10µF

C6

31

AGND

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

S

T

amb

T

stg

Operating Supply Voltage 10.5 V
Operating Ambient Temperature -40 to 85 °C
Storage Temperature Range -55 to 150 °C

PIN CONNECTION

TDA7343

TREBLE

CREF

V

GND

IN(R)

OUT(R)

LOUD R

IN R2
IN R1

AM MONO

LOUD L

IN L2
IN L1

1
2

S

3
4

L

5

R OUT LR

6
7
8
9
10
11
12
13
14

D94AU061B

28
27
26
25
24

22
21
20
19
18
17
16
15

SCL
SDA
OUT LF
OUT RF

OUT RR23
SM
BOUT(R)
BIN(R)
BOUT(L)
BIN(L)
OUT(L)
IN(L)
CSM

BUS

INPUTS

BASS

THERMAL DATA

Symbol Parameter DIP28 SO28 Unit

R

th j-amb

Thermal ResistanceJunction-pins 85 65 °C/W

QUICK REFERENCE DATA

Symbol Parameter Min. Typ. Max. Unit

V

S

V

CL

THD Total Harmonic DistortionV = 1Vrms f = 1KHz 0.01 0.08 %

S/N Signal to Noise Ratio 106 dB

S

C

Supply Voltage 6 9 10.2 V
Max. input signal handling 2.1 2.6 Vrms

Channel Separation f = 1KHz 100 dB
Volume Control 0.3dB step -59.7 20 dB
Treble Control 2dB step -14 +14 dB
Bass Control 2dB step -10 +18 dB
Fader and Balance Control 1.25dBstep -38.75 0 dB
Input Gain 3.75dB step 0 11.25 dB
Mute Attenuation 100 dB

3/14

TDA7343

ELECTRICALCHARACTERISTICS (VS= 9V; RL= 10KΩ;Rg=50Ω;T

=25°C; all controlsflat

amb

(G -0dB); f = 1KHz. Referto the testcircuit, unless otherwise specified.)

Symbol Parameter Test Condition Min. Typ. Max. Unit

INPUTSELECTOR

G

G

G

R

V

S

R

I MIN

I MAX

step

e

V

I

CL

I

L

N

DC

Input Resistance 70 100 130 KΩ
Clipping Level d ≤ 0.3% 2.1 2.6 V
Input Separation 80 100 dB
Output Load Resistance 2 KΩ
Minimum InputGain -0.75 0 0.75 dB
Maximum Input Gain 10.25 11.25 12.25 dB
Step Resolution 2.75 3.75 4.75 dB
Input Noise 20Hz to 20 KHz unweighted 2.3
DC Steps Adiacent Gain Steps 1.5 10 mV

to G

G

IMIN

IMAX

3mV

VOLUMECONTROL

R

I

G

MAX

A

MAX

A

STEPC

A

STEPF

E

A

E

t

V

DC

Input Resistance 35 50 K
Maximum Gain 18.75 20 21.25 dB
Maximum Attenuation 57.7 59.7 62.7 dB
Step Resolution Coarse

0.5 1.25 2.0 dB

Attenuation
StepResolution FineAttenuation 0.11 0.31 0.51 dB
Attenuation Set Error G = 20 to -20dB -1.25 0 1.25 dB

G = -20 to -58dB -3 2 dB
Tracking Error 2dB
DC Steps Adiacent Attenuation Steps -3 0 3 mV

From 0dB to A

MAX

0.5 5 mV

LOUDNESS CONTROL

R

I

A

MAX

A

step

Internal Resistor Loud = ON 35 50 65 K
Maximum Attenuation 17.5 18.75 20.0 dB
Step Resolution 0.5 1.25 2.0 dB

ZEROCROSSINGMUTE

A

V

TH

MUTE

V

DC

Zero Crossing Threshold
(note 1)

WIN = 11 20 mV

WIN = 10 40 mV

WIN = 01 80 mV

WIN = 00 160 mV
Mute Attenuation 80 100 dB
DC Step 0dB to Mute 0 3 mV

SOFTMUTE

A

T

T

V

R
V
V

MUTE

DON

DOFF

THSM

INT
SMH
SML

Mute Attenuation 60 dB
ON Delay Time C

=22nF;0 to-20dB; I =I

CSM

=22nF;0 to-20dB; I =I

C

CSM

MAX
MIN

0.7 1 1.7 ms
20 35 55 ms

OFF Delay Time VCSM = 0V;I = IMAX 25 50 75 µA

CSM =0V; I= IMIN 1 µA

V
Soft MuteThreshold 1.5 2.5 3.5 V
Pullup Resistor (pin 22) (note 2) 35 50 65 K
(pin 22) Level High Soft Mute Active 3.5 V
(pin 22) Level Low 1V

RMS

V

µ

Ω

Ω

Ω

4/14

TDA7343

ELECTRICALCHARACTERISTICS (continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

BASS CONTROL

B

BOOST

B

CUT

A

step

R

g

TREBLECONTROL

C

RANGE

A

step

SPEAKERATTENUATORS

C

RANGE

A

step

A

MUTE

E

A

V

DC

AUDIO OUTPUT

V

clip

R

L

R

O

V

DC

GENERAL

V

CC

I

CC

PSRR Power Supply Rejection Ratio f = 1KHz 60 80 dB

e

NO

E

t

S/N Signal to Noise Ratio All Gains = 0dB; V

S

C

d Distortion V

BUS INPUTS

V

IL

V

lN

I

lN

V

O

Note 1: WIN represents the MUTE programming bit pair D6,D5for the zero crossing window threshold
Note 2: Internalpullup resistor to Vs/2; ”LOW” = softmuteactive

Max Bass Boost 15 18 20 dB
Max Bass Cut -8.5 -10 -11.5 dB
Step Resolution 1 2 3 dB
Internal Feedback Resistance 45 65 85 KΩ

Control Range

13

±

14

±

15 dB

±

Step Resolution 1 2 3 dB

Control Range 35 37.5 40 dB
Step Resolution 0.5 1.25 2.0 dB
Output Mute Attenuation Data Word = XXX11111 80 100 dB
Attenuation Set Error 1.25 dB
DC Steps Adjacent Attenuation Steps 0 3 mV

Clipping Level d = 0.3% 2.1 2.6 Vrms
Output Load Resistance 2 KΩ
Output Impedance 30 100 Ω
DC Voltage Level 3.5 3.8 4.1 V

Supply Voltage 6 9 10.2 V
Supply Current 5 10 15 mA

B = 20 to 20kHz ”A” weighted 65 dB
Output Noise OutputMuted(B= 20to20kHzflat) 2.5 µV

All Gains0dB(B= 20to20kHzflat) 5 15 µV
Total Tracking Error AV = 0 to -20dB 0 1 dB

= -20to -60dB 0 2 dB

A

V

O

=1V

rms

106 dB

Channel Separation 80 100 dB

= 1V 0.01 0.08 %

in

Input Low Voltage 1V
Input High Voltage 3 V
Input Current VIN = 0.4V -5 5 µA
Output Voltage SDA

IO= 1.6mA 0.4 0.8 V
Acknowledge

5/14

TDA7343

2

C BUS INTERFACE

I

Data transmission from microprocessor to the
TDA7343 and viceversa takes place thru the 2
wires I

2

C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be externallyconnected).

Data Validity

As shown in fig. 3, thedata on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.

Start and Stop Conditions

As shown in fig.4 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH tran­sition of the SDA line while SCL is HIGH.

A STOP conditions must be sent before each
START condition.

Byte Format

Every byte transferred to the SDA line must con­tain 8 bits. Each byte must be followed by an ac-

Figure 3: Data Validity on the I

2

CBUS

knowledgebit. The MSB is transferredfirst.

Acknowledge

The master(µP)putsa resistiveHIGHlevelon the
SDA line during the acknowledgeclock pulse (see
fig. 5). The peripheral (audioprocessor) that ac­knowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDAlineisstableLOWduringthis clockpulse.

The audioprocessor which has been addressed
has to generate an acknowledge after the recep­tion of each byte, otherwise the SDAline remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can gen­erate the STOP information in order to abort the
transfer.

Transmissionwithout Acknowledge

Avoiding to detect the acknowledge of the audio­processor, the µP can use a simplier transmis­sion: simply it waits one clock without checking
the slave acknowledging, and sends the new
data.

This approach of course is less protected from
misworkingand decreasesthe noise immunity.

Figure 4: Timing Diagram of I2CBUS

2

Figure 5: Acknowledge on the I

6/14

CBUS

TDA7343

SOFTWARESPECIFICATION
Interface Protocol

The interface protocol comprises:

A start condition (s)

read/writetransmission)
A subaddressbyte.
A sequenceof data (N-bytes+ acknowledge)
A stopcondition (P)

A chip address byte,(the LSB bit determines

CHIP ADDRESS SUBADDRESS DATA 1 to DATA n

MSB LSB MSB LSB MSB LSB

S1000100R/W

ACK = Acknowledge
S = Start
P = Stop
I = Auto Increment
X = Not used

MAX CLOCK SPEED 500kbits/s

ACK X X X I A3 A2 A1 A0 ACK DATA AC K P

AUTO INCREMENT

If bit I in the subaddressbyte is set to ”1”,the autoincrementof the subaddressis enabled

SUBADDRESS (receivemode)

MSB LSB FUNCTION

X X X I A3A2A1A0

0 0 0 0 Input Selector
0 0 0 1 Loudness
0 0 1 0 Volume
0 0 1 1 Bass, Treble
0 1 0 0 Speaker Attenuator LF
0 1 0 1 Speaker Attenuator LR
0 1 1 0 Speaker Attenuator RF
0 1 1 1 Speaker Attenuator RR
1 0 0 0 Mute

TRANSMITTED DATA

Send Mode

MSB LSB

X X X X X SM ZM X

ZM = Zero crossingmuted (HIGH active)
SM =Soft mute activated(HIGH active)
X = Not used

The transmitted data is automaticallyupdated aftereach ACK.
Transmissioncan be repeated without newchip address.

7/14

TDA7343

DATA BYTE SPECIFICATION

X = not relevant; set to ”1” during testing

Input Selector

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

X X 1 0 0 0 not used
X X 1 0 0 1 IN 2
X X 1 0 1 0 IN 1
X X 1 0 1 1 AM mono
X X 1 1 0 0 not used
X X 1 1 0 1 not used
X X 1 1 1 0 not allowed
X X 1 1 1 1 not allowed
X X 1 0 0 11.25dB gain
X X 1 0 1 7.5dB gain
X X 1 1 0 3.75dB gain
X X 1 1 1 0dB gain

FUNCTION

For example to select the IN 2 inputwith a gainof 7.5dB the Data Byte is: X X 101001

Loudness

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

XXX00000 0dB
X X X 0 0 0 0 1 -1.25dB
X X X 0 0 0 1 0 -2.5dB
X X X 0 0 0 1 1 -3.75dB
X X X 0 0 1 0 0 -5dB
X X X 0 0 1 0 1 -6.25dB
X X X 0 0 1 1 0 -7.5dB
X X X 0 0 1 1 1 -8.75dB
X X X 0 1 0 0 0 -10dB
X X X 0 1 0 0 1 -11.25dB
X X X 0 1 0 1 0 -12.5dB
X X X 0 1 0 1 1 -13.75dB
X X X 0 1 1 0 0 -15dB
X X X 0 1 1 0 1 -16.25dB
X X X 0 1 1 1 0 -17.5dB
X X X 0 1 1 1 1 -18.75dB
X X X 1 D3 D2 D1 D0 Loudness OFF (1)

FUNCTION

For example to select -17.5dBattenuation,loudnessOFF, the Data Byte is: X X X1 1 1 1 0

NOTE 1:
If the loudness is switched OFF, the loudness stage is actinglike a volume attenuator with flat frequency response. D0 to D3 determine the
attenuation level.

8/14

Mute

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

1 Soft Mute On
0 1 Soft Mute with fast slope(I = I
1 1 Soft Mute with slow slope (I = I

1 Direct Mute

0 1 Zero Crossing Mute On
00

1 Zero Crossing Mute and Pause Detector Reset
0 0 160mV ZC Window Threshold (WIN = 00)
0 1 80mV ZC Window Threshold (WIN = 01)
1 0 40mV ZC Window Threshold (WIN = 10)
1 1 20mV ZC Window Threshold (WIN = 11)

0 Nonsymmetrical BassCut (note 4)
1 Symmetrical Bass Cut

Zero Crossing Mute Off (delayed until next
zerocrossing)

FUNCTION

An additionaldirect mute functionis included in the SpeakerAttenuators.

Note 4: Bass cut forvery low frequencies;should not be usedat +16 and +18dB bass boost (DC gain)

MAX

MIN

TDA7343

)

)

Speaker Attenuators

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

XXX 000 0dB
X X X 0 0 1 -1.25dB
X X X 0 1 0 -2.5dB
X X X 0 1 1 -3.75dB
XXX 100 -5dB
X X X 1 0 1 -6.25dB
X X X 1 1 0 -7.5dB
X X X 1 1 1 -8.75dB

XXX00 0dB
X X X 0 1 -10dB
X X X 1 0 -20dB
X X X 1 1 -30dB
XXX11111 Speaker Mute

SPEAKER ATTENUATOR LF, LR, RF, RR

1.25dB step

10dB step

For example an attenuationof 25dB on a selected output is given by: X X X1 0 1 0 0

9/14

TDA7343

Bass/Treble

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

0 0 0 0 -14dB
0 0 0 1 -12dB
0 0 1 0 -10dB
0 0 1 1 -8dB
0 1 0 0 -6dB
0 1 0 1 -4dB
0 1 1 0 -2dB
0111 0dB
1111 0dB
1110 2dB
1101 4dB
1100 6dB
1011 8dB
1 0 1 0 10dB
1 0 0 1 12dB
1 0 0 0 14dB

0 0 1 0 -10dB
0 0 1 1 -8dB
0 1 0 0 -6dB
0 1 0 1 -4dB
0 1 1 0 -2dB
0 1 1 1 -0dB
1 1 1 1 -0dB
1110 2dB
1101 4dB
1100 6dB
1011 8dB
1 0 1 0 10dB
1 0 0 1 12dB
1 0 0 0 14dB
0 0 0 1 146B
0 0 0 0 18dB

FUNCTION

TREBLE STEP

BASS STEPS

For example 12dB Trebleand-8dB Bassgive the following DATABYTE: 0 0 1 1 1 0 0 1

10/14

Volume

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

0.31dB Fine AttenuationSteps
0 0 0dB
0 1 -0.31dB
1 0 -0.62dB
1 1 -0.94dB

1.25dB Coarse Attenuation Steps
000 0dB
0 0 1 -1.25dB
0 1 0 -2.5dB
0 1 1 -3.75dB
1 0 0 -5dB
1 0 1 -6.25dB
1 1 0 -7.5dB
1 1 1 -8.75dB

10dB Gain / Attenuation Steps
000 20dB
001 10dB
010 0dB
0 1 1 -10dB
1 0 0 -20dB
1 0 1 -30dB
1 1 0 -40dB
1 1 1 -50dB

TDA7343

FUNCTION

For example to select -47.81dB Volume the Data Byteis: 1 1 01 1 0 0 1
Power on RESET:AllBytes Set to 1 11 1 11 1 0

Purchase of I
Rights to use these components in an I

2

C Componentsof STMicrolectronics, conveys a license under the Philips I2C Patent

2

C system, provided that the system conforms to the I2C

Standard Specificationsas definedby Philips.

11/14

TDA7343

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 2.65 0.104

a1 0.1 0.3 0.004 0.012

b 0.35 0.49 0.014 0.019

b1 0.23 0.32 0.009 0.013

C 0.5 0.020

c1 45° (typ.)

D 17.7 18.1 0.697 0.713
E 10 10.65 0.394 0.419

e 1.27 0.050

e3 16.51 0.65

F 7.4 7.6 0.291 0.299
L 0.4 1.27 0.016 0.050

S8°(max.)

mm inch

OUTLINE AND

MECHANICAL DATA

SO28

12/14

TDA7343

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.63 0.025

b 0.45 0.018

b1 0.23 0.31 0.009

b2 1.27 0.050

D 37.34 1.470

E 15.2 16.68 0.598 0.657

e 2.54 0.100

e3 33.02 1.300

F 14.1 0.555

I 4.445 0.175

L 3.3 0.130

mm inch

0.012

OUTLINE AND

MECHANICAL DATA

DIP28

13/14

TDA7343

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publicationsupersedes and replaces all informationpreviously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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 1999 STMicroelectronics – Printed in Italy – AllRights Reserved

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