SGS Thomson Microelectronics TDA7340G Datasheet



AUDIOPROCESSOR:

MUTE, SOFT MUTE AND ZERO CROSSING MUTE

ONE DIFFERENTIAL, TWO STEREO AND TWO MONO INPUTS

DIFFERENTIAL PHONEINPUT VOLUME, BASS, TREBLE AND LOUDNESS

CONTROL FOUR SPEAKER ATTENUATORS WITH IN-

DEPENDENTATTENUATION CONTROL

STEREODECODER:

ROLL-OFFADJUSTMENT ADJUSTMENT FREE INTEGRATED 456KHz

VCO HIGHCUT CONTROL STEREOBLEND

NOISE BLANKER:

INTEGRATEDHIGH-PASSFILTER NOISE RECTIFIER OUTPUT FOR QUALITY

DETECTION PROGRAMMABLETRIGGERTHRESHOLD DEVIATION AND FIELD STRENGTH DE-

PENDENT TRIGGERADJUSTMENT

PAUSE DETECTOR:

PROGRAMMABLETHRESHOLD

ALLFUNCTIONS PROGRAMMABLEVIA I

DESCRIPTION

The TDA7340G I processor contains all signal processing blocks of

2

C bus controlled audio signal

2

CBUS

TDA7340G

AUDIO SIGNAL PROCESSOR

PQFP44

ORDERING NUMBER: TDA7340G

a high performance car radio, including audioprocessor, stereodecoder, noise blanker, pause detectorand differentmute functions. The use of BICMOS technology allows the implementation of several filter functions with switched capacitor techniques like fully integrated, adjustment free PLL Loop filter, pilot detector with integratorand pilotcancellation.

This minimizes the number of external components.

Due to a highly linear signal processing, using CMOS-switching techniques instead of standard bipolar multipliers, very low distortion and very low noise are obtained also in the stereodecoder part. The audioprocessor contains several new features like softmute, zero-crossing mute and pausedetector.

Very low DC stepping is obtained by use of a BICMOStechnology.

September 1999

1/27

TDA7340G

AUDIO PROCESSORPART

FEATURES: Input Multiplexer:

DIFFERENTIAL CD STEREOINPUT CASSETTESTEREOINPUT FM STEREO INPUT FROM STEREODE-

CODER AM INPUT:

MONO OR STEREO MODE (PROGRAMMABLE)

BEEP INPUT(ONLY IN AM MONO MODE) TELEPHONEDIFFERENTIAL MONOINPUT GAIN PROGRAMMABLE IN 3 x 3.75dB

STEPS

Loudness:

FULLY PROGRAMMABLE 15 x 1.25dB STEPS

Volume Control:

1.25dBCOARSE ATTENUATOR

0.31dBFINE ATTENUATORS MAX GAIN 20dB MAX ATTENUATION 59.7dB (PLUS LOUD-

NESS)

Bass Control

±7 x 2dB STEPS 2nd ORDER SYMMETRICAL OR NON SYM-

METRICAL CUTFREQUENCYRESPONSE

Treble Control

±7 x 2dB STEPS

Speaker Control

4 INDEPENDENT SPEAKER CONTROL IN

1.25dB STEPS CONTROLRANGE 37.5dB INDEPENDENT SPEAKER MUTE

Mute Functions

DIRECTMUTE ZERO CROSSING MUTE WITH PROGRAM-

MABLETHRESHOLD SOFT MUTE WITH EXTERNAL DEFINED

SLOPE SOFT MUTE VIA I

2

C BUS OR EXTERNALLY

CONTROLLED

Pause Detector

PROGRAMMABLETHRESHOLD DELAY TIME DEFINED BY AN EXTERNAL

CAPACITOR

STEREODECODERPART

FEATURES:

INTERNALLY ADJUSTABLE ROLL-OFF COMPENSATION(I

2

C BUS CONTROLLED) INTEGRATEDPILOTCANCELLATION ON CHIP FILTER FOR PILOT DETECTOR

ANDPLL ADJUSTMENT FREE VOLTAGE CONTROL-

LED OSCILLATOR AUTOMATIC PILOT DEPENDENT

MONO/STEREOSWITCHING VERY HIGH INTERMODULATION AND IN-

TERFERENCE SUPPRESSION

2

C BUS CONTROLLED (STD OFF, FORCED

I MONO,STEREO)

HIGHCUT CONTROL STEREOBLEND

NOISE BLANKER PART

FEATURES:

INTERNAL2nd ORDER HIGH-PASSFILTER NOISE RECTIFIER OUTPUT FOR SIGNAL

QUALITYDETECTION PROGRAMMABLETRIGGER THRESHOLD TRIGGER THRESHOLD DEPENDENT ON

HIGHFREQUENCY NOISE BLANKING TIME PROGRAMMABLE BY EX-

TERNALCAPACITOR VERY LOW OFFSET CURRENT DURING

HOLD TIME DUE TO OPAMPS WITH MOS INPUTS

LEVEL INPUT FOR ADDITIONAL SPIKE DETECTION ON FIELD STRENGTH WITH INTERNAL 1st ORDER + 20KHz HIGH PASS FILTER

NOISE RECTIFIER OUTPUT FOR QUALITY DETECTION

CIRCUITS FOR DEVIATION AND FIELD STRENGTH DEPENDENT TRIGGER ADJUSTMENT

2/27

BLOCK DIAGRAM

TDA7340G

6.2K

1µFC2

1nF

OUT LR

OUT LF

OUT RR

OUT RF

SCL

SDA

DIGGND

OUT LF

OUT LR

C12

2.7nF

C11

2.7nF

C7 C8 C9 C10

C6

47nF

C5

47nF

C4

47nF

BOUT R TR L TR R

BIN R

BOUT L

BIN L

LOUD L LOUD R CSM

IN L

IN R

C3

1µF

OUT L

OUT R

R2

4x

100nF

R1

OUT RF

OUT RR

TREBLE

BASS

SOFT

MUTE

VOLUME +

LOUDNESS

MUTE

C BUS

2

I

+-

PAUSE

1.4V

FM R

HC L

DEMODULATOR

PLL

FM L

C13

HC R

CUT

HIGH

CONTROL

NOISE

BLANKER

LP

25KHz

19KHz

CANCELLATION

AND

AMPLITUDE ADJ

456KHz

1nF

C14

LEVEL

CONTROL

PULSE

FORMER

PEAK

DETECTOR

HP

D95AU329A

47K

R5

68K

47K

VSB VR VHCC

C17

470pF

C16

47nF

HP

LEVEL PEAK TBLANK

TDA7340G

C1

R6

R4

R3

100K

field strength

C15

47nF

reflevel level

(*)

CD

CREF PAUSE

MUX

4x

CD L+ CD R+

4.7µF

AM_L

AM_R

(BEEP)

CASS L

CASS R

(AM MONO)

6x

1µF

PHONE IN

PHONE GND

VCO

MPX

LP

80KHz

1µF

SUPPLY

GND

S

V

(*) NETWORK TO BE ADAPTED TO THE SPECIFIC REQUESTS FOR STEREO BLEND AND HIGH CUT CONTROL

3/27

TDA7340G

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

S

T

amb

T

stg

PIN CONNECTION

Operating Supply Voltage 10.5 V Operating Temperature Range -40 to 85 °C Storage Temperature Range -55 to 150 °C

IN R

OUT R

BIN R

BOUT R

BOUT L

BIN L

AM_L (BEEP)

AM_R (AM MONO)

CASS L

CASS R

TR R

44 43 42 41 3940 38 37 36 35 34

OUT L

IN L

CREF LOUD L LOUD R

GND

DIGGND

VDD CSM

SCL SDA

1 2 3 4 5 6 7 8 9 10

12 13 14 15 16

VCO

PAUSE

PEAK

TBLANK

TDA7340P

(PQFP44)

LEVEL

171118 19 20 21 22

HCL

VSB

HCR

33

TR L

32

CD L+

31

CD L-

30

CD R-

29

CD R+

28

PHON IN

27

PHON GND

26

OUT LF

25

OUT RF

24

OUT LR

23

OUT RR

VR

D94AU055A

MPX

VHCC

THERMAL DATA

Symbol Parameter Value Unit

R

th j-pins

Thermal Resistance Junction-pins max 85 °C/W

ELECTRICALCHARACTERISTICS(VS = 9V; Tamb =25°C; RL = 10KΩ; all gains= 0dB;f = 1KHz;

REF =22µF; unless otherwisespecified, referto the Test Circuit.)

C

Symbol Parameter Test Condition Min. Typ. Max. Unit

SUPPLY

V

S

I

S

SVR Ripple Rejection Audioprocessor 70 90 dB

Supply Voltage 6 9 10 V Supply Current Stereo Decoder= ON 10 20 25 mA

Stereo Decoder= OFF 5 12.5 20 mA

StereoDecoder+ Audioprocessor 55 dB

INPUT SECTION

RI Input Resistance 70 100 130 KΩ

V

CL

S

R

G

I MIN

G

I MAX

G

STEP

e

IN

V

DC Dc Steps Adjacent Gain Step 2 10 mV

Clipping Level d ≤ 0.3% 2.1 2.6 Vrms Input Separation 80 100 dB

I L Output Load Resistance 2 KΩ

Minimum Input Gain -0.75 0 0.75 dB Max Input Gain 10.25 11.25 12.25 dB Step Resolution 2.75 3.75 4.75 dB Input Noise Single Ended Input 2.3

G

MIN

to G

MAX

3mV

V

µ

4/27

TDA7340G

ELECTRICALCHARACTERISTICS(continued.)

Symbol Parameter Test Condition Min. Typ. Max. Unit

DIFFERENTIAL CD STEREOINPUT

R

CMRR Common Mode Rejection Ratio V

d Distortion V

e

IN Input Noise 20Hz to 20KHz; Flat; D6 = 0 5 µV

G

DIFF Differential Gain D6 = 0 -1 0 1 dB

DIFFERENTIAL TELEPHONE MONOINPUT

RI Input Resistance 14 20 26 KΩ

CMRR Common Mode Rejection Ratio V

d Distortion V

e

IN

G

DIFF

VOLUMECONTROL

R

C

MAX

A

MAX

A

STEPC

A

STEPF Step Resolution Fine

E

A

E

T

V

DC

LOUDNESSCONTROL (LOUDL, LOUDR)

R

A

STEP

A

MAX

ZERO CROSSING MUTE

V

TH

A

MUTE

V

DC

SOFT MUTE

A

MUTE

t

D

Input Resistance Inputselector BIT D6 =0 (0dB) 10 15 20 KΩ

I

Input selector BIT D6 = 1(-6dB) 14 20 30 KΩ

=1V

CM

I =1VRMS 0.01 0.08 %

; f = 1KHz

RMS

f = 10KHz

48 75 dB 45 70 dB

D6 = 1 -7 -6 -5 dB

CM

=1V

I

=1V

; f = 1KHz 45 60 dB

RMS

0.15 0.5 % Input Noise 20Hz to 3 KHz; Flat 10 Differential Gain -4.75 -3.75 -2.75 dB

Input Resistance (INR, INL) 24 35 46 K

I

Max Gain 18.75 20 21.25 dB Max Attenuation 57.7 59.7 62.7 dB Step Resolution Coarse

0.50 1.25 2.00 dB

Attenuation

0.11 0.31 0.51 dB

Attenuation Attenuation Set Error G = -20 to 20dB -1.25 0 1.25 dB

G = -20 to -59.7dB 3 2 dB Tracking Error 2dB DC Steps Adjacent Attenuation Steps -3 0.1 3 mV

from 0dB to A

Internal Resistance 35 50 65 K

I

MAX

0.5 5 mV

Step Resolution 0.5 1.25 2.0 dB Max Attenuation 17.5 18.75 20.0 dB

Zero Crossing Threshold (1) WIN = 11 20 mV

WIN = 10 40 mV

WIN = 01 80 mV

WIN = 00 160 mV Mute Attenuation 80 100 dB DC Step 0dB toMute 0.3 3 mV

Mute Attenuation 45 60 dB Delay Time C

= 22nF; I = I

EXT

MAX

0 to -20dB; I = IMIN

0.8 1.5 2.0 ms 15 25 45 ms

V

µ

Ω

SOFT MUTEAT PHONE-GND

V

(1) WIN represents the MUTE programming bit pair D6,D5 for the zero crossing window threshold

Input Low Voltage 1.4 1.6 V

il

5/27

TDA7340G

ELECTRICALCHARACTERISTICS(continued.)

Symbol Parameter Test Condition Min. Typ. Max. Unit

BASS CONTROL

C

RANGE

A

STEP

R

B

TREBLE CONTROL

CRANGE Control Range ±13 ±14 ±15 dB

A

STEP

SPEAKERATTENUATORS

CRANGE Control Range 35.0 37.5 40.0 dB

STEP Step Resolution 0.5 1.25 2.0 dB

A

MUTE

E

A

V

DC

AUDIO OUTPUTS

V

CLIP

R

L

R

OUT

V

DC

Control Range ±11.5 ±14 ±16 dB Step Resolution 1 2 3 dB Internal Feedback Resistance 35 50 65 K

Step Resolution 1 2 3 dB

Output Mute Attenuation Data Word = 38.75dB 80 100 dB Attenuation Set Error 1.50 dB DC Step Adjacent Attenuation Steps 0.1 3 mV

Clipping Level d = 0.3% 2.1 2.6 V Output Load Resistance 2 K Output Impedance 30 100 DC Voltage Level 3.5 3.8 4.1 V

Ω

RMS

Ω

PAUSE DETECTOR

V

I

DELAY

V

THP

TH

Zero Crossing Threshold (1) WIN = 11 20 mV

WIN = 10 40 mV WIN = 01 80 mV

WIN = 00 160 mV Pull-up Current 15 25 35 µA Pause Threshold 3.0 V

GENERAL

E

NO

S/N Signalto Noise Ratio All gains 0dB; V

d Distortion V

S

C

E

T

C

REF (11)

Output Noise BW = 20Hz to 20KHz, flat

Output Muted

All gains = 0dB

=1V

I

=1V

O

; 0.01 0.08 %

RMS

; 106 dB

RMS

Channel Separation Left/Right 80 100 dB Total Tracking Error AV= 0 to -20dB; 0 1 dB

= -20 to -60dB; 0 2 dB

A

V

External Reference Capacitor 10 µF

BUS INPUT

V

IL

V

IH

I

IN

V

O

(1) WIN represent the MUTE programming bit paIr D6,D5 for the zero crossing window threshold

Input Low Voltage 1V Input High Voltage 3 V Input Current VIN= 0.4V -5 5 µA Output Voltage SDA

IO = 1.6mA 0.4 0.8 V Acknowledge

2.5 515

µV

V

µ

6/27

TDA7340G

STEREO DECODER PART ELECTRICALCHARACTERISTICS(V

T=50µs; nominal MPX input voltage: V less otherwisespecified)

Symbol Parameter Test Condition Min. Typ. Max. Unit

G

R

G

V

IN

MIN

MAX

STEP

MPX Input Level 0.5 1.25 V Input Resistance 35 50 65 K Minimum Input Gain 2.5 3.5 4.5 dB Maximum InputGain 9.5 11 12.5 dB Step Resolution 1.75 2.5 3.25 dB

SVRR Supply Voltage Ripple Rejection V

V

O

α

DC Output Voltage (HCL, HCR) 4.2 4.5 4.8 V Channel Separation V

THD Total Harmonic distortion 0.02 0.2 %

S + N

Signal plus noise to noise ratio f = 20Hzto 16KHz; S = 2V

N

CARRIER AND HARMONIC SUPPRESSIONAT THE OUTPUT

α19 Pilot Signal f = 19KHz 55 75 dB α38 Subcarrier f= 38KHz 75 dB

57 Subcarrier f= 57KHz 62 dB

α α76 Subcarrier f= 76KHz 90 dB

= 9V; modulationfrequency: 1KHz;de-emphasis time:

S

MPX

= 0.5V

RIPPLE

SB-VR

(75KHzdeviation);GI = 3.5dB; T

RMS

amb

= 100mV; f= 1KHz 50 60 dB

= 100m

VDC

RMS

50 dB

91 dB

=27°C; un-

RMS

Ω

INTERMODULATION (note 1)

α2f

3f

α

= 10KHz; f

mod

= 13KHz; f

mod

= 1KHz 65 dB

spur

= 1KHz 75 dB

spur

TRAFFICRADIO (note 2)

α57 Signal f = 57KHz 70 dB

SCA - SUBSIDIARY COMMUNICATIONS AUTHORIZATION (note 3)

α67 Signal f = 67KHz 75 dB

ACI - ADJACENT CHANNEL INTERFERENCE(note4)

α114 Signal f = 114KHz 95 dB

190 Signal f = 190KHz 84 dB

α

MONO/STEREO SWITCH

V

INTH

Pilot Threshold Voltage for stereo ”ON” Pth=1

P

th =0

Pilot Threshold Voltage for stereo ”OFF” Pth=1

P

=0

th

11 18

13

15

2234mV

25

6

12

1825mV

19

STEREO BLEND

V

SB-VR

V

SB-VR

Control Voltage for Channel Separation

α = 6dB; VR= 3.6V (note 5) -0.31 -0.26 -0.23 V

= 26dB; -50 mV

α

HIGH CUT CONTROL

τ

deemp

R R

HCC HCC

De-Emphasis Time Constant C13,C14=1nF;V High Cut Control Resistance V High Cut Control Resistance V

=100mV 50 KΩ

HCC-VR

=-1.3V(note6) 115 150 185 K

HCC-VR

= 100mV 50 µs

HCC-VR

VCO

f

OSC

∆f/f Capture and Holding Range 1 %

Oscillator Frequency 456 KHz

mV

RMS RMS

Ω

7/27

TDA7340G

ELECTRICALCHARACTERISTICS(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

NOISE INTERFERENCE DETECTOR

V

RECT

T

I

OS

V

RECTDEV

V

RECTFS

TR

S

Trigger Threshold 7) 8) (see pulse slope fig 3)

meas. with V

= 1.2V

RECT

NTB = 10 100 mV NTB = 01 130 mV NTB = 10 160 mV NTB = 01 190 mV

meas. with V

= 1.4V

RECT

NTB = 00 150 mV NTB = 11 200 mV NTB = 10 250 mV NTB = 01 300 mV

Rectifier Voltage V

= 0mV 0.5 0.9 1.3 V

MPXIN

= 50mV;f = 200KHz 1.9 V

V

MPXIN

V

= 100mV; f= 200KHz 2.0 2.9 3.4 V

MPXIN

Suppression Pulse Duration CBLANK = 470pF 40 µs Input Offset Current During

10 pA

Suppression Time Deviation Dependent Rectifier

Voltage 9)

meas. with V

=500mV

MPX

(75KHzdev.)

OVD = 11(off) 0.9 V OVD = 10 1.3 V OVD = 01 2.3 V OVD = 00 3.2 V

Field strength Controlled Rectifier Voltage 10)

meas. with VMPX = 0mV, V

SB=VR

500 mV (Fully

FSC = 11(off) 0.9 V FSC = 10 1.2 V FSC = 01 1.8 V

=-

FSC = 00 2.2 V

Mono)

P P P P P P P P

NOTES TO THE CHARACTERISTICS

1) INTERMODULATIONSUPPRESSION V

(signal)(at1KHz)

α2=

α3 =

O

V

(spurious)(at1KHZ)

O

(

signal)(at1KHz

V

O

(spurious)(at1KHZ)

V

O

;f

= (2 x 10KHz) - 19KHz

s

)

;f

= (3 x 13KHz) - 38KHz

s

measuredwith : 91% mono signal; 9% pilot signal;fm=10KHzor 13KHz

2) TRAFFICRADIO(V.F.) suppression

α57 (V.W.F.)=

V

O(signal)

(

V

spurious)(at1KHZ±23Hz

O

(at1KHz)

)

measuredwith : 91% stereosignal; 9% pilot signal; fm=1KHz; 5% subcarrier (f=57KHz,fm = 23Hz AM, m= 60%)

8/27

NOTES TO THE CHARACTERISTICS (continued)

3) SCA(SUBSIDIARYCOMMUNICATIONS AUTHORIZATION)

α67 =

V

O(signal)

(spurious)(at9KHZ)

V

O

(at1KHz)

;f

= (2 x 38KHz)- 67KHz

s

measuredwith : 81% mono signal; 9% pilot signal;fm=1KHz;

10% SCA- subcarrier(f

= 67KHz, unmodulated)

s

4) ACI(ADJACENT CHANNEL INTERFERENCE)

α114 =

α

190

(

V

signal)(at1KHz

O

(spurious)(at4KHZ)

V

O

(signal)(at1KHz)

V

O

=

(

V

spurious)(at4KHZ

O

)

;f

= 110KHz- (3 x 38KHz)

s

= 186KHz- (5 x 38KHz)

;f

s

)

measuredwith : 90% mono signal; 9% pilot signal;fm=1KHz;1% spurioussignal

(f

= 110KHzor 186KHz, unmodulated)

s

TDA7340G

5) Controlrangetyp 11%of V

6) Controlrangetyp 30%of V

7) Allthresholdsare measuredby usinga pulsewith T

R (see figure 2)

R (see figure 1)

=2µs, T

R

=2µs and TF=10µs.

HIGH

The repetitionrate must not increasethe PEAKvoltage.

8) NBTrepresentthe STDEC bit pairD

NAT representthe SPKR_LFbit pair D

9) OVDrepresent the SPKR_LR bit pair D

10) FSCrepresent the SPKR_RFbit pair D

for the noiseblanker trigger threshold

6,D5

for the noise controlledtrigger threshold

7,D5

forthe over deviationdetector

7,D6

for thefield strength control

7,D6

11) The TDA7340G has a dedicatedinternalcircuitryproviding a softpower-on. The I2C bus data

programmationmust start after the reference DC level has reached the targetVs/2 value, otherwisea pop can be generated.The Crefpin and Out pins rise time at poweron are riported in Figg.4,5, 6 for Cref valuesof 4.7uF,10uF, 22uF.

12) The CDL- and CDR- can be shortcircuitedin applications providing3 wiresCD signal.

L+

L-∼R-

CD TDA7340G

=

R+

L-

R-

R+

D95AU352

13)The AGND and DGND layout wires must bekept separated. A 50Ω resistor is recommend to be put

as far as possible from the device.

9/27