HIGH PERFORMANCE, STABLE 57KHz FILTER
HIGHSELECTIVITY
FLAT GROUP DELAY
HIGHPERFORMANCE LIMITER
VERYFEW EXTERNALCOMPONENTS
4.332MHzCLOCKOSCILLATOR
(8.664MHzOPTIONAL)
TDA7332
RDS FILTER
DESCRIPTION
The TDA7332 is an RDS filter, realized in
switchedcapacitortechnique.
The 4 biquad stage architecture is working with
4.332MHzclock.
Optionallya 8.664MHzxtalcan be used.
The filter has a center frequency of 57KHz and a
bandwidth of 3KHz. Input 2
ter and output smoothing filter are provided.
TEST CIRCUIT
nd
order antialiasing fil-
DIP14 SO14
ORDERING NUMBERS:
TDA7332 TDA7332D
TDA7332DIE1 (Chip on wafer)
November 1999
1/6
TDA7332
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
T
op
T
stg
THERMAL DATA
Symbol Description DIP14 SO14 Unit
R
th j-case
PIN CONNECTION (Top view)
Supply Voltage 7 V
S
Operating Temperature Range -40 to 85
Storage Temperature -40 to 150 °C
Thermal Resistance Junction-case Typ. 100 200 °C/W
C
°
BONDINGPAD LOCATIONS
2/6
(Topview)
TDA7332
ELECTRICALCHARACTERISTICS (VCC= 5V, Tamb = 25°C; fosc = 4.332MHz; VIN= 20mVrms unless
otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
SUPPLYSECTION
V
CC
I
Supply Voltage 4.5 5 5.5 V
Supply Current 6 9 14 mA
S
FILTER
F
BW 3dB Bandwidth 2.5 3 3.5 KHz
G Gain f = 57KHz 18 20 22 dB
A Attenuation
Ph Phase non linearity A (see note1)
∆
R
S/N Signal to Noise Ratio V
V
R
Center Frequency 56.5 57 57.5 KHz
C
f = +4KHz
∆
f = 38KHz; V
f = 67KHz; V
= 500mVrms
i
= 250mVrms
i
18
50
35
22
80
50
0.5
B (see note1)
C (see note1)
Input Impedance 100 160 200 KΩ
i
= 3mVrms 30 40 dB
i
Input Signal f=19KHz;T3<–40dB(seenote2)
i
1
2
f = 57KHz (RDS + ARI)
Load Impedance Pin 12 100 K
L
5
7.5
10
1
50
LIMITER
RA Resistance pin 8-12 15 21 28 K
V
OL
V
OH
Comp. Output LOW IO= +0.5mA 1 V
Comp. Output HIGH IO = –0.5mA 4 V
Duty Cycle V
= 1mVrms 50 %
i
OSCILLATOR
dB
dB
dB
DEG
DEG
DEG
Vrms
mVrms
Ω
Ω
F
OSC
Oscillator Frequency F
= Open
SEL
F
= Closed to Ground
SEL
4.332
8.664
Output Amplitude 5 V
V
CLL
V
OLH
Clock Input Level LOW 1 V
Clock Input Level HIGH 4 V
CRYSTALTYPE = EURO QUARTZ
Note (1):
The phase non linearity isdefined as: ∆Ph = | -2 φf2 + φf1 + φf3 |
where φfx is the input-output phase difference at the frequency fx (x = 1,2,3)
Measure f1 (KHz) f2 (KHz) f3 (KHz) ∆Ph max
A 56.5 57 57.5 <5°
B 56 57 58 <7.5
C 55.5 57 58.5 <10°
Note (2): The 3th harmonic(57KHz) at the output (pin12) must be less than -40dB in respect to the input signal plus gain.
°
MHz
MHz
PP
3/6
TDA7332
DIM.
MIN.. TYP. MAX.. MIN.. TYP.. MAX..
A 1.75 0.069
a1 0.1 0.25 0.004 0.009
a2 1.6 0.063
b 0.35 0.46 0.014 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.020
c1 45°(typ.)
D (1) 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F (1) 3.8 4 0.150 0.157
G 4.6 5.3 0.181 0.209
L 0.4 1.27 0.016 0.050
M 0.68 0.027
S8°
(1) D and F donot includemold flashor protrusions. Mold flash or
potrusions shallnot exceed 0.15mm(.006inch).
mm inch
(ma x.)
OUTLINE AND
MECHANICAL DATA
SO14
4/6
TDA7332
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 1.39 1.65 0.055 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 15.24 0.600
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 2.54 0.050 0.100
mm inch
OUTLINE AND
MECHANICAL DATA
DIP14
5/6
TDA7332
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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