SGS Thomson Microelectronics TDA7317 Datasheet

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TDA7317

FIVEBANDSDIGITALCONTROLLEDGRAPHICEQUALIZER

VOLUMECONTROLIN 0.375dBSTEP
FIVE BANDS STEREO GRAPHIC EQUAL-

IZER
CENTER FREQUENCY, BANDWIDTH, MAX

BOOST/CUT DEFINED BY EXTERNAL COM­PONENTS

±14dB CUT/BOOSTCONTROL IN2dB/STEP
ALL FUNCTIONS PROGRAMMABLE VIA SE-

RIALBUS
VERYLOW DISTORTION
VERY LOW NOISE AND DC STEPPING BY

USE OF A MIXED BIPOLAR/CMOS TECH­NOLOGY

ORDERING NUMBER: TDA7317

SDIP30

DESCRIPTION

The TDA7317 is a monolithic, digitally controlled
graphicequali zerrealizedin BiCM OS mixedtechnol­ogy. The ster eosignal,beforeany filtering,can be at-

BLOCK DIAGRAM

tenuated up to -17.625dB in 0.375dB step.
All the functions can be programmed via serial
bus making easy to build a µPcontrolledsystem.
Signalpath is designedfor verylownoiseanddistor­tion.

November 1999

1/12

TDA7317

PIN CONNECTION

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

T

op

T

stg

R

tjvins

ELECTRICAL CHARACTERISTICS (T

Supply Voltage 10.2 V

S

Operating Temperature Range -40 to +85 °C
Storage Temperature Range -55 to +150 °C
Thermal Resistance Junction pins max 85

=25°C, VS= 9V, RL= 10KΩ,Rg= 600Ω, f = 1KHz VIN=

amb

1Vrms, all controlsin flat position (AV = 0dB) unlessotherwise specified).

Symbol Parameter Test Condition Min. Typ. Max. Unit

SUPPLY

V

S

I

S

SVR Ripple Rejection f = 300Hz to 10KHz 60 80 dB

Supply Voltage 6 9 10 V
Supply Current 8 14 20 mA

C/W

°

2/12

TDA7317

ELECTRICALCHARACTERISTICS(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

INPUT

V

R

I

IN max

I

NS

Input Resistance 20 30 40 KΩ
Max Input Signal THD = 0.3% 2 2.5 V
Input Separation (1) 80 100 dB

VOLUMECONTROL

C

RANGE

A

A

A

V

VMIN

VMAX

STEP

E

A

E

T

DC

Control Range 17.625 dB
Min. Attenuation -0.5 0 0.5 dB
Max. Attenuation 16.7 17.625 18.6 dB
Step Resolution 0.175 0.375 0.575 dB
Attenuation Set Error -1 1 dB
Tracking Error 0.5 dB
DC Steps adjacent attenuation steps 0 3 mV

GRAPHIC EQUALIZER

THD Distortion 0.01 0.1 %

C

s

e

NO

Channel Separation 80 100 dB
Output Noise BW = 20Hz to 20KHz

820µV

flat, AV = 0dB
A curve 6
BW = 20Hz to 20KHzAV =0dB

S/N Signal to Noise Ratio A

B

C

RANGE

step

Step Resolution 1 2 3 dB
Control Range max boost/cut ±12 ±14 ±16 dB

All bands = max. boost
All bands = max. cut

= 0dB; V

V

ref

=1V

RMS

24

6

100 dB

VDC DC Steps Adiacent Control Steps 0.5 3 mV

AUDIO OUTPUTS

RMS

V

µ

µV

V

µ

V

O

R

L

C

L

R

O

V

OUT

Output Voltage THD = 0.3% 2 2.5 V
Output Load Resistance 2 KΩ
Output Load Capacitance 10 nF
Output Resistance 5 10 20
DC Voltage Level 4.2 4.5 4.8 V

BUS INPUTS

V

IL

V

IH

I

IN

V

O

Input Low Voltage 1V
Input High Voltage 3 V
Input Current -5 +5
Output Voltage SDA

IO= 1.6mA 0.4 V

Acknowledge

ADDRESSPIN (Internal 50KΩ pull down resistor)

V

IL

V

IH

NOTE: The input is grounded thru the 2.2µP capacitors

Input Low Voltage 1V
Input High Voltage VCC-1V V

RMS

Ω

A

µ

3/12

TDA7317

DEVICEDESCRIPTION
The TDA7317 is a five bands, digitally controlled

stereo Graphic Equalizer.
The device is intended for high quality audio ap­plication in Hi-Fi, TV and car radio systems where
feature like low noise and THD are key factors. A
mixed Bipolar Cmos Technologyallows:
Cmos analog switches for pop free commuta­tions, high frequency op.amp. (GWB = 10MHz)
and high linearity polisilicon resistor for THD =

0.01 (at Vin = 1Vrms) and a S/N ratio of 102dB.
The internal Block Diagramis shownon page1.

The first stage is a volume control. The control
range is 0 to -17.625dBwith 0.375dBstep.
The very high resolution (0.375dB step) allows
the implementation of closed loop amplitude con­trol system completely free from any acustical ef­fect (steppingvariation and pumping effect).

The volume control is followed by a serial five
bands equalizer. Each filtering cell is the biquad
cell shown in fig. 1

The internal resistor string is fixing the boost/cut
value while the buffer makes the Q (quality factor)
and central frequency, set by external compo­nents, fully indipendentfrom the internalresistors.
Each filtering cell is realized using only 4 external
components (2 capacitorsand 2 resistors)allow­ing a flexible selection of centre frequency fo, Q
factor and gain. Here below the basic formulae
and the key features of each band pass filter are
reported:

= center frequency

f

o

Gv = gain/lossat the centerfrequencyf
Gv = 20log(Av)

o

f

o

=

Q

f2− f

1

wheref2,f1= 3dB Bandwidth limits.

(R2⋅C2)+(R2⋅C1)

=

A

v

(R2 ⋅ C1 )+(R2 ⋅ C2 )

√(R1

=

Q

(R2 ⋅C1 )+(R2 ⋅ C2 )

=

f

o

2π ⋅√(R1 ⋅ R2 ⋅

+ (R1⋅

⋅ C1 ⋅ R2 ⋅ C2 )

1

C1⋅ C2)

C1

)

If C1 is fixed, then:

2

Q

R2 =

C2

π⋅C1⋅

2

R1

=

A

− 1− Q

v

f

(A

v

=

Av− 1 −Q

− 1)

o

1

(A

⋅

A

(

2

⋅ C1

2

−1 ) ⋅ Q

v

− 1 −Q2)

v

⋅

R2

2

Likewise, the components’values can be deter­minedby fixing oneof theother three parameters.
Referring to fig. 1 the suggested R2 value should
be higher than 2KΩin order to have a good THD
(internalop. amp. current limit).
Viceversa the R1 value should be equal or lower
than 51KΩ in order to keep the ”click”(DC step)
very low.

A typical applicationis shownby fig. 2

Fig. 1

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