SGS Thomson Microelectronics TDA7294S Datasheet

TDA7294S
100V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY
VERY HIGH OPERATING VOLTAGE RANGE (±45V)
DMOSPOWERSTAGE HIGH OUTPUT POWER (100W @ THD =
10%, R
L =8Ω,VS=±40V MUSIC POWER)
EASILY CONNECTED IN PARALLEL TO DRIVEVERYLOWIMPEDANCES)
DESCRIPTION
The TDA7294S is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, Top-
Figure1: TypicalApplicationandTest Circuit
MULTIPOWER BCD TECHNOLOGY
Multiwatt15
ORDERING NUMBER: TDA7294SV
class TV). Thanks to the wide voltage range and to the high out current capability it is able to sup­ply the highest power into both4and 8loads.
The built in muting function with turn on delay simplifiesthe remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizingthe thermaldissipationof the system.
VMUTE
VSTBY
June 2000
C7 100nF C6 1000µF
R3 22K
C2
R2
22µF
680
C1 470nF
R1 22K
R5 10K
R4 22K
C3 10µFC410µF
IN- 2
IN+
3
4
SGND (**)
10
MUTE
9
STBY
(*) see Application (**) for SLAVE function
note
MUTE
STBY
1 STBY-GND
+Vs
BUFFER DRIVER
713
11
-
+
THERMAL
SHUTDOWN
-Vs -PWVs
C9 100nF C8 1000µF
+PWVs+Vs
PROTECTION
158
-Vs
S/C
14
12
6 5
D97AU805A
OUT
BOOT LOADER
C5
22µF
BOOTSTRAP
CLIP DET
(*)
VCLIP
1/13
TDA7294S
PIN CONNECTION (Top view)
TAB CONNECTED TO PIN 8
15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
D97AU806
-V
(POWER)
S
OUT
(POWER)
+V
S
BOOTSTRAP LOADER BUFFER DRIVER MUTE STAND-BY
-V
(SIGNAL)
S
+VS(SIGNAL) BOOTSTRAP CLIP AND SHORT CIRCUIT DETECTOR SIGNAL GROUND NON INVERTING INPUT INVERTING INPUT STAND-BY GND
QUICK REFERENCE DATA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
G
LOOP
P
tot
SVR Supply Voltage Rejection 75 dB
Supply Voltage Operating ±12 ± 45 V
S
Closed Loop Gain 26 40 dB Output Power VS=±40V; RL=8Ω; THD = 10% 100 W
= ±30V; RL =4Ω; THD = 10% 100 W
V
S
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V V V
2 -V3 Maximum DifferentialInputs ±30 V
V
V V V V V
V
10 11 Buffer Voltage Referred to -VS 100 V
V
12 Bootstrap Loader Voltage Referred to -VS 90 V
V
I
O
P
tot
T
op
T
stg,Tj
Supply Voltage (No Signal) ±50 V
S
VSTAND-BY GND Voltage Referred to -VS (pin 8) 90 V
1
Input Voltage (inverting) Referred to -V
2
3 Input Voltage (non inverting) Referred to -VS 90 V
Signal GND Voltage Referred to -V
4
Clip Detector Voltage Referred to -V
5 6 Bootstrap Voltage Referred to -VS 100 V 9 Stand-by Voltage Referred to -VS 100 V
Mute Voltage Referred to -V
S
S
S
S
90 V
90 V
100 V
100 V
Output Peak Current 10 A Power Dissipation T
=70°C50W
case
Operating Ambient Temperature Range 0 to 70 °C Storage and Junction Temperature 150 °C
THERMALDATA
Symbol Description Typ Max Unit
R
th j-case
Thermal Resistance Junction-case 1 1.5 °C/W
2/13
TDA7294S
ELECTRICAL CHARACTERISTICS (Referto the TestCircuitVS= ±35V, RL=8,GV= 30dB;
R
=50Ω;T
g
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
S
I
q
I
b
V
OS
I
OS
P
O
d Total Harmonic Distortion (**) P
I
MAX
SR Slew Rate 7 10 V/µs
G
V
G
V
e
N
f
L,fH
R
i
SVR Supply Voltage Rejection f = 100Hz; V
T
S
STAND-BY FUNCTION (Ref: -V
V
ST on
V
ST off
ATT
st-by
I
q st-by
MUTE FUNCTION (Ref: -V
V
Mon
V
Moff
ATT
mute
Note (*):
MUSIC POWER CONCEPT MUSIC POWER is the maximal power which the amplifieris capableof producing acrossthe rated load resistance (regardless ofnon linearity) 1 sec afterthe application of a sinusoidal input signal of frequency 1KHz.
Note (**): Note (***):
Tested withoptimized Application Board(see fig. 2)
Limitedby the max. allowablecurrent.
=25°C,f = 1 kHz; unless otherwise specified).
amb
Operating Supply Range ±12 ±45 V Quiescent Current 20 30 60 mA Input Bias Current 500 nA Input Offset Voltage ±10 mV Input Offset Current ±100 nA RMS Continuous OutputPower d = 0.5%:
W W W
W W W
% %
% %
Music Power (RMS) (*)
t=1s
V
= ± 35V, RL=8
S
V
=±32V, RL=6
S
V
=±28V, RL=4
S
d = 10%; R
=8Ω ;VS=±40V
L
R
=6Ω ;VS=±35V
L
R
=4Ω;VS=±30V (***)
L
= 5W; f = 1kHz
O
P
=0.1to 20W;f = 20Hzto 20kHz
O
= ±28V, RL=4Ω:
V
S
P
= 5W; f = 1kHz
O
P
=0.1to 20W;f = 20Hzto 20kHz
O
60 60 60
70 70 70
100 100 100
0.005
0.1
0.01
0.1
Overcurrent Protection Threshold 6.5 A
Open Loop Voltage Gain 80 dB Closed Loop Voltage Gain 24 30 40 dB Total Input Noise A = curve
f = 20Hz to 20kHz
1 25
µV µ
Frequency Response (-3dB) PO= 1W 20Hz to 20kHz Input Resistance 100 k
= 0.5Vrms 60 75 dB
ripple
Thermal Shutdown 150 °C
or GND)
S
Stand-by on Threshold 1.5 V Stand-by off Threshold 3.5 V Stand-by Attenuation 70 90 dB Quiescent Current @ Stand-by 1 3 mA
or GND)
S
Mute on Threshold 1.5 V Mute off Threshold 3.5 V Mute Attenuation 60 80 dB
V
3/13
TDA7294S
Figure2: Typical ApplicationP.C. Boardand ComponentLayout (scale1:1)
4/13
TDA7294S
APPLICATION SUGGESTIONS (seeTestand ApplicationCircuits of the Fig. 1)
The recommended values of the external components are those shown on the application circuit of Fig­ure 1. Different values can be used;the followingtable can help the designer.
COMPONENTS SUGGESTED VALUE PURPOSE
LARGER THAN
SUGGESTED
R1 (*) 22k INPUT RESISTANCE INCREASE INPUT
IMPEDANCE
R2 680
CLOSED LOOP GAIN
DECREASE OF GAIN INCREASE OF GAIN
SMALLER THAN
SUGGESTED
DECREASE INPUT
IMPEDANCE
SET TO 30dB (**)
R3 (*) 22k INCREASE OF GAIN DECREASE OF GAIN
R4 22k ST-BY TIME
CONSTANT
LARGER ST-BY
ON/OFF TIME
SMALLER ST-BY
ON/OFF TIME;
POP NOISE
R5 10k MUTE TIME
CONSTANT
C1 0.47µF INPUT DC
DECOUPLING
LARGER MUTE
ON/OFF TIME
SMALLER MUTE
ON/OFF TIME HIGHER LOW
FREQUENCY
CUTOFF
C2 22µF FEEDBACK DC
DECOUPLING
HIGHER LOW
FREQUENCY
CUTOFF
C3 10µF MUTE TIME
CONSTANT
C4 10µF ST-BY TIME
CONSTANT
LARGER MUTE
ON/OFF TIME
LARGER ST-BY
ON/OFF TIME
SMALLER MUTE
ON/OFF TIME
SMALLER ST-BY
ON/OFF TIME;
POP NOISE
C5 22µFXN (***) BOOTSTRAPPING SIGNAL
C6, C8 1000µF SUPPLY VOLTAGE
C7, C9 0.1µF SUPPLY VOLTAGE
(*) R1 = R3 for pop optimization (**) Closed LoopGain has tobe 26dB (***) Multiplythis value for thenumber of modular part connected
Slave function: pin 4 (Ref to pin 8 -VS)
-V
+3V
S
-V
+1V
S
-V
S
MASTER
UNDEFINED
SLAVE
D98AU821
DEGRADATION AT LOW FREQUENCY
BYPASS
DANGER OF
BYPASS
OSCILLATION
Note:
If in the application, the speakers are connected via long wires, it is a good rule to add between the outputand GND, a BoucherotCell, in order to avoid dangerous spurious oscillations when the speakersterminal are shorted.
The suggested Boucherot Resistor is 3.9/2W and the capacitoris 1µF.
5/13
TDA7294S
INTRODUCTION
In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the per­formance obtained from the best discrete de­signs.
The task of realizing this linear integrated circuit in conventional bipolar technology is made ex­tremely difficult by the occurence of 2nd break­down phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a con­sequence, the maximum attainable output power, especiallyin presence of highlyreactiveloads.
Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated pro­tectioncircuits.
To overcome these substantial drawbacks, the use of power MOS devices, which are immune fromsecondarybreakdownis highlydesirable.
The device described has therefore been devel­oped in a mixed bipolar-MOS high voltage tech­nologycalledBCDII100.
1) Output Stage
The main design task in developping a power op­erational amplifier, independently of the technol­ogyused, is that of realizationof theoutput stage.
The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output bufferof the TDA7294S.
This large-signal, high-power buffer must be ca­pable of handlingextremely high current and volt­age levels while maintaining acceptably low har­monic distortion and good behaviour over
frequency response; moreover, an accurate con­trol of quiescent current is required.
A local linearizing feedback,provided by differen­tial amplifier A, is used to fullfil the above require­ments, allowing a simple and effective quiescent currentsetting.
Proper biasing of the power output transistors alone is however not enough to guaranteethe ab­sence of crossoverdistortion.
While a linearization of the DC transfer charac­teristic of the stage is obtained, the dynamic be­haviour of the system must be taken into account.
A significant aid in keeping the distortion contrib­uted by the final stage as low as possible is pro­vided by the compensation scheme, which ex­ploits the direct connectionof the Miller capacitor at the amplifier’s output to introduce a local AC feedbackpathenclosingthe output stage itself.
2) Protections
In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overloadcondi­tions.
Due to the absence of the 2nd breakdown phe­nomenon, the SOA of the power DMOS transis­tors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus.
In order to fully exploit the capabilities of the power transistors, the protection scheme imple­mented in this device combines a conventional SOA protection circuit with a novel local tempera­ture sensing technique which ” dynamically” con­trols the maximumdissipation.
Figure3: PrincipleSchematicof a DMOS unity-gain buffer.
6/13
Figure4: Turn ON/OFFSuggestedSequence
+Vs
(V)
+40
-40
-Vs
VIN
(mV)
V
ST-BY
PIN #9
(V)
5V
TDA7294S
V
MUTE
PIN #10
(V)
IQ
(mA)
V
OUT (V)
5V
OFF
ST-BY
PLAY
MUTE MUTE
In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 Tj = 160
o
C).
o
C) and then into stand-by (@
Full protection against electrostatic discharges on everypin is included.
Figure5: Single Signal ST-BY/MUTE Control
Circuit
MUTE STBY
MUTE/
ST-BY
20K
10K 30K
1N4148
10µF10µF
D93AU014
3) Other Features
The device is provided with both stand-by and
ST-BY OFF
D98AU817
mute functions, independently driven by two CMOSlogiccompatible input pins.
The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output.
The sequence that we recommend during the ON/OFFtransientsis shown by Figure 4.
The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum appli­cable range corresponds to the operating supply voltage.
APPLICATION INFORMATION
HIGH-EFFICIENCY Constraints of implementing high power solutions
are the power dissipation and the size of the power supply. These are both due to the low effi­ciency of conventional AB class amplifier ap­proaches.
Here below (figure 6) is described a circuit pro­posal for a high efficiency amplifier which can be adopted for both HI-FI and CAR-RADIO applica­tions.
7/13
TDA7294S
The TDA7294Sis a monolithicMOS power ampli­fier which can be operated at 90V supply voltage (100V with no signal applied)while delivering out­put currentsup to ±6.5 A. This allows the use of this device as a very high power amplifier (up to 100W as peak power with T.H.D.=10% and Rl = 4 Ohm); the only drawback is the power dissipation, hardly manageable in the above power range. The typical junction-to-case thermal resistance of the TDA7294Sis 1 To avoid that, in worst case conditions, the chip temperature exceedes 150 tance of the heatsink must be 0.038 max ambienttemperatureof50
o
C/W (max=1.5oC/W).
o
C, the thermal resis-
o
C).
o
C/W (@
As the above value is pratically unreachable; a high efficiency system is needed in those cases where the continuous RMSoutput power is higher than 50-60W. The TDA7294S was designed to work also in higherefficiencyway. For this reason there are four power supply pins: two intended for the signal part and two for the power part. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power in­creases, these transistors are switched on during the portion of the signal where more output volt­age swing is needed, thus ”bootstrapping” the power supply pins (#13 and #15).
The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7,R8 define the minimum drop across the power MOS transistors of the TDA7294S. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the ”bootstrap” circuitsandthe output stage of the TDA7294S.
By considering again a maximum average output power (music signal) of 20W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is
o
C/W (Vs =±45V and Rl= 8Ohm).
2.2 All components (TDA7294S and power tran­sistors T1 and T2) can be placed on a
o
C/W heatsink, with the power darlingtons
1.5 electricallyinsulated from theheatsink. Since the total power dissipation is less than that of a usual class AB amplifier, additional cost sav­ings can be obtained while optimizing the power supply, even witha highheatsink.
BRIDGEAPPLICATION
Another application suggestion is the BRIDGE configuration,where two TDA7294S are used. In this application, the value of the load must not be lower than 8Ohm for dissipation and current capabilityreasons. A suitable field of application includes HI-FI/TV subwoofersrealizations.
Themain advantagesofferedby this solution are:
- High power performanceswithlimited supply voltagelevel.
- Considerablyhigh output power even with high load values (i.e. 16 Ohm).
With Rl= 8 Ohm, Vs = ±25V the maximum output power obtainable is 150 W, while with Rl=16 Ohm, Vs = ±40V the maximum Pout is 200W (MusicPower).
APPLICATION NOTE:(ref.fig.7) ModularApplication (more Devices in Parallel)
The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a masterandthe othersas slaves. The slave power stages are driven by the master device and work in parallel all together,while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work to­gether.
The master chip connections are the same as the normal single ones.
The outputs can be connected together with-
out the need of any ballastresistance.
The slave SGND pin must be tied to the nega­tivesupply.
The slave ST-BY pin must be connected to ST-BYpin.
The bootstrap lines must be connected to­gether and the bootstrapcapacitor must be in­creased: for N devices the boostrap capacitor mustbe 22µF times N.
The slave Mute and IN-pins must be grounded.
THE BOOTSTRAP CAPACITOR
For compatibility purpose with the previous de­vices of the family, the boostrap capacitor can be connectedboth between the bootstrappin (6) and the output pin (14) or between the boostrap pin (6) and the bootstraploader pin (12). When the bootcap is connected between pin 6 and 14, the maximum supply voltage in presence of output signal is limited to 80V, due the boot­strapcapacitorovervoltage. When the bootcap is connected between pins 6 and 12 themaximum supply voltageextendto the full voltage that the technologycan stand: 100V.
This is accomplished by the clamp introduced at the bootstrap loader pin (12): this pin follows the output voltage up to 100V and remains clamped at 100V. This feature lets the output voltage swing up to a gate-source voltage from the posi­tivesupply(V
S -3to 6V)
8/13
Figure6: High EfficiencyApplicationCircuit
TDA7294S
+50V
D6
1N4001
PLAY
ST-BY
D5
1N4148
IN
D1 BYW98100
C12 330nF
C13 10µF
R13 20K
R14 30K
R15 10K
10µF
D2 BYW98100
R20 20K
R21 20K
+25V
GND
-25V
-50V
C1
1000µF
63V
C2
1000µF
63V
C3
100nF
C4
100nF
C5
1000µF
35V
C6
1000µF
35V
C7
100nF
R22
10K
R23
10K
C8
100nF
C9
330nF
C10
330nF
D7
1N4001
R1
2
R2
2
Figure6a: PCB and ComponentLayout of the fig. 6
C14
R12 13K
3
4
9
1
10
137
815
BDX53A
R17 270
L1 1µH
2
14
6
12
L2 1µH
R19 270
BDX54A
T3
BC394
T1
D3 1N4148
R3 680
R16 13K
C15
22µF
D4 1N4148
T2
T6
BC393
C11 22µF
L3 5µH
R18 270
270
BC393
Z1 3.9V
Z2 3.9V
BC394
270
R4
R5
270
T4
T7
R9
20K
R7
3.3K
R8
3.3K
R10 270
D97AU807C
T5
BC393
R6
C16
1.8nF OUT
P
C17
1.8nF
T8
BC394
R11 20K
ot
9/13
TDA7294S
Figure6b: PCB- Solder Side of the fig. 6.
Figure7: ModularApplicationCircuit
MASTER
VMUTE
VSTBY
SLAVE
C2
22µF
R1 22K
R5 10K
R4 22K
R2
680
C1 470nF
R3 22K
IN- 2
IN+
SGND
MUTE
STBY
C4 10µF
C3 10µF
IN- 2
IN+ 3
SGND
MUTE
STBY
C7 100nF C6 1000µF
BUFFER
DRIVER
713
-
3
4
10
9
4
10 9
+
MUTE STBY
1 STBY-GND
C7 100nF C6 1000µF
+
MUTE STBY
1 STBY-GND
THERMAL
SHUTDOWN
-Vs -PWVs
C9 100nF C8 1000µF
BUFFER
DRIVER
713
-
THERMAL
SHUTDOWN
-Vs -PWVs
C9 100nF C8 1000µF
+Vs
PROTECTION
158
-Vs +Vs
PROTECTION
158
-Vs
+PWVs+Vs
14
OUT
BOOT
12
LOADER
6
BOOTSTRAP
S/C
+PWVs+Vs
S/C
5
14
12
6 5
CLIP DET
OUT
BOOT LOADER
BOOTSTRAP
C5
47µF
D97AU808C
C10
100nF
R7 2
11
11
10/13
TDA7294S
Figure8a: ModularApplicationP.C.Board and ComponentLayout (scale 1:1) (ComponentSIDE)
Figure8b: ModularApplicationP.C. Board and ComponentLayout(scale1:1) (SolderSIDE)
11/13
TDA7294S
DIM.
Dia1 3.65 3.85 0.144 0.152
MIN. TYP. MAX. MIN. TYP. MAX.
A5 B 2.65 0.104 C 1.6 0.063 D 1 0.039 E 0.49 0.55 0.019 0.022
F 0.66 0.75 0.026 0.030
G 1.02 1.27 1.52 0.040 0.050 0.060 G1 17.53 17.78 18.03 0.690 0.700 0.710 H1 19.6 0.772 H2 20.2 0.795
L 21.9 22.2 22.5 0.862 0.874 0.886 L1 21.7 22.1 22.5 0.854 0.870 L2 17.65 18.1 0.695 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L7 2.65 2.9 0.104 0.114
M 4.25 4.55 4.85 0.167 0.179 0.191
M1 4.63 5.08 5.53 0.182 0.200 0.218
S 1.9 2.6 0.075 0.102
S1 1.9 2.6 0.075 0.102
mm inch
0.197
0.886
0.713
OUTLINE AND
MECHANICAL DATA
Multiwatt15 V
12/13
TDA7294S
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13/13
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