SGS Thomson Microelectronics STW20NK50Z Datasheet
STP20NK50Z - STW20NK50Z
N-CHANNEL 500V - 0.23Ω - 20A TO-220/TO-247
Zener-Protected SuperMESH™Power MOSFET
TARGET DATA
TYPE V
STP20NK50Z
STW20NK50Z
■ TYPICAL R
■ EXTREMELY HIGH dv/dtCAPABILITY
■ 100% AVALANCHE TESTED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSIC CAPACITANCES
■ VERY GOOD MANUFACTURING
500 V
500 V
(on) = 0.23 Ω
DS
DSS
R
DS(on)
< 0.27 Ω
< 0.27 Ω
I
D
20 A
20 A
Pw
190 W
190 W
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimi za tio n of ST’s well established stripbased PowerMESH™ layout. In addition to pushing
on-resistance significantly down, spec ial care is taken to ensure a very good dv/dt capability for the
most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.
TO-220
TO-247
INTERNAL SCHEMATIC DIAGRAM
3
2
1
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STP20NK50Z P20NK50Z TO-220 TUBE
STW20NK50Z W20NK50Z TO-247 TUBE
July 2003
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STP20NK50Z - STW20NK50Z
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP20NK50Z STW20NK50Z
V
DS
V
DGR
V
GS
I
D
I
D
IDM()
P
TOT
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
T
j
T
stg
() Pulse width limited by safe operating area
(1) I
≤20A, di/dt ≤200A/µs,VDD≤ V
SD
(*) Limited only by maximum temperature allowed
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 0.66 0.66 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 50 °C/W
T
l
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
500 V
500 V
Gate- source Voltage ± 30 V
Drain Current (continuos) at TC= 25°C
Drain Current (continuos) at TC= 100°C
20 20 A
10 10 A
Drain Current (pulsed) 64 64 A
Total Dissipation at TC= 25°C
190 190 W
Derating Factor 1.51 1.51 W/°C
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 4000 V
Operating Junction Temperature
Storage Temperature
(BR)DSS,Tj≤TJMAX.
-55 to 150
-55 to 150
TO-220 TO-247
Maximum Lead Temperature For Soldering Purpose
300 °C
°C
°C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID=IAR,VDD=50V)
j
20 A
TBD mJ
GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIOD ES
The built-in bac k - to-back Zener diodes have spec if ically been designed to enhance not only the device’s
ESD capability, but a lso to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this r es pec t the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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STP20NK50Z - STW20NK50Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS=8V,ID= 10 A TBD S
g
fs
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Output
C
oss eq.
C
iss
C
oss
C
rss
Capacitance
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ID=1mA,VGS= 0 500 V
V
= Max Rating
DS
VDS= Max Rating, TC= 125 °C
V
= ± 20V ±10 µA
GS
V
DS=VGS,ID
= 250µA
3 3.75 4.5 V
1
50
VGS=10V,ID= 10 A 0.23 0.27 Ω
=25V,f=1MHz,VGS= 0 2600
V
DS
400
55
VGS=0V,VDS= 0V to 400V TBD pF
VDD=250V,ID=10A
RG= 4.7Ω VGS=10V
TBD
TBD
(Resistive Load see, Figure 3)
=400V,ID=20A,
V
V
DD
GS
=10V
95
TBD
TBD
µA
µA
pF
pF
pF
ns
ns
nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Turn-off Delay Time
t
f
Fall Time
VDD= 250 V, ID=10A
R
=4.7ΩVGS=10V
G
TBD
TBD
(Resistive Load see, Figure 3)
t
r(Voff)
t
t
Off-voltage Rise Time
f
c
Fall Time
Cross-over Time
= 400V, ID=20A,
V
DD
RG=4.7Ω, VGS= 10V
(Inductive Load see, Figure 5)
TBD
TBD
TBD
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD(1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
Source-drain Current
(2)
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD=20A,VGS=0
I
SD
VDD=35V,Tj= 150°C
(see test circuit, Figure 5)
= 20 A, di/dt = 100A/µs
TBD
TBD
TBD
when VDSincreases from 0 to 80%
oss
TBD
TBD
TBD V
ns
ns
ns
ns
ns
A
A
ns
µC
A
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