- Internal PWM generator for B+ current mode
step-up converter
- Switchable to step-down converter
-I2C-adjustable B+ reference voltage
- Output pulses synchronized on horizontal
frequency
- Internal maximum current limitation.
Horizontal
■ Self-adaptative
■ Dual PLL concept
■ 80kHz maximum frequency
■ X-ray protection input
2
■ I
C controls: Horizontal duty-cycle, H-position,
horizontal size amplitude
DESCRIPTION
The STV6886 is a monolithic integrated circuit assembled in a 32-pin shrink dual-in-line plastic
package. This IC controls all the functions related
to horizontal and vertical deflection in multimode
or multi-frequency computer display monitors.
The internal sync processor, combined with the
powerful geometry correction block, makes the
STV6886 suitable for very high performance monitors, using few external components.
Combined with other ST components dedicated
for CRT monitors (microcontroller, video preamplifier, video amplifier, OSD controller) the STV6886
allows fully I2C bus-controlled computer display
monitors to be built with a reduced number of external components.
HLOCK
4PLL2CSecond PLL Loop Filter
5C0Horizontal Oscillator Capacitor
6R0Horizontal Oscillator Resistor
7PLL1FFirst PLL Loop Filter
8HPOSITIONHorizontal Position Filter (capacitor to be connected to HGND)
9
HFOCUS-
CAP
10FOCUS OUTMixed Horizontal and Vertical Dynamic Focus Output
11HGNDHorizontal Section Ground
12HFLYHorizontal Flyback Input (positive polarity)
13HREFHorizontal Section Reference Voltage (to be filtered)
14COMPB+ Error Amplifier Output for frequency compensation and gain setting
15REGINFeedback Input of B+ control loop
16I
SENSE
17B+GNDGround (related to B+reference)
18VBREATHV Breathing Input Control (compensation of vertical amplitude against EHV variation)
19VGNDVertical Section Ground
20VAGCCAPMemory Capacitor for Automatic Gain Control in Vertical Ramp Generator
21V
REF
22VCAPVertical Sawtooth Generator Capacitor
23VOUTVertical Ramp Output (with frequency-independent amplitude and S or C Corrections
Horizontal Moiré Output (to be connected to PLL2C through a resistor divider), HLock
Output
Horizontal Dynamic Focus Oscillator Capacitor
Sensing of external B+ switching transistor current, or switch for step-down converter
Vertical Section Reference Voltage (to be filtered to pin 19)
if any). It includes vertical position and vertical moiré voltages.
Supply Voltage(12V typ) (referenced to Pin 27)
2
C Clock Input
2
C Data Input
STV6886
3/43
STV6886
QUICK REFERENCE DATA
ParameterValueUnit
Any polarity on H Sync & V Sync inputsYES
TTL or composite SyncsYES
Sync on GreenNO
Horizontal Frequency15 to 80kHz
Horizontal Autosync Range (for given R0 and C0. Can be easily increased by application)1 to 3.5 f0
Control of free-running frequencyNO
Frequency Generator for Burn-inNO
2
Control of H-Position through I
Control for H-Duty Cycle through I
PLL1 Inhibition PossibilityNO
Output for Horizontal Lock/UnlockYES
Dual Polarity H-Drive OutputsNO
Vertical Frequency35 to 150Hz
Vertical Autosync Range (for 150nF on Pin 22 and 470nF on Pin 20)50 to 120Hz
Vertical S-Correction (adapted to normal or super flat tube), controlled through I
Vertical C-Correction, controlled through I
Control of Vertical Amplitude through I
Control of Vertical Position through I
Input for Vertical Amplitude compensation versus EHVYES
E/W Correction Output(also known as Pin Cushion Output)YES
Horizontal Size Adjustment through I
Control of E/W (Pincushion) Adjustment through I
Control of Keystone (Trapezoïd) Adjustment through I
Control of Corner Adjustment through I
Fully integrated Dynamic Horizontal Phase ControlYES
Control of Side Pin Balance through I
Control of Parallelogram through I
H/V composite Dynamic Focus OutputYES
Control of Horizontal Dynamic Focus Amplitude through I
Control of Horizontal Dynamic Focus Symmetry through I
Control of Vertical Dynamic Focus Amplitude through I
Tracking of Geometric Corrections and ofVertical focus withVertical Amplitude and PositionYES
Control of Horizontal and Vertical Moiré cancellations through I
Optimisation of HMoiré frequency through I
B+ Regulation, adjustable through I
Stand-by function, disabling H and V scanning and B+YES
X-Ray protection, disabling H scanning and B+YES
Blanking OutputsNO
2
C Read/Write400kHz
Fast I
2
C indication of the presence of Syncs (biased from 5V alone)YES
I
2
C indication of the polarity and Type of SyncsYES
I
2
C indication of Lock/Unlock, for bothHorizontal and Vertical sectionsYES
I
CYES
2
C30to65%
2
CYES
2
CYES
2
CYES
2
CYES
2
C control of E/W Output DC levelYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
2
CYES
4/43
H/HVIN
V
SYNCIN
HMOIRE
/HLOCK
SDA
SCL
GND
5V
SyncInput
1
2
VSYNCHFLY
HorizontalMoire
3
7 bits+ON/OFF
31
30
27
32
Select
(1bit)
Generator
+Frequency
2
I
C Interface
PLL1FPOSITION R0 C0HFLYPLL2CHOUT
786 512426
Phase/Frequency
Comparator
H-Phase(7bits)
Sync
Processor
VCO
Lock/Unlock
Identification
Phase
Comparator
SPinbal
7bits
2
x
Phase
Shifter
H-Duty
(7bits)
Safety
Processor
B+
Controller
x
Keybal
7bits
VDFAMP
7bits
2
4
2
x
Amp
Symmetry
2x7bits
7 bits
S andC
Correction
7 bits
Vertical
Oscillator
RampGenerator
VAMP
7bits
Geometry
Tracking
E/Wpcc
7bits
Keyst.
7 bits
Corner
7bits
x
x
x
Hout
Buffer
+
5V
Internal
reference
(7bits)
2
x
HSize
DC
7 bits
11
19
17
29
25
28
16
14
15
10
9
24
BLOCK DIAGRAM
HGND
VGND
GND
VCC
XRAY
+OUT
ISENSE
COMP
REGIN
FOCUS
HFOCUSCAP
EWOUT
5/43
HREF
VREF
13
21
OUT
VerticalMoire
Cancel
7bits+ON/OFF
VSYNC
STV6886
STV6886
H
ref
V
ref
VPOS
7bits
23182022
V
CAP
AGCCAP
VBREATHV
V
STV6886
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
CC
V
DD
V
IN
VESD
T
stg
T
j
T
oper
Supply Voltage (Pin 29)13.5V
Supply Voltage (Pin 32)5.7V
Supply VoltagePin 2910.81213.2V
Supply VoltagePin 324.555.5V
Supply CurrentPin 2950mA
Supply CurrentPin 325mA
Horizontal Reference VoltagePin 13, I = -2mA7.68.28.8V
Vertical Reference VoltagePin 21, I = -2mA7.68.28.8V
Max. Sourced Current on V
Max. Sourced Current on V
=25°C unless otherwise indicated)
amb
REF-H
REF-V
Pin 135mA
Pin 215mA
6/43
STV6886
I2C READ/WRITE
Electrical Characteristics (VDD= 5V, T
SymbolParameterTest ConditionsMin.Typ.Max.Units
2
C PROCESSOR
I
FsclMaximum Clock FrequencyPin 30400kHz
TlowLow period of the SCL ClockPin 301.3µs
ThighHigh period of the SCL ClockPin 300.6µs
VinthSDA and SCL Input ThresholdPins 30, 312.2V
VACK
2
C leak
I
Note: 1 See also I2C Bus Address Table.
(1)
Acknowledged Output Voltage on SDA
input with 3mA
Leakage current into SDA and SCL with
no logic supply
Sub-address 02
DC level pin 3 when PLL1 is
unlocked
(7)
1xxx xxxx
0000 0000
0111 1111
6
0.3
2.753
V
V
V
V
V
µA
mA
kHz
kHz
V
V
V
8/43
STV6886
SymbolParameterTest ConditionsMin.Typ.Max.Units
2nd PLL SECTION AND HORIZONTAL OUTPUT SECTION
FBthFlyback Input Threshold Voltage (Pin 12)0.650.75V
HjitHorizontal Jitter
HDmin
HDmax
XRAYth
Vphi2
Horizontal Drive Output Duty-Cycle (Pin
(9)
26)
X-RAY Protection Input Threshold Voltage,
Internal Clamping Levels on 2nd PLL
Loop Filter (Pin 4)
(8)
Inhibition threshold (The condition V
VSCinh
VSCinh willstop H-Out, V-Out, B-Out and
reset X-RAY)
HDvdHorizontal Drive Output (low level)Pin 26, I
Note: 3 This delay is necessary to avoid a wrong detection of polarity change in the case of a composite sync.
4 See Figure 10 for explanation of reference phase.
5 These parameters are not tested on each unit. They are measured during our internal qualification.
6 A larger range may be obtained by application.
7 When at 0xxx xxxx, (HMoiré/HLock not selected), Pin 3 is a DAC with 0.3...2.75V range. When at 1xxx xxxx
(HMoiré/HLock selected) and PLL1 is locked, Pin 3 provides the waveform for HMoiré. See also Moiré
section.
8 Hjit = 10
6
x(Standard deviation/Horizontal period).
9 Duty Cycle is the ratio between the output transistor OFF time and the period. The scanning transistor is
controlled OFF when the output transistor is OFF.
10 Initial Condition for Safe Start Up.
At 31.4kHz70ppm
Sub-Address 00
Byte x1111111
Byte x0000000
(10)
30
65
Pin 25, (see fig. 14)7.68.28.8V
CC
Low Level
High Level
<
1.6
4.2
Pin 297.5V
= 30mA0.4V
OUT
%
%
V
V
9/43
STV6886
VERTICAL SECTION
Operating Conditions
SymbolParameterTest ConditionsMin.Typ.Max.Units
R
LOAD
Electrical Characteristics (VCC= 12V, T
SymbolParameterTest ConditionsMin.Typ.Max.Units
VRBVoltage at Ramp Bottom PointPin 222.1V
VRTVoltage at Ramp Top Point (with Sync)Pin 225.1V
VRTF
VSTDVertical Sawtooth Discharge TimePin 22, C
VFRFVertical Free Running Frequency
ASFRAUTO-SYNC Frequency
RAFD
RlinRamp Linearity on Pin 22
VPOS
VOR
VOI
dVS
Ccorr
BRRANGDC Breathing Control Range
BRADj
Note: 11 These parameters are not tested on each unit. They aremeasured during ourinternal qualification procedure.
Note: 12 Set Register 07 at Byte 0xxxxxxx (S correction inhibited) and Register 08 at Byte 0xxxxxxx (C correction
Note: 13 This is the frequency range for which the vertical oscillator will automatically synchronize, using a single
Note: 14 When not used, the DC breathing control pin must be connected to 12V.
Minimum Load for less than 1% Vertical
Amplitude Drift
amb
Voltage at Ramp Top Point (without
Sync)
(12)
(13)
Ramp Amplitude Drift Versus Frequency
at Maximum Vertical Amplitude
(11)
(12)
Pin 2065MΩ
=25°C)
Pin 22
= 150nF70µs
22
Pin 22, C22= 150nF100Hz
C22= 150nF ±5%50120Hz
C22= 150nF
50Hz< f < 120Hz
2.5V < V27< 4.5V0.5%
Sub Address 06
Vertical Position Adjustment Voltage (Pin
23 - VOUT mean value)
Byte 00000000
Byte 01000000
Byte 01111111Tbd
Sub Address 05
Vertical Output Voltage
(peak-to-peak on Pin 23)
Byte 10000000
Byte 11000000
Byte 11111111Tbd
Vertical Output Maximum Current
(Pin 23)
Max Vertical S-Correction Amplitude (TV
is the vertical period)
(0xxxxxxx inhibits S-CORR
11111111 gives max S-CORR)
Sub Address 07
Byte 11111111
∆V/V
∆V/V
at TV/4
PP
at 3TV/4
PP
Sub Address 08
Vertical C-Corr Amplitude
(0xxxxxxx inhibits C-CORR)
∆V/V
Byte 10000000
Byte 11000000
PP
at TV/2
Byte 11111111
(14)
Vertical Output Variation versus DC
Breathing Control (Pin 23)
V
18
V
18>VREF-V
1V<V18< V
REF-V
inhibited), to obtain a vertical sawtooth with linear shape.
capacitor value on Pin22 and Pin 20, and with a constant ramp amplitude.
VRT-
0.1
200
3.2
3.6
4.0
2.15
3.0
3.9
TbdV
TbdV
V
ppm/
Hz
V
V
V
V
±5mA
-3.5
+3.5
-3
0
+3
%
%
%
%
%
112V
0
-2.5
%/V
%/V
10/43
STV6886
DYNAMIC FOCUS SECTION
Electrical Characteristics (VCC= 12V, T
SymbolParameterTest ConditionsMin.Typ.Max.Units
HORIZONTAL DYNAMIC FOCUS FUNCTION (seeFigure 15 on page 28)
Horizontal Dynamic Focus Sawtooth
HDFst
HDFdis
HDFstart
HDFDCBottom DC Output LevelR
TDFHDDC Output Voltage Thermal Drift
HDFamp
HDFKeyst
VERTICAL DYNAMIC FOCUS FUNCTION (see Figure 1)
AMPVDF
VDFAMP
VHDFKeyt
Note: 15 S and C correction are inhibited to obtain a linear vertical sawtooth.
Minimum Level
Maximum Level
Horizontal Dynamic Focus Sawtooth
Discharge Width
Internal Phase Advance versus HFLY
middle
(Independent of frequency)
Horizontal Dynamic Focus
Amplitude
Max Byte
Typ Byte
Max Byte
Horizontal Dynamic FocusSymmetry
(For time reference, see Figure 15)
Max Phase Advance
Max Phase Delay
Vertical Dynamic Focus Parabola (added
to horizontal) Amplitude with VAMP and
VPOS Typical
Parabola Amplitude Function of VAMP
(tracking between VAMP and VDF) with
VPOS Typ. (see Figure 1 on page 15,
(15)
)
and
Parabola Asymmetry Function of VPOS
Control (tracking between VPOSand
VDF) with VAMP Max.
B/A Ratio
A/B Ratio
ASYMMETRIC CONTROL THROUGH INTERNAL DYNAMIC HORIZONTAL PHASE MODULATION (see Figure 3)
Side Pin Balance Parabola Amplitude
(Figure 3) with :
SPBpara
-VAMP max.,
-VPOS typ.
-Parallelogram inhibited
(17 & 18)
Side Pin Balance Parabola Amplitude
function of VAMP Control (tracking be-
SPBtrack
tween VAMP and SPB) with:
-SPB max.,
-VPOS typ.
-Parallelogram inhibited
(17 & 18)
Parallelogram Adjustment Capability
with:
ParAdj
-VAMP max.,
-VPOS typ.
-SPB inhibited
(17 & 18)
Intrinsic Parallelogram Function of VPOS
Control (tracking between VPOSand
DHPC) with :
Partrack
-VAMP max.,
-SPB max.
-Parallelogram inhibited
(17 & 18)
B/A Ratio
A/B Ratio
Note: 16 These parameters arenot tested on each unit. They are measured during our internal qualification procedure.
Note: 17 With Register 07 at Byte 0xxxxxxx (S correction inhibited) and Register 08 at Byte 0xxxxxxx (C correction
inhibited), the sawtooth has a linear shape.
Subaddress 0D
Byte 11111111
Byte 10000000
Subaddress 05
Byte 10000000
Byte 11000000
Byte 11111111
Subaddress 0E
Byte 11111111
Byte 11000000
Subaddress 06
Byte x0000000
Byte x1111111
+2.8
-2.8
1
1.8
2.8
+2.8
-2.8
0.52
0.52
%T
%T
%T
%T
%T
%T
%T
H
H
H
H
H
H
H
MOIRE CANCELLATION SECTION
Electrical Characteristics (VCC= 12V, T
SymbolParameterTest ConditionsMin.Typ.Max.Units
HORIZONTAL AND VERTICAL MOIRE
R
MOIRE
DacOut
HMOIRE
T
HMOIRE
VMOIRE
Note: 18 THis the horizontal period.
Minimum Output Resistor to GNDPin 34.7kΩ
DC Voltage pin 3
DAC configuration
Moiré pulse
(See also Hunlock in 1st PLL section)
H Frequency: Locked
Preferred Scanning/EHT structure
Vertical Moiré
(measured on VOUT: Pin 23)
amb
=25°C)
R
sub-address 02
Byte 00000000
Byte 01000000
Byte 01111111
R
Sub-address 02
Byte 10000000
Byte 11000000
Byte 11111111
Sub-address II:
0xxx xxxx
1xxx xxxx
Sub-address 0C
Byte 111111113mV
MOIRE
MOIRE
=4.7kΩ
0.3
1.1
2.753
=4.7kΩ
0
0.8
2.2
Separate
Combined
V
V
V
V
PP
V
PP
V
PP
13/43
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