BUILT-IN AUTOMATICEQUALIZER FOR UP TO
30dB ATTENUATION AT 135MHz (TYPICALLY
300m OF HIGH-GRADE COAXIAL CABLE), PLL
CIRCUITFORRECLOCKING,ANDSERIAL-PARALLELCONVERSIONCIRCUIT.
THIS SERIAL TRANSMISSION DECODER REQUIRESONLYFEWEXTERNALCOMPONENTS.
OTHERRELATEDIC’s INCLUDE:
.
STV1601A, A SERIAL TRANSMISSION ENCODER (PARALLEL-TO-SERIAL CONVERSION)
.
STV1389AQCOAXIALCABLE DRIVER
STV1602A
STRUCTURE
.
Hybrid IC
APPLICATIONS
SERIALDATA TRANSMISSION DECODER
.
100 to 270Mb/s
APPLICATIONSEXAMPLES
.
Serial data transmission of digital television
signals525-625 lines
.
4:2:2 component 270Mb/s(10-bit)
.
4*fscPALcomposite 177Mb/s (10-bit)
.
4*fscNTSC Composite 143Mb/s (10-bit)
FUNCTIONS
.
Cableequalizer
(maximumgain : 30dB at 135MHz)
.
PLL for serial clockgeneration
.
Reclockedrepeateroutput(activeloop
through)
.
Descrambler: modulo-2multiplicationby
G(x) = (x
.
Parallel-to-serial conversion
.
Syncmonitor output
.
Eye pattern monitoring
.
Input signal detector
DESCRIPTION
The STV1602Ais a Hybrid IC decoder which convertsserial data comingfroma serialtransmission
line into parallel data.
9+x4
+1)(x+1)
(Ceramic Package)
ORDER CODE : STV1602A
PIN CONNECTIONS
GND
AIX
27 26 25 24 23 22 21 20 19
CX
DIX
DIY
FV
28
29
30
31
32
33
34
35
ESI
36
37
123456789
ESO
GND
QFS
GND
MON
ADS
DPR
PGA37
AIY
SY
GND
SX
EE
V
QSW
RSE
TN1
EVR
EEVEE
V
SYN
PCK
18
17
16
15
14
13
12
11
10
D9
D0
D1
D2
D3
D4
D5
D6
D7
D8
1601A-01.EPS
December 1992
1/22
STV1602A
PIN DESCRIPTION
Pin
SymbolEquivalent CircuitDescriptionI/O
o
N
GND
3SY
4SX
QSW
5
(GND)
30Ω30Ω
34
V
R3
2kΩ2kΩ
145Ω
V
EE
GND
1kΩ
36
Reclocked serial data output
in differential mode.
SX and SY are disabled
when TN1 is setHigh.
In this case, SX isset High
and SY is set Low
H
L
1602A-02.EPS
To be connected to GNDI
Standard
Min. Typ. Max. Unit
O
-1.6
-2.4
V
V
36FV
1ESO
5
V
EE
1kΩ1kΩ
2kΩ
10kΩ
10kΩ
2kΩ
GND
1
V
Adjustment of VCO Free
running frequency : V
gives the lowest frequency.
EE
level
I
To adjust it, set TN1 High.
1602A-03.EPS
Output of phase comparator
O-3.2V
: must be connected to ESI
with the shortest distance
EE
1602A-04.EPS
1602A-01.TBL
2/22
PIN DESCRIPTION(continued)
Pin
SymbolEquivalent CircuitDescriptionI/O
o
N
STV1602A
Standard
Min. Typ. Max. Unit
9
D9
to
18
to
D0
19PCK
21EVR
26AIX
25AIY
GND
V
R3
V
GND
26
25
V
EE
EE
600Ω600Ω300Ω
210Ω210Ω
300
Ω
10kΩ10kΩ
3kΩ4kΩ4kΩ
Parallel data output
H
L
21
Parallel clock output (rising
9
edge at data center)
18
H
L
Data output reference
O
-0.8
-1.6
O
-0.8
-1.6
O-1.2V
potential
1602A-05.EPS
Equalizer differential inputI-2.0V
V
V
V
V
1602A-06.EPS
GND
2kΩ
28NCTo beleft openI-4.6V
1kΩ
29
28
29CX
16kΩ2kΩ2kΩ
Equalizer detectoroutput;
Input signal :
V
EE
1602A-07.EPS
absent
present
O
-2.4
-2.0
V
V
1602A-02.TBL
3/22
STV1602A
PIN DESCRIPTION(continued)
Pin
SymbolEquivalent CircuitDescriptionI/O
o
N
GND
1kΩ
31
Equalizer monitoroutput.
Connect 75Ω resistor
between MON-GND.
Observe using a 50Ω input
oscilloscope at the 75Ω
coaxial cable.
1602A-08.EPS
31MON
V
GND
500Ω
R3
500Ω500Ω
V
EE
Standard
Min. Typ. Max. Unit
O
15mV
(pp)
32ADS
33DIX
34DIY
V
GND
33
34
V
EE
2kΩ2kΩ
32
?
V
R2
Serial data input selection
High : Digital input DIX/DIY
I
Low :Equalizer input
V
R3
2k
Ω
EE
500Ω500Ω
1602A-09.EPS
L
Serial data digital differential
H
V
R1
V
R3
input
Selected when ADS is High.
H
L
500Ω
1602A-10.EPS
-0.5
-5VV
I
-1.0
-1.6VV
1602A-03.TBL
4/22
PIN DESCRIPTION(continued)
Pin
SymbolEquivalent CircuitDescriptionI/O
o
N
GND
STV1602A
Standard
Min. Typ. Max. Unit
37ESI
6TN1
GND
V
37
PLL error signalinput : must
i
be connected to ESO with
the shortest distance
2kΩ
V
EE
20kΩ
2kΩ
1602A-11.EPS
Serial data input activation
I
High : Input disabled (VCO
-3.2V
-1.0
free running condition).
Low :Input enabled.
-4.0VV
During switch-on phase, by
6
4kΩ12kΩ
EE
temporarily hold High for
quick start-up
1602A-12.EPS
20SYN
GND
4kΩ
V
CC
State changesat each TRS
O
Sync word
3FFH 000H 000H
20
2kΩ
V
EE
2kΩ
1602A-13.EPS
H
L
-1.0
-4.0VV
1602A-04.TBL
5/22
STV1602A
PIN DESCRIPTION(continued)
Pin
SymbolEquivalent CircuitDescriptionI/O
o
N
GND
1kΩ1kΩ
Standard
Min. Typ. Max. Unit
35DPR
22RSE
Serial data detection output.
O
When there is an input
signal at theinput side
selected through ADS, this
pin goes High.
At no signal, it goes Low.
35
H
L
-1.0
-4.0VV
i.e.
- present : High
- absent : Low
6kΩ
V
EE
2kΩ
10kΩ
GND
22
1602A-14.EPS
Selects VCO frequency
range
H : High range
140 to 270MHz
I
L : Low range
100 to 145MHz
H
L
-0.4
-4.0VV
7
V
23
8V
2
24
GNDGND
27
30
6/22
EE
EE
10kΩ10kΩ
V
EE
1602A-15.EPS
-5V supply
I/O buffer, PLL
-5.2-5.0-4.8V
equalizer
-5V Supply
Logic part
-5.2-5.0-4.8V
1602A-05.TBL
BLOCK DIAGRAM
STV1602A
GND
GND
GND
GND
AIX
AIY
QFS
CX
MON
EVR SYN PCK
212019
2
INPUT
SELECT
Parallel clock
TIMING
GENERATOR
SYNC
DETECTOR
24
27
30
AUTOMATIC
26
25
EQUALIZER
28
29
31
ECL OUT
REFERENCE
VOLTAGE
CABLE
33 343713635326
DIX DIYADSTN1DPRFVESO ESI
D0D1D2D3D4D5D6D7D8D9
1817161514131211109
10-BITLATCH
30-BIT SHIFT REGISTER
94
X + X + 1 DESCRAMBLER
DATA
RELAY
DATA
DETECTOR
Serial clock
EDGE
DETECTOR
NRZI TO NRZ
PHASE
DETECTOR
Reclocked serial data
VCO
V
7
EE
V
23
EE
V
8
EE
4
SX
3
SY
22
RSE
1602A-16.EPS
ABSOLUTEMAXIMUMRATINGS (T
=25oC)
A
SymbolParameterValueUnit
Supply Voltage-6V
Input VoltageVEEto 0V
Output Current-30mA
Operating Temperature0 to 65
Storage Temperature-50 to 125
Allowable Power Dissipation2.0W
I
T
V
V
OUT
oper
T
P
EE
IN
stg
D
RECOMMENDED OPERATINGCONDITIONS
SymbolParameterValueUnit
V
EE
T
oper
Supply Voltage-4.8 to -5.2V
Operating Temperature0 To 65
o
C
o
C
1602A-06.TBL
C
o
1602A-07.TBL
7/22
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