1GNDConnected to the Lead Frame
2S2 VID OUTVCR-Scart 2 VideoOutput
3VOL LVolume Controlled Audio Out Left
4S2 VID RTNVCR-Scart 2 Video Return
5S2 OUT LFixed Level Audio OutputLeft (to VCR)
6CLAMP INSync-Tip Clamp Input
7S2 OUT RFixed Level Audio OutputRight (to VCR)
8UNCL DEEMUnclamped Deemphasized Video Output
9VIDEEM2/22kHzVideo Deemphasis 2 or 22kHz Output
10 - 11V 12VVideo 12V Supply
12VIDEEM1Video Deemphasis 1
13 - 14V GNDVideo Ground
15NC
16B-BAND INBase Band Input
17S2 RTN LAuxiliary Audio Return Left (from VCR)
18S2 RTN RAuxiliary Audio Return Right (from VCR)
19FM INFM Demodulator Input
20S3 RTN LAuxiliary Audio Return Left (from decoder)
64
S1 VIDOUT
63
S3 VIDOUT
62
VOL R
61
S3 VIDRTN
60
S1 VIDRTN
59
LEVELR
58
PKIN R
57
FCR
56
AGNDR
55
FCL
54
PKIN L
53
LEVELL
52
PKOUTL
51
PKOUTR
50
I
49
U75 R
REF
CPUMPR
0056F-01.EPS
0056F-01.TBL
2/27
PIN ASSIGNMENT(continued)
Pin NumberNameFunction
21S3 RTN RAuxiliary Audio Return Right (from decoder)
22AGC LAGC Peak Detector Capacitor Left
23S3 OUT LAuxiliary Audio Output L (to decoder)
24S3 OUT RAuxiliary Audio Output R (to decoder)
25I/O/22kHzDigital Input/Output or 22kHz Output
26SCLI
27SDAI
28HAHardware Address
29J17 RJ17 Deemphasis Time Constant Right
30J17 LJ17 Deemphasis Time Constant Left
31XTL4/8MHz Quartz Crystal or Clock Input
32V
5VDigital 5V Power Supply
DD
34NCNot Connected
33GND 5VDigital Power Ground
35CPUMP LFM PLL Charge Pump Capacitor Left
36DET LFM PLL Filter Left
37U75 LDeemphasis Time Constant Left
38AMPLK LAmplitude Detector Capacitor Left
39AGC RAGC Peak Detector Capacitor Right
40NC
41 - 42A GND LAudio Ground
43V
REF
44 - 45A 12VAudio 12V Supply
46AMPLK RAmplitude Detector Capacitor Left
47DET RFM PLL Filter Right
48U75 RDeemphasis Time Constant Right
49CPUMP RFM PLL Charge Pump Capacitor Right
50I
REF
51PK OUT RNoise Reduction Peak Detector Output Right
52PK OUT LNoise Reduction Peak Detector Output Left
53LEVEL LNoise Reduction Level Left
54PK IN LNoise Reduction Peak Detector Input
55FC LAudio Roll-off Left
56A GND RAudio Ground
57FC RAudio Roll-off Right
58PK IN RNoise Reduction Peak Detector Input Right
59LEVEL RNoise Reduction Level Right
60S1 VID RTNTV-Scart 1 Video Return
61S3 VID RTNDecoder-Scart Video Return
62VOL RVolume Controlled Audio Out Right
63S3 VID OUTDecoder-Scart Video Output
64S1 VID OUTTV-Scart 1 VideoOutput
2
C Bus Clock
2
C Bus Data
2.4V Reference
Current Reference Resistor
STV0056AF
0056F-01.TBL
3/27
STV0056AF
PIN DESCRIPTION
1 - Sound Detection
FMIN
This is the input to the two FM demodulators. It
feeds two AGC amplifiers with a bandwidth of at
least 5-10MHz. There is one amplifier for each
channelboth withthe sameinput. TheAGC amplifiers have a 0dB to +40dBrange.
=5kΩ, Mininput = 2mVPPper subcarrier.
Z
IN
Max input = 500mV
addedtogether,when their phases coincide).
AGC L, AGC R
AGC amplifiers peak detector capacitor connections.The output current hasan attack/decayratio
of 1:32. That is the ramp up current is approximately 5µA and decay current is approximately
160µA. 11V gives maximum gain. These pins are
also driven by a circuit monitoring the voltage on
AMPLKL and AMPLK R respectively.
AMPLKL, AMPLK R
The outputs of amplitude detectors LEFT and
RIGHT.Eachrequiresa capacitorand a resistorto
GND. The voltage across this is used to decide
whetherthereis a signalbeing receivedby the FM
detector.The level detector output drives a bit in
the detectorI
2
C bus controlblock.
AMPLK L and AMPLK R drive also respectively
AGCLand AGCR. For instancewhen the voltage
on AMPLK L is > (V
frompin AGCLto reduce the AGCgain.
V
REF
DET L, DETR
Respectivelythe outputsofthe FMphasedetector
leftand right.
This is for the connectionof an external loop filter
for the PLL. The output is a push-pull current
source.
CPUMPL, CPUMPR
The output from the frequency synthesizer is a
push-pullcurrentsourcewhichrequiresa capacitor
(max when all inputs are
PP
+1VBE) it sinks current to
REF
to groundto derivea voltageto pull the VCOto the
target frequency.The outputis ±100µA to achieve
lockand±2µAduringlocktoprovidea trackingtime
constant of approximately10Hz.
V
REF
This isthe audio processorvoltage referenceused
through out the FM/audio section of the chip. As
such it is essential that it is well decoupled to
ground to reduce as far as possible the risk of
crosstalk and noise injection. This voltage is derived directlyfrom the bandgapreferenceof 2.4V.
The V
output can sink up to 500µA in normal
REF
operationand 100µAwhen in stand-by.
I
REF
Thisis abufferedV
outputtoan off-chipresistor
REF
to produce an accurate current reference, within
the chip, for the biasing of amplifiers with current
outputs into filters.It is also required for the Noise
reduction circuit to provide accurate roll-off frequencies. This pin should not be decoupled as it
would inject current noise. The target current is
50µA±2% thusa 47.5kΩ ±1% is required.
A 12V
Double bonded main power pin for the audio/FM
section of the chip. The two bond connectionsare
to the ESD and to power the circuit and on chip
regulators/references.
A GND L
This groundpin is double bonded :
1) to channelLEFT : RF section & VCO,
2) to both AGC amplifiers, channel LEFT and
RIGHTaudio filtersection.
A GND R
This groundpin is double bonded :
1) to the volume control, noise reduction system,
ESD + Mux + V
The noise reduction control loop peak detector
outputrequiresa capacitortogroundfrom thispin,
and a resistor to V
pin to give some accurate
REF
decaytimeconstant.Anonchip5kΩ ±25%resistor
and external capacitor give the attack time.
PK IN L, PK IN R or PK IN
Eachof thesepinsis an inputtoa controllooppeak
detector and is connected to the output of the
offchipcontrolloop band pass filter.
STV0056AF
U75 L, U75 R
External deemphasis networks for channels left
andright.Foreachchannelacapacitorandresistor
in parallel of 75µs time constant are connected
betweenhereandV
sis. Internallyselectableis an internalresistor that
canbeprogrammedto beaddedin parallelthereby
convertingthe network to approx 50µs de-emphasis (see controlblock map). The value of theinternal resistors is 54kΩ ±30 %. The amplifier for this
filter is voltage input, current output ; with ±500mV
input the output will be ±55µA.
toprovide75µsde-empha-
REF
LEVELL, LEVELR
Respectivelythe audio left and right signals of the
FMdemodulators are output to level L and level R
pins through an input follower buffer. The off-chip
filters driven by these pins must include AC couplingto thenext stage (PK IN L and PK IN R pins
respectively).
FC L, FC R
The variable bandwidth transconductance amplifier has a currentoutput which is variabledependingon the input signalamplitude as defined by the
control loop of the noise reduction. The output
current is then dumped into an off-chip capacitor
whichtogetherwith the accuratecurrent reference
definethemin/maxrolloff frequencies.Aresistorin
serieswith acapacitoris connectedtoground from
thesetwo pins.
J17 L, J17 R
The external J17 de-emphasisnetworks for channels left and right. The amplifier for this filter is
voltageinput, current output. Output with ±500mV
input will be ±55µA.
ToperformJ17 de-emphasiswiththeSTV0042,an
externalcircuit isrequired.
VOLL, VOL R
The main audio output from the volume control
amplifierthe signalto get output signalsas highas
2V
(+12dB) on a DC bias of 4.8V. Control is
RMS
from +12dB to -26.75dB plus Mute with 1.25dB
steps.Thisamplifierhasshortcircuitprotectionand
is intendedto drivea SCARTconnectordirectlyvia
AC couplingand meetsthe standardSCART drive
requirements. These outputs feature high impedance mode forparallel connection.
S2 OUT L, S2 OUT R, S3 OUT L, S3 OUT R
These audio outputs are sourced directly from the
audio MUX, and as a result do not include any
volume control function. They will output a 1V
RMS
signal biased at 4.8V.They are short circuit protected. These outputs feature high impedance
mode for parallel connection and meet SCART
drive requirement.
S2 RTN L, S2 RTN R, S3 RTN L, S3 RTN R
These pins allow auxiliaryaudio signalsto be connected to the audio processor and hence makes
use of the on-chip volume control. For additional
detailsplease refer to the audio switchingtable.
5/27
STV0056AF
PIN DESCRIPTION(continued)
3 - Video Processing
B-BAND IN
AC-coupledvideo input from a tuner.
Z
> 10kΩ ±25%. This drives an on-chip video
IN
amplifier. The other input of this amp is AC
groundedby being connectedto an internalV
The video amplifier has selectable gain from 0dB
to 12.7dB in 63 steps and its output signal can be
selectednormalor inverted.
UNCLDEEM
Deemphasizedstill unclamped output.It isalso an
input of the video matrix.
VIDEEM1
Connected to an external de-emphasis network
(forinstance 625 lines PALde-emphasis).
VIDEEM2/ 22kHz
Connected to an external de-emphasis network
(forinstance525linesNTSCorothervideo de-emphasis).Alternativelyaprecise22kHz tonemaybe
output by I
2
C bus control.
CLAMPIN
This pin clamps the most negative extreme of the
input(the sync tips)to 2.7V
(or appropriatevolt-
DC
age). The video at the clamp input is only 1V
This clamped video which is de-emphasised, filtered and clamped (energy dispersal removed) is
normal, negative syncs, video. This signal drives
the Video Matrixinput called Normal Video.
It hasa weak(1.0µA ±15 %) stablecurrentsource
pullingthe inputtowardsGND. Otherwisethe input
impedanceis very high at DC to 1kHz Z
Video bandwidth through this is -1dB at 5.5MHz.
TheCLAMP input DC restore voltageis then used
as a means for getting the correct DC voltage on
the SCART outputs.
S3 VID RTN
This input can be driven for instance by the decoder.This input hasa DC restorationclampon its
input.Theclampsink current is 1µA ±15%with the
bufferZ
>1MΩ.
IN
S2 VID RTN, S1 VID RTN
Externalvideoinput1.0VppACcoupled75Ωsource
impedance.This input has a DC restorationclamp
on its input. The clamp sink current is 1µA ±15%
withthe bufferZ
>1MΩ.This signalis an input to
IN
the Video Matrix.
>2MΩ.
IN
REF
PP
onthe O/P. Thesignalis video2.0V
PP
with sync tip = 1.2V.These pins get signals from
the Video Matrix. The signal selected from the
Video Matrix for output on this pin is controlled by
a control register. This output also feature a high
impedancemode for parallel connection.
.
S3 VID OUT
This output can drive for instance a decoder. Also
it is able to pass 10MHz ; Z
this pin will be 2V
. The black level of the ouput
PP
<75Ω. Video on
OUT
video signal can be adjusted through I
trol to easily interface with on-board Videocrypt
decoder. This output feature an high impedance
mode for parallel connection.
Doubledbonded.Clean VID INGND. Strategically
placed video power ground connection to reduce
video currents getting into the rest of the circuit.
4 - ControlBlock
GND 5V
.
The main power ground connectionfor the control
logic, registers, the I
2
C bus interface, synthesizer
& watchdogand XTLOSC.
VDD5V
Digital +5V power supply.
SCL
Thisis theI2C busclockline.Clock=DCto100kHz.
Requiresexternal pull up eg. 10kΩ to 5V.
SDA
This isthe I2Cbus data line.Requiresexternalpull
up eg. 10kΩ to 5V.
I/O / 22kHz
Generalpurposeinput outputpin or 22kHz output.
XTL
Thispinallowsfor theon-chiposcillatorto beeither
used with a crystal to ground of 4MHzor 8MHz,or
to be driven by an external clock source. The
external source can be either 4MHz or 8MHz. A
programmablebitinthecontrol blockremovesa ÷2
block when the 4MHz option is selected.
5.5MHzBW
2
C bus con-
S1 VID OUT,S2 VID OUT
Video drivers for SCART 1 and SCART 2. An
externalemitter follower buffer is requiredto drive
a 150Ω load. The average DC voltage to be 1.5V
6/27
HA
Hardwareaddresswith internal 135µApull down.
Chip address is 06 when this pin is grouded and
chip address is 46 when connectedto V
DD
.
GENERAL BLOCKDIAGRAM
STV0056AF
From Tuner
Video
Processing
FromTV,
VCR/Decoder
FM
B-BAND
From Tuner
Demodulation
2 Channels
Wegener
Panda+
Deemphasis
22kHz to LNB
STV0056AF
VIDEOPROCESSINGBLOCK DIAGRAM
LPF
I/O/22kHz
B-BAND IN
25
22kHz
TONE
16
± 1
G
2
2
6x3
Video
4
Matrix
Audio
Matrix
+
Volume
2
I
C Bus
Interface
NTSC
PAL
VIDEEM1VIDEEM2/22kHz
9128
Baseband
3
3
To TV, VCR/Decoder
Active in Stand-by
UNCLDEEM
Deemphasized
÷ 2
0056F-02.EPS
CLAMPIN
S3 VID RTN
S2 VID RTN
S1 VID RTN
6
CLAMP
CLAMP
61
CLAMP
4
CLAMP
60
STV0056AF
Normal
DecoderReturn
VCRReturn
TV Return
BLACKLEVEL
ADJUST
63
642
To DecoderTo VCR
S1 VID OUT
S2 VID OUTS3 VID OUT
To TV
0056F-03.EPS
7/27
STV0056AF
AUDIO PROCESSINGBLOCK DIAGRAM (CHANNELRIGHT)
AUDIO R
47
a
ANRS
K3
b
4
abc
K4
b
a
K6
-6dB-6dB
2421 51 58 59 5771862
AUDIO
DEEMPHASIS
2948
STV0056AF
K2
a
ba
c
abc
6dB6dB
K1
b
c
K5
MONO
STEREO
DET R
PLL
FILTER
Audio
Decoder Out
FC R
PK IN R
S3 OUT R
S3 RTN R
Audio
Decoder Return
LEVEL R
PK OUT R
J17 R
U75 R
DECODERVCR
AUDIO PROCESSINGBLOCK DIAGRAM(CHANNELLEFT)
AUDIOL
36
a
ANRS
K3
K4
abc
K6
232052 54 53 555173
b
a
-6dB-6dB
b
4
AUDIO
DEEMPHASIS
3037
S2 OUT R
S2 RTN R
STV0056AF
K2
a
ba
c
abc
6dB6dB
K1
b
c
K5
MONO
STEREO
VOL R
TV
0056F-04.EPS
8/27
DET L
PLL
FILTER
Decoder Out
FC L
PK IN L
S3 OUT L
Audio
S3 RTN L
Audio
DecoderReturn
DECODERVCR
LEVEL L
PK OUT L
J17 L
U75 L
S2 OUT L
S2 RTN L
VOL L
TV
0056F-05.EPS
AUDIO SWITCHING
STV0056AF
AUDIO
DEEMPHASIS
+ ANRS
AUDIOPLL
DECRTN
AUXINK
K
1a
K
1b
1c6b
VOL OUT AUXOUT
K
K
K
5b
5c
5a
FM DEMODULATION BLOCK DIAGRAM
FM IN
19
AGC
LEVEL
DETECTOR1
AGC R
39
LEVEL
DETECTOR2
K
K
K
DECOUT
Bias
6c
6a
SW1
0056F-06.EPS
Phase
Detect
:a→ANRS input non-scrambledaudio
K
4
b → ANRS input descrambledaudio
K
a
b
b
c
a
b
b
c
K
2
1
2
1
2
3
a
No ANRS, No De-emphasis
a
No ANRS, 50µs
a
No ANRS, 75µs
a
No ANRS, J17
b
ANRS, No De-emphasis
b
ANRS, 50µs
b
ANRS, 75µs
b
ANRS, J17
AUDIOR
FM dev.
Select.
V
REF
47
49
DET R
CPUMPR
AMPLKR
AGC L
AMPLK L
46
V
REF
AGC
22
38
V
REF
STV0056AF
Reg8 b4
LEVEL
DETECTOR1
LEVEL
DETECTOR2
Reg8 b0
Amp.Detect
WATCHDOG
SW3
Bias
Amp.Detect
WATCHDOG
Phase
Detect
90
VCO
0
SYNTHESIZER
AUDIOL
FM dev.
Select.
V
REF
90
VCO
0
SW2
SW4
36
35
DET L
CPUMP L
0056F-07.EPS
9/27
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