SGS Thomson Microelectronics STU9NC80Z, STU9NC80ZI Datasheet
STU9NC80Z
STU9NC80ZI
N-CHANNEL 800V - 0.82Ω - 8.6A Max220/I-Max220
Zener-Protected PowerMESH™III MOSFET
TYPE V
STU9NC80Z
STU9NC80Z I
■ TYPICAL R
■ EXTREMELY HIGH dv /d t CAPABILITY
■ GATE-TO-SOURCE ZENER DIODES
■ 100% AVALANCHE TESTED
■ VERY LOW INTRINSIC CAPAC ITANCES
■ GATE CHARGE MINIMIZED
DS
DSS
800 V
800 V
(on) = 0.82Ω
R
DS(on)
<0.9
<0.9
I
D
Ω
Ω
8.6 A
8.6 A
Max220
3
2
1
I-Max220
DESCRIPTION
The third generation of MESH O VERLAY™ Power
MOSFETs for very high voltage exhibits unsurpassed on-resistance per unit area while integrating
back-to-back Zener diodes between gate and
source. Such arrangement gives extra ESD capability with higher ruggedness performance as requested by a large variety of single-switch applications.
APPLICATIONS
■ SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
■ WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STU9NC80Z STU9NC80ZI
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
I
GS
V
ESD(G-S)
dv/dt(
V
ISO
T
stg
T
(•)Pu l se width limited by safe operating area
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
800 V
800 V
Gate- source Voltage ±25 V
(1)
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
Drain Current (pulsed) 34.4 34.4(*) A
Total Dissipation at TC = 25°C
8.6 8.6(*) A
5.4 5.4(*) A
160 55 W
Derating Factor 1.28 0.44 W/°C
Gate-source Current ±50 mA
Gate source ESD(HBM-C=100pF, R=15K
●) Peak Diode Recovery voltage slope 3 V/ns
Ω)
4KV
Insulation Winthstand Voltage (DC) -- 2000 V
Storage Temperature –65 to 150 °C
Max. Operating Junction Temperature 150 °C
j
(1)ISD ≤8.6A, di/ dt ≤100A/µs, VDD ≤ V
(*)Limit ed only by maxi m um temperature allowed
(BR)DSS
, Tj ≤ T
JMAX
1/10Sep 2000
STU9NC80Z/STU9NC80ZI
THERMA L D ATA
Max220 I-Max220
Rthj-case Thermal Resistance Junction-case Max 0.78 2.27 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W
Rthc-sink Thermal Resistance Case-sink Typ 0.1 °C/W
T
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
∆
BV
DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 300 °C
l
8.6 A
400 mJ
AS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
Drain-source
= 25 °C, ID = IAR, VDD = 50 V)
j
ID = 250 µA, VGS = 0 800 V
Breakdown Voltage
/∆TJBreakdown Voltage Temp.
ID = 1 mA, VGS = 0 1
Coefficient
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
V
= Max Rating
DS
V
= Max Rating, TC = 125 °C
DS
V
= ±20V
GS
1µA
50 µA
±10 µA
V/°C
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
= VGS, ID = 250µA
DS
VGS = 10V, ID = 4.7A
345V
0.82 0.9
Resistance
I
D(on)
On State Drain Current VDS > I
V
=10V
GS
D(on)
x R
DS(on)max,
8.6 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
C
iss
C
oss
C
rss
Forward Transconductance VDS > I
I
=4.7A
D
Input Capacitance
V
DS
Output Capacitance 230 pF
Reverse Transfer
Capacitance
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
13 S
3500 pF
25 pF
Ω
2/10
STU9NC80Z/STU9NC80ZI
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON (RESISTIVE LOAD)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time 16 ns
Total Gate Charge
Gate-Source Charge 19.5 nC
Gate-Drain Charge 24.3 nC
SWITCHING OFF (INDUCTIVE LOAD)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
t
f
c
Off-voltage Rise Time
Fall Time 42 ns
Cross-over Time 67 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Source-drain Current 8.6 A
(2)
Source-drain Current (pulsed) 34.4 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge 7.2 µC
Reverse Recovery Current 19.5 A
= 400V, ID = 4.5A
DD
RG= 4.7Ω VGS = 10V
(see test circuit, Figure 3)
V
= 640V, ID = 9 A,
DD
VGS = 10V
V
= 640V, ID = 9 A,
DD
RG=4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
ISD = 8.6 A, VGS = 0
I
= 9 A, di/dt = 100A/µs,
SD
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
35 ns
72.2 101 nC
32 ns
1.6 V
730 ns
GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 25 V
Voltage
α
T Voltage Thermal Coefficient T=25°C Note(3) 1.3
I
Rz Dynamic Resistance
Note: 1. Pulsed: Pu l se duration = 300 µs, duty c yc l e 1.5 %.
2. Pulse width li mited by safe operating area.
3. ∆
= αT (25°-T) BV
V
BV
GSO
(25°)
= 50 mA, VGS = 0
GS
90
10
-4
/°C
Ω
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specif ically been designed to enhanc e not only t he dev ice’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the 25V Zener voltage is appropiate to achieve an efficient and
cost-effective intervention to protect the device’s int egrity. These integrated Zener diode s thus avoid the
usage of external components.
3/10
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