SGS Thomson Microelectronics STU8NC90ZI, STU8NC90Z Datasheet

1/10Sep 2000
STU8NC90Z
STU8NC90ZI
N-CHANNEL 900V - 1.1Ω - 7.6A Max220/I-Max220
Zener-Protected PowerMESH™III MOSFET
TYPICAL R
DS
EXTREMELY HIGH dv /d t C APABILITY
GATE-TO-SOURCE ZENER DIODES
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPAC ITANCES
GATE CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH O VERLAY™ Power MOSFETs for very high voltage exhibits unsur­passed on-resistance per unit area while integrating back-to-back Zener diodes between gate and source. Such arrangement gives extra ESD capabil­ity with higher ruggedness performance as request­ed by a large variety of single-switch applications.
APPLICATIONS
SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
(•)Pu l se width limi te d by safe oper ating area
TYPE V
DSS
R
DS(on)
I
D
STU8NC90Z STU9NC90Z I
900 V 900 V
< 1.38
< 1.38
7 A 7 A
Symbol Parameter Value Unit
STU8NC90Z STU8NC90ZI
V
DS
Drain-source Voltage (VGS = 0)
900 V
V
DGR
Drain-gate Voltage (RGS = 20 kΩ)
900 V
V
GS
Gate- source Voltage ±25 V
I
D
Drain Current (continuos) at TC = 25°C
7 7(*) A
I
D
Drain Current (continuos) at TC = 100°C
4.4 4.4(*) A
I
DM
(1)
Drain Current (pulsed) 28 28(*) A
P
TOT
Total Dissipation at TC = 25°C
160 55 W
Derating Factor 1.28 0.44 W/°C
I
GS
Gate-source Current ±50 mA
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=15K
Ω)
4KV
dv/dt(
●) Peak Diode Recovery voltage slope 3 V/ns
V
ISO
Insulation Winthstand Voltage (DC) -- 2000 V
T
stg
Storage Temperature –65 to 150 °C
T
j
Max. Operating Junction Temperature 150 °C
(1)ISD ≤ 7A, di/dt ≤100A/µs, VDD ≤ V
(BR)DSS
, Tj ≤ T
JMAX
(*)Limit ed only by maxi mum temperature allow ed
Max220
I-Max220
1
2
3
STU8NC90Z/STU8NC90ZI
2/10
THERMA L D ATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON
(1)
DYNAMIC
Max220 I-Max220
Rthj-case Thermal Resistance Junction-case Max 0.78 2.27 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W
Rthc-sink Thermal Resistance Case-sink Typ 0.1 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose 300 °C
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T
j
max)
7A
E
AS
Single Pulse Avalanche Energy (starting T
j
= 25 °C, ID = IAR, VDD = 50 V)
430 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source Breakdown Voltage
ID = 250 µA, VGS = 0 900 V
BV
DSS
/∆TJBreakdown Voltage Temp.
Coefficient
ID = 1 mA, VGS = 0 1
V/°C
I
DSS
Zero Gate Voltage Drain Current (V
GS
= 0)
V
DS
= Max Rating
A
V
DS
= Max Rating, TC = 125 °C
50 µA
I
GSS
Gate-body Leakage Current (V
DS
= 0)
V
GS
= ±20V
±10 µA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= VGS, ID = 250µA
345V
R
DS(on)
Static Drain-source On Resistance
VGS = 10V, ID = 3.8A
1.1 1.38
I
D(on)
On State Drain Current VDS > I
D(on)
x R
DS(on)max,
V
GS
=10V
7A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
Forward Transconductance VDS > I
D(on)
x R
DS(on)max,
I
D
= 3.8A
9S
C
iss
Input Capacitance
V
DS
= 25V, f = 1 MHz, VGS = 0
3550 pF
C
oss
Output Capacitance 205 pF
C
rss
Reverse Transfer Capacitance
25 pF
3/10
STU8NC90Z/STU8NC90ZI
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON (RESISTIVE LOAD)
SWITCHING OFF (INDUCTIVE LOAD)
SOURCE DRAIN DIODE
GATE-SOURCE ZENER DIODE
Note: 1. Pulsed: Pu l se duration = 300 µs, duty cycle 1.5 %.
2. Pulse width li mited by safe operating area.
3. ∆
V
BV
= αT (25°-T) BV
GSO
(25°)
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specif ically been designed to enhanc e not only t he dev ice’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to souce. In this respect the 25V Zener voltage is appropiate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrat ed Z ener diodes thus avoi d t he usage of external components.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Delay Time
V
DD
= 400V, ID = 4A RG= 4.7Ω VGS = 10V (see test circuit, Figure 3)
36 ns
t
r
Rise Time 12 ns
Q
g
Total Gate Charge
V
DD
= 720V, ID = 8 A, VGS = 10V
73 102 nC
Q
gs
Gate-Source Charge 18 nC
Q
gd
Gate-Drain Charge 27 nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
Off-voltage Rise Time
V
DD
= 720V, ID = 8 A,
RG=4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
36 ns
t
f
Fall Time 45 ns
t
c
Cross-over Time 77 ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
Source-drain Current 7 A
I
SDM
(2)
Source-drain Current (pulsed) 28 A
VSD (1)
Forward On Voltage
ISD = 7 A, VGS = 0
1.6 V
t
rr
Reverse Recovery Time
I
SD
= 8 A, di/dt = 100A/µs, VDD = 50V, Tj = 150°C (see test circuit, Figure 5)
860 ns
Q
rr
Reverse Recovery Charge 10 µC
I
RRM
Reverse Recovery Current 24 A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown Voltage
Igs=± 1mA (Open Drain) 25 V
α
T Voltage Thermal Coefficient T=25°C Note(3) 1.3
10
-4
/°C
Rz Dynamic Resistance
I
GS
= 50 mA, VGS = 0
90
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