STS4PF20V
P-CHANNEL 20V - 0.090 Ω - 4A SO-8
2.7V-DRIVE STripFET™ II POWER MOSFET
TYPE
V
DSS
STS4PF20V 20 V
■ TYPICAL R
■ TYPICAL R
■ ULTRA LOW THRESHOLD
(on) = 0.090 Ω @ 4.5 V
DS
(on) = 0.100 Ω @ 2.7 V
DS
R
DS(on)
< 0.11 Ω ( @ 4.5 V )
< 0.135 Ω ( @ 2.7 V )
I
4 A
D
GATE DRIVE (2.7 V)
■ STANDARD OUTLI NE FO R EASY
AUTOMATED SURFACE MOUNT ASSEMBLY
DESCRIPTION
This Power MOSFET is the latest dev elo pment of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ MOBILE PHONE APPLICATIONS
■ DC-DC CONVERTERS
■ BATTERY MANAGEMENT IN NOMADIC
EQUIPMENT
SO-8
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
(
I
DM
P
tot
(
Pulse width limited by safe operating area. Note: For the P-CHANNEL MOSFET actual polarity of voltages and
•)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
20 V
20 V
Gate- source Voltage ± 12 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
•)
Drain Current (pulsed) 16 A
Total Dissipation at TC = 25°C
current has to be rever sed
4A
2.5 A
2.5 W
1/8June 2002
STS4PF20V
THERMA L D ATA
Rthj-amb
T
T
stg
(*)
When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t [ 10 sec.
(*)
Thermal Resistance Junction-ambient
Maximum Operating Junction Temperature
j
storage temperature
Max 50
150
-55 to 150
°C/W
°C
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
= 250 µA, VGS = 0
D
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
V
= ± 12V
GS
20 V
1
10
±100 nA
ON
V
(BR)DSS
I
DSS
I
GSS
(*)
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS I
DS
= 4.5 V ID = 2 A
V
GS
V
= 2.7 V ID = 2 A
GS
= 250 µA
D
0.6 V
0.090
0.100
0.110
0.135
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
=15V ID=2 A
DS
= 15V, f = 1 MHz, VGS = 0
V
DS
7.5 S
500
140
30
µA
µA
Ω
Ω
pF
pF
pF
2/8
STS4PF20V
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
r
Q
g
Q
gs
Q
gd
(*)
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 10 V ID = 2 A
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 1)
= 10V ID= 4A VGS=4.5V
V
DD
(see test circuit, Figure 2)
38
39
6.2
1
1.4
ns
ns
nC
nC
nC
SWITCHING OFF
(*)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
54
12
= 10 V ID = 2 A
(Resistive Load, Figure 1)
t
r(Voff)
t
t
f
c
Off-voltage Rise Time
Fall Time
Cross-over Time
SOURCE DRAIN DIODE
(*)
= 16 V ID = 4 A
V
clamp
R
= 4.7Ω, V
G
GS
= 4.5 V
(Inductive Load, Figure 3)
46
11
15
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulse wi dth [ 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by T
Safe Operating Area
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
JMAX
I
= 4 A VGS = 0
SD
= 4 A di/dt = 100A/µs
I
SD
V
= 15 V Tj = 150°C
DD
(Inductive Load, Figure 3)
Thermal Impedance
4
16
1.2 V
20
13
1.3
ns
ns
ns
ns
ns
A
A
ns
nC
A
3/8
STS4PF20V
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/8
STS4PF20V
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature
. .
5/8
STS4PF20V
Fig. 1: Switching Times Test Circuits For Resistive
Load
Fig. 3: Test Circuit For Diode Recovery Behaviour
Fig. 2: Gate Charge test Circuit
6/8
SO-8 MECHANICAL DATA
STS4PF20V
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A1.750.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M0.60.023
S 8 (max.)
mm inch
0016023
7/8
STS4PF20V
Information furnished is believed to be accurate an d rel i able. However, STMicroelectro ni cs assumes no responsibility for the consequen ces
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent ri ghts of STM i croelectr onics. Sp ecifications mentioned in thi s publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approv al of STMicroel ectronics.
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8/8
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