STS2DNF30L
N-CHANNEL 30V - 0.09 Ω - 3A SO-8
STripFET™ POWER MOSFET
TYPE
V
DSS
STS2DNF30L 30 V <0.011
■ TYPICAL R
■ STANDARD OUTLINE FO R EAS Y
(on) = 0.09 Ω
DS
R
DS(on)
I
D
3 A
Ω
AUTOMATED SURFACE MOUNT ASSEMBLY
■ LOW THRESHOLD DRIVE
DESCRIPTION
This Power MOSFET is the latest dev elo pment of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ DC MOTOR DRIVE
■ DC-DC CONVERTERS
■ BATTERY MANAGEMENT IN NOMADIC
EQUIPMENT
■ POWER MANAGEMENT IN
PORTABLE/DESKTOP PCs
SO-8
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
I
(
DM
P
tot
T
stg
T
j
(
Pulse widt h l i m i ted by safe operating area.
•)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
30 V
30 V
Gate- source Voltage ± 18 V V
Drain Current (continuos) at TC = 25°C
3
Single Operating
Drain Current (continuos) at TC = 100°C
1.9
Single Operating
•)
Drain Current (pulsed) 9 A
Total Dissipation at TC = 25°C Dual Operating
Total Dissipation at T
= 25°C Single Operating
C
1.6
2
Storage Temperature -55 to 150 °C
Max. Operating Junction Temperature 150 °C
A
A
W
W
1/8February 2002
STS2DNF30L
THERMAL DATA
Rthj-amb
T
T
stg
(*)
Mounte d on F R-4 board (t [ 10 se c.)
(*)Thermal Resistance Junction-ambient Single Operation
Thermal Operating Junction-ambient
j
Storage Temperature
Dual Operating
62.5
78
150
-55 to 175
°C/W
°C/W
°C
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
V
(BR)DSS
Drain-source
= 250 µA, VGS = 0
D
30 V
Breakdown Voltage
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
= ± 18V
V
GS
1
10
±100 nA
ON
(1)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS ID = 250 µA
DS
= 10 V ID = 1 A
V
GS
V
= 5 V ID = 1 A
GS
1 1.7 2.5 V
0.09
0.13
0.011
0.15
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS>ID(on)xRDS(on)max ID
= 25V, f = 1 MHz, VGS = 0
V
DS
=2.5A
2.5 S
121
45
11
µA
µA
Ω
Ω
pF
pF
pF
2/8
STS2DNF30L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 15 V ID = 1 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 3)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 24V ID= 2A VGS= 10V
V
DD
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 15 V ID = 1 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
(Resistive Load, Figure 3)
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by s afe operating area.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 2 A VGS = 0
SD
= 2 A di/dt = 100A/µs
I
SD
V
= 30 V Tj = 150°C
DD
(see test circuit, Figure 5)
19
20
4.5
1.7
0.9
12
8
3
12
1.3 V
19
8.1
0.85
ns
ns
nC
nC
nC
ns
ns
A
A
ns
nC
A
Safe Operating Area
Thermal Impedance
3/8
STS2DNF30L
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/8
STS2DNF30L
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics .
. .
5/8
STS2DNF30L
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/8
SO-8 MECHANICAL DATA
STS2DNF30L
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A1.750.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M0.60.023
S 8 (max.)
mm inch
0016023
7/8
STS2DNF30L
Information furnished is believed to be accurate an d rel i able. However, STMicroelectro ni cs assumes no responsibility for the consequen ces
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent ri ghts of STM i croelectr onics. Sp ecifications mentioned in thi s publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approv al of STMicroel ectronics.
The ST log o i s registered trademark of STMicroelectronics
2002 STMi croelectronics - All Ri ghts Rese rved
All other names are the property of their respective ow ners.
Australi a - Brazil - Canada - China - Finland - France - Germ any - Hong Kong - India - Israel - Ital y - Japan - Malay sia - Malta - Morocco -
Singapor e - S pai n - Sweden - S witzerland - United Kingdom - United States.
STMicroelect ro n ics GRO UP OF COMPANI ES
http://www.st.com
8/8
Loading...