SGS Thomson Microelectronics STP9NA50, STP9NA50FI Datasheet
STP9NA50
STP9NA50FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
■ TYPICAL R
DS(on)
= 0.7 Ω
■ ± 30V GATE TO SOURCE VOLTAGE RATING
■ 100% AVALANCHE TESTED
■ REPETITIVE AVALANCHE DATA AT 100
o
C
■ LOW INTRINSIC CAPACITANCES
■ GATE GHARGE MINIMIZED
■ REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The
optimized cell layout coupled with a new
proprietary edge termination concur to give the
device low R
DS(on)
and gate charge, unequalled
ruggedness and superior switching performance.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWERSUPPLIES (SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
INTERNAL SCHEMATIC DIAGRAM
TYPE V
DSS
R
DS(on)
I
D
STP 9NA50
STP 9NA50FI
500 V
500 V
<0.8Ω
<0.8Ω
8.8 A
5A
1
2
3
TO-220 ISOWATT220
February 1994
ABSOLUTE MAXIMUM RATINGS
Symb o l Parameter Val u e Unit
ST P9NA50 ST P9NA50FI
V
DS
Drain - source Voltage (VGS=0) 500 V
V
DGR
Drain - gat e Voltage (RGS=20kΩ)500V
V
GS
Gate-source Voltage ± 30 V
I
D
Drain Current (continuous) at Tc=25oC8.85A
I
D
Drain Current (continuous) at Tc=100oC5.5 3.1A
I
DM
(•) Drain Current (pulsed) 35 35 A
P
tot
Total Di ssipation a t Tc=25oC 125 45 W
Derating F actor 1 0.36 W/
o
C
V
ISO
Ins ulation Withs t and Voltage (DC) 2000 V
T
stg
St orage Temperat ur e -65 t o 150
o
C
T
j
Max. Operating Jun ction T emperat ure 150
o
C
(•) Pulsewidth limited by safe operating area
1
2
3
1/10
THERMAL DATA
TO-220 ISOW ATT 220
R
thj-case
Thermal Resistance J unction- c ase Max 1 2.78
o
C/W
R
thj-amb
R
thc-sink
T
l
Thermal Resistance Junc tion-am bie nt Max
Thermal Resistance Cas e-sink Typ
Maximum Lead Temperature For So ldering Purpose
62.5
0.5
300
o
C/W
o
C/W
o
C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Uni t
I
AR
Avalanc h e Cu rr ent , Repet itive or Not-Rep etitive
(pulse width limited by Tjmax, δ <1%)
8.8 A
E
AS
Single Pul se A v alanche Energy
(starti ng T
j
=25oC, ID=IAR,VDD=50V)
390 mJ
E
AR
Repetitive Avalanc he Energ y
(pulse width limited by Tjmax, δ <1%)
15 mJ
I
AR
Avalanc h e Cu rr ent , Repet itive or Not-Rep etitive
(Tc= 100oC, pulse width l imited by Tjmax, δ <1%)
5.5 A
ELECTRICAL CHARACTERISTICS (T
case
=25oC unless otherwisespecified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain - source
Break d own Voltage
ID=250µAVGS= 0 500 V
I
DSS
Zer o G at e V oltage
Drain Current (VGS=0)
VDS=MaxRating
VDS= Max Rating x 0.8 Tc=125oC
250
1000µAµA
I
GSS
Gat e- body Leakage
Current (V
DS
=0)
V
GS
= ± 30 V ± 100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold Voltage VDS=VGSID=250µA 2.25 3 3.75 V
R
DS(on)
St at ic Drain-s ourc e O n
Resistance
VGS=10V ID=4.5A
VGS=10V ID=4.5A Tc= 100oC
0.7 0.8
1.6
Ω
Ω
I
D(on)
On State Drain Current VDS>I
D(on)xRDS(on)max
VGS=10V
9A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
(∗)Forward
Tr ansconduct anc e
VDS>I
D(on)xRDS(on)maxID
=4.5A 4 7 S
C
iss
C
oss
C
rss
Input Capacitance
Out put Capacitance
Reverse Transfer
Capaci tance
VDS=25V f=1MHz VGS= 0 1350
200
50
1800
270
70
pF
pF
pF
STP9NA50/FI
2/10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
r
Turn-on T ime
Rise Time
VDD=250V ID=4.5A
RG=4.7 Ω VGS=10V
(see test circuit, figure 3)
18
25
25
35
ns
ns
(di/dt)
on
Turn-on Current S lope VDD=400V ID=9A
RG=47 Ω VGS=10V
(see test circuit, figure 5)
200 A/µs
Q
g
Q
gs
Q
gd
Total Gate Charge
Gat e- Source Charge
Gate-Drain Charge
VDD= 400 V ID=9A VGS=10V 56
9
26
75 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
f
t
c
Off -voltage Rise Time
Fall Time
Cross-over Time
VDD=400V ID=9A
RG=4.7 Ω VGS=10V
(see test circuit, figure 5)
15
15
25
20
20
35
ns
ns
ns
SOURCE DRAINDIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
(•)
Source-drain C urrent
Source-drain C urrent
(pulsed)
8.8
35
A
A
V
SD
(∗) Forward On Voltage ISD=9A VGS=0 1.6 V
t
rr
Q
rr
I
RRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD=9A di/dt=100A/µs
VDD= 100 V Tj=150oC
(see test circuit, figure 5)
560
9
32
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, dutycycle 1.5 %
(•) Pulse widthlimited by safeoperating area
Safe Operating Areas for TO-220 Safe Operating Areas forISOWATT220
STP9NA50/FI
3/10
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