1/9September 2002
STP80NF10
STP80NF10FP
N-CHANNEL 100V - 0.012Ω - 80A TO-220/TO-220FP
LOW GATE CHARGE STripFET™II POWER MOSFET
(1) ISD ≤80A, di/dt ≤300A/µs, VDD ≤ V
(BR)DSS
, Tj ≤ T
JMAX.
(2) Starting Tj = 25°C, ID = 80A, VDD = 50V
■ TYPICAL R
DS
(on) = 0.012Ω
■ EXCEPTIONA L dv/d t CAPABILITY
■ 100% AVALANCHE TESTED
■ APPLICATION ORIENTED
CHARACTERIZATION
DESCRIPTION
This Power MOSFET series realized with STM icroelectronics unique STripFET process has specifically been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated D C-DC
converters for T el ecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
APPLICATIONS
■ HIGH-EFFICIENCY DC-DC CONVERTERS
■ UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
(●) Pulse width limited by safe operating area
(*) Limited by Package
TYPE V
DSS
R
DS(on)
I
D
STP80NF10
STP80NF10FP
100 V
100 V
< 0.015 Ω
< 0.015 Ω
80 A
38 A
Symbol Parameter Value Unit
STP80NF10 STP80NF10FP
V
DS
Drain-source Voltage (VGS = 0)
100 V
V
DGR
Drain-gate Voltage (RGS = 20 kΩ)
100 V
V
GS
Gate- source Voltage ±20 V
I
D
(*) Drain Current (continuous) at TC = 25°C
80 38 A
I
D
Drain Current (continuous) at TC = 100°C
66 27 A
I
DM
(l)
Drain Current (pulsed) 320 152 A
P
TOT
Total Dissipation at TC = 25°C
300 45 W
Derating Factor 2 0.3 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 9 V/ns
E
AS
(2)
Single Pulse Avalanche Energy 360 mJ
V
ISO
Insulation Withstand Voltage (DC) - 2500 V
T
stg
Storage Temperature
– 55 to 175 °C
T
j
Max. Operating Junction Temperature
TO-220
1
2
3
1
2
3
TO-220FP
INTERNAL SCHEMATIC DIAGRAM