SGS Thomson Microelectronics STP75NF75FP, STP75NF75, STB75NF75 Datasheet

STB75NF75

STP75NF75 STP75NF75FP

N-CHANNEL 75V - 0.0095 Ω - 80A TO-220/TO-220FP/D²PAK

STripFET™ II POWER MOSFET

TYPE

STB75NF75 STP75NF75 STP75NF75FP

■ TYPICAL R

■ EXCEPTIONA L dv/d t CAPABILITY

■ 100% AVALANCHE TESTED

■ SURFACE-MOUNTING D

V

DSS

75 V 75 V 75 V

(on) = 0.0095 Ω

DS

R

DS(on)

<0.011

Ω

<0.011

Ω

<0.011

Ω

2

PAK (TO-263)

I

D

80 A 80 A

80 A(*)

POWER PACKAGE IN TAPE & REEL

(SUFFIX “T4”)

DESCRIPTION

This MOSFET series realized with STMicroelectronics

unique STripFET™ process has specifically been designed to minimiz e inpu t capa citanc e and gate c harge . It is therefore su itable as p rima ry sw itch i n ad vanced hig hefficiency, high-frequency isolate d DC-DC c onverters for T elecom and Computer applications. It is also intended for any applications with low gate drive requirements.

APPLICATIONS

■ SOLENOID AND RELAY DRIVERS

■ DC MOTOR CONTROL

■ DC-DC CONVERTERS

■ AUTOMOTIVE ENVIRONMENT

3

2

1

TO-220FP

3

2

1

TO-220

INTERNAL SCHEMATIC DIAGRAM

1

D2PAK

TO-263

(Suffix “T4”)

3

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage ± 20 V

Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C

•)

Drain Current (pulsed) 320 320(*) A Total Dissipation at TC = 25°C

V

I

V

DM

P

DS

DGR

GS

I

D

I

D

(

tot

Derating Factor 2.0 0.3 W/°C

(1)

dv/dt

E

AS

V

ISO

T

stg

T

j

(

Pulse widt h l i m i ted by safe operating area.

•)

(*) Ref er to S OA for the max allowable cu rrent v al ues o n FP-typ e

due to Rth value

NEW DATASHEET ACCORDING TO PCN DSG20023123 MARKING: P75NF75 @

Peak Diode Recovery voltage slope 12 V/ns

(2)

Single Pulse Avalanche Energy 700 mJ Insulation Withstand Voltage (DC) ------ 2000 V Storage Temperature Operating Junction Temperature

(1) I

(2) Starting Tj = 25 oC, ID = 40A, VDD= 37.5V

STB75NF75 STP75NF75

80 80(*) A 70 70(*) A

300 45 W

-55 to 175 °C

≤80A, di/dt ≤300A/ µ s , VDD ≤ V

SD

STP75NF75FP

75 V 75 V

, Tj ≤ T

(BR)DSS

JMAX

1/11June 2003

STB75NF75 STP75NF75 STP75NF75FP

THERMA L D ATA

D2PAK

TO-220

Rthj-case Thermal Resistance Junction-case Max 0.5 3.33 °C/W

TO-220FP

Rthj-amb

T

l

Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose

Max

62.5 300

( 1.6 mm from case, for 10 sec.)

ELECTRICAL CHARACTERISTICS (T

= 25 °C unless otherwise specified)

case

OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

= 250 µA, VGS = 0

D

V

= Max Rating

DS

V

= Max Rating TC = 125°C

DS

= ± 20 V

V

GS

75 V

1

10

±100 nA

ON

V

(BR)DSS

I

DSS

I

GSS

(*)

Drain-source Breakdown Voltage

Zero Gate Voltage Drain Current (V

GS

Gate-body Leakage Current (V

DS

= 0)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

GS(th)

R

DS(on)

Gate Threshold Voltage Static Drain-source On

= VGS I

DS

V

= 10 V ID = 40 A

GS

= 250 µA

D

234V

0.0095 0.011

V

Resistance

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(*)

g

fs

C

iss

C

oss

C

rss

Forward Transconductance Input Capacitance

Output Capacitance Reverse Transfer Capacitance

V

= 15 V ID= 40 A

DS

= 25V, f = 1 MHz, VGS = 0

V

DS

20 S

3700

730 240

°C/W

°C

µA µA

Ω

pF pF pF

2/11

STB75NF75 STP75NF75 STP75NF75FP

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

= 37.5 V ID = 45 A

t

d(on)

Turn-on Delay Time

t

r

Rise Time

V

DD

R

= 4.7 Ω VGS = 10 V

G

(Resistive Load, Figure 3)

Q

g

Q

gs

Q

gd

Total Gate Charge Gate-Source Charge Gate-Drain Charge

= 60 V ID= 80 A VGS= 10V

V

DD

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

= 37.5 V ID = 45 A

t

d(off)

Turn-off Delay Time

t

f

Fall Time

V

DD

R

= 4.7 Ω VGS = 10 V

G

(Resistive Load, Figure 3)

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

V

SD

t

rr

Q

rr

I

RRM

(*)

Pulsed: P ul se duration = 300 µs, dut y cycle 1.5 %.

(

•)Pulse width limited by s afe operating area.

Source-drain Current

(•)

Source-drain Current (pulsed)

(*)

Forward On Voltage Reverse Recovery Time

Reverse Recovery Charge Reverse Recovery Current

I

= 80 A VGS = 0

SD

= 80 A di/dt = 100A/µs

I

SD

V

= 25 V Tj = 150°C

DD

(see test circuit, Figure 5)

25 25

117

27 47

66 30

132 660

10

160 nC

80

320

1.5 V

ns ns

nC nC

ns ns

A A

ns

nC

A

Safe Operating Area for TO-220FPSafe Operating Area

3/11

STB75NF75 STP75NF75 STP75NF75FP

Thermal Impedance Thermal Impedance for TO-220FP

Output Characteristics Transfer Characteristics

Transconductance Static Drain-source On Resistance

4/11