STP60N05-14
STP60N06-14
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
PRELIMINARY DATA
■ TYPICAL R
DS(on)
= 0.012 Ω
■ AVALANCHE RUGGED TECHNOLOGY
■ 100% AVALANCHE TESTED
■ REPETITIVE AVA LANCHE DATA AT 100
o
C
■ LOW GATE CHARGE
■ HIGH CURRENT CAPABILITY
■ 175
o
C OPERATING TEMP E RAT UR E
■ VERY LOW R
DS (on)
■ APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
■ HIGH CURRENT, HIGH SPE ED SWI TCHING
■ SOLENOID AND RELAY DRIVER S
■ REGULAT O RS
■ DC-DC & DC-AC CONVERT E RS
■ MOTOR CONTROL, AUDIO AMPLIFIERS
■ AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
TYPE V
DSS
R
DS(on)
I
D
STP60N05-14
STP60N06-14
50 V
60 V
< 0.014 Ω
< 0.014 Ω
60 A
60 A
March 1996
1
2
3
TO-220
ABSOLUT E MAXIMUM RATI NG S
Symbol Parameter Value Unit
STP60N05-14 STP60N06-14
V
DS
Drain-Source Voltage (Vgs = 0) 50
60
V
V
DGR
Drain-Gate Voltage (Rgs = 20 KΩ)50
60
V
V
GS
Gate-Source Voltage ± 20 V
I
D
Drain-Current (continuous) at Tc = 25oC60A
I
D
Drain-Current (continuous) at Tc = 100oC50A
I
DM
(•) Drain-Current (Pulsed) 240 A
P
tot
Total Dissipation at Tc = 25oC 150 W/oC
Derating Factor 1
o
C
V
ISO
Insulation Withstand Voltage (DC) - V
T
stg
Storage Temperature -65 to 175
o
C
T
j
Max Operating Junction Temperature 175
o
C
(•)Pulse width limited by safe operating area
1/5