SGS Thomson Microelectronics STP5NK50ZFP, STP5NK50Z, STD5NK50Z-1, STD5NK50Z Datasheet
STB5NK50Z-1 - STP5NK50ZFP
STP5NK50Z - STD5NK50Z - STD5NK50Z-1
N-CHANNEL500V-1.22Ω-4.4ATO-220/FP/DPAK/IPAK/I2PAK
Zener-Protected SuperMESH™Power MOSFET
TYPE V
STP5NK50Z
STP5NK50ZFP
STD5NK50Z
STD5NK50Z-1
STB5BK50Z-1
■ TYPICAL R
■ EXTREMELY HIGHdv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSICCAPACITANCES
■ VERY GOOD MANUFACTURING
500 V
500 V
500 V
500 V
500 V
(on) = 1.22 Ω
DS
DSS
R
DS(on)
< 1.5 Ω
< 1.5 Ω
< 1.5 Ω
< 1.5 Ω
< 1.5 Ω
I
D
4.4 A
4.4 A
4.4 A
4.4 A
4.4 A
Pw
70 W
25 W
70 W
70 W
70 W
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special careis taken to ensure a very good dv/dt capability for the
most dem anding applications. Such series complements S T full range of high voltage MOSFETs including revolutionary MDmes h™ products.
TO-220 TO-220FP
3
2
1
I2PAK
3
1
DPAK
IPAK
INTERNAL SCHEMATIC DIAGRAM
3
2
1
3
2
1
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
■ LIGHTING
ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STP5NK50Z P5NK50Z TO-220 TUBE
STP5NK50ZFP P5NK50ZFP TO-220FP TUBE
STD5NK50ZT4 D5NK50Z DPAK TAPE & REEL
STD5NK50Z-1 D5NK50Z IPAK TUBE
STB5NK50Z-1 B5NK50Z
I
2
PAK
TUBE
1/14April 2003
STP5NK50Z - STP5NK50ZF P - STD5NK50Z - STD 5NK50Z-1 - STB5NK50Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STD5NK50Z
STD5NK50Z-1
I
V
DM
P
V
DGR
V
I
I
TOT
DS
GS
D
D
STP5NK50Z
STB5NK50Z-1
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC= 25°C
Drain Current (continuous) at TC= 100°C
()
Drain Current (pulsed) 17.6 17.6 (*) 17.6 A
Total Dissipation at TC= 25°C
4.4 4.4 (*) 4.4 A
2.7 2.7 (*) 2.7 A
70 25 70 W
STP5NK50ZFP
500 V
500 V
Derating Factor 0.56 0.2 0.56 W/°C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3000 V
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
V
ISO
T
j
T
stg
() Pulse width limited by safe operating area
≤4.4A, di/dt ≤200A/µs, VDD≤ V
(1) I
SD
(*) Limited only by maximum temperature allowed
Insulation Withstand Voltage (DC) - 2500 - V
Operating Junction Temperature
Storage Temperature
(BR)DSS,Tj≤TJMAX.
-55to150
-55to150
°C
°C
THERMAL DATA
TO-220
2
PAK
I
Rthj-case Thermal Resistance Junction-case Max 1.78 5 1.78 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose
TO-220FP DPAK
300 °C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID=IAR,VDD=50V)
j
4.4 A
130 mJ
GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occas ionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and costeffective intervention to protect the device’s integrity. These integrated Zener diodes thus avoi d the usage
of external components.
2/14
STP5NK50Z - STP5NK 50ZFP - STD5NK50Z - S TD5N K 50Z-1 - STB5NK50Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHE RWISE SPECIFIED)
ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS=15 V,ID= 2.2 A 3.1 S
g
fs
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Output
C
oss eq.
C
iss
C
oss
C
rss
Capacitance
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ID=1 mA, VGS= 0 500 V
V
= Max Rating
DS
VDS= Max Rating, TC= 125 °C
V
= ± 20V ±10 µA
GS
V
DS=VGS,ID
= 50µA
3 3.75 4.5 V
1
50
VGS=10V,ID= 2.2 A 1.22 1.5 Ω
=25V,f=1MHz,VGS= 0 535
V
DS
75
17
VGS=0V,VDS= 0V to 400V 45 pF
VDD=250V,ID= 2.2 A
RG= 4.7Ω VGS=10V
15
10
(Resistive Load see, Figure 3)
=400V,ID= 4.4 A,
V
DD
V
=10V
GS
20
4
28 nC
10
µA
µA
pF
pF
pF
ns
ns
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Turn-off Delay Time
t
f
Fall Time
VDD= 250 V, ID= 2.2A
R
=4.7ΩVGS=10V
G
32
15
(Resistive Load see, Figure 3)
t
r(Voff)
t
= 400V, ID= 4.4A,
t
f
c
Fall Time
Cross-over Time
Off-voltage Rise Time
V
DD
RG=4.7Ω, VGS= 10V
(Inductive Load see, Figure 5)
12
12
20
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD(1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
Source-drain Current
(2)
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD= 4.4 A, VGS=0
I
SD
VDD=30V,Tj= 150°C
(see test circuit, Figure 5)
=4.4 A, di/dt = 100A/µs
310
1425
9.2
when VDSincreases from 0 to 80%
oss
4.4
17.6
1.6 V
ns
ns
ns
ns
ns
A
A
ns
nC
A
3/14
STP5NK50Z - STP5NK50ZF P - STD5NK50Z - STD 5NK50Z-1 - STB5NK50Z-1
Safe Operating Area For TO-220/DPAK/IPAK/I2PAK
Thermal Impedance For TO-220/DPAK/IPAK/I2PAK
Safe Operating Area For TO-220FP
Thermal Impedance For TO-220FP
Output Characteristics
4/14
Transfer Characteristics
STP5NK50Z - STP5NK 50ZFP - STD5NK50Z - S TD5N K 50Z-1 - STB5NK50Z-1
Transconductance
Gate Charge vs Gate-so urc e V oltage Capacitance Variations
Static Drain-source On Resistance
Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature
5/14
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